JPH09102035A - Picture processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To process plural processings in parallel at high speed and to process them even if input/output are asynchronous by executing the plural processings for respective lines and instructing the processing of the next line by the termination of the operation of all processing units. SOLUTION: The plural processing units 12-16 process the respective processings at every line of the picture, and generate signals showing the termination of the operation. When a controller 17 receives the signal showing the termination of the operation of all the processing units 12-16, it simultaneously instructs the start of the operation of one line in the next picture to all the processing units 12-16, In the processing units 12-16, they simultaneously start the operation in synchronizing with the start of the line processing instructed from the controller 17. The previous processing is terminated in all the processing units 12-16 at that time. Thus, the processing unit 14 executes the processing while it reads data whose previous processing terminates from the buffer memory of the previous processing unit 13, for example.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is applied to, for example, a color scanner system which reads an image on a document and performs a certain image processing, and then creates a film for platemaking, and a read image signal. The present invention relates to an image processing apparatus for performing preprocessing of color processing and sharpness processing, magnification / resolution conversion processing, sharpness enhancement processing, image merging / combining processing, and the like.

[0002]

2. Description of the Related Art Conventionally, in the fields of printing and plate making, an image scanning reading / reproducing system for electrically processing image information carried on an original to produce a film original plate for the purpose of rationalizing work processes and improving image quality. Widely used.

This system is basically composed of an image reading device which is an input device and an image recording device which is an output device. In this image reading device, for example, a reading scanner (scanner) which is sub-scanned and conveyed is provided. The image information used and carried on the document is photoelectrically scanned and read by a solid-state image pickup device such as a CCD and converted into an electric signal. After that, the image information photoelectrically converted by the image reading device is subjected to predetermined image processing according to the plate making conditions in the image processing device. After being subjected to a halftone processing to be converted into a halftone image, it is converted into an optical signal such as a laser beam in an image recording device and recorded on an image recording medium made of a photosensitive material such as a film.
Here, the image recording medium is developed by a predetermined developing device and is used for printing or the like as a film original plate.

In such a conventional image scanning reading / reproducing system, in the image processing device of the image reading device,
An image signal of three primary colors, for example, an image signal of three colors of red (R), green (G), and blue (B) is color-processed and converted into an image signal of four colors of Y, M, C, K, and then Then, magnification / resolution conversion processing, contour (sharpness) enhancement processing, gradation conversion processing, etc. are sequentially performed and output as image signals of four colors of Y, M, C and K to the image recording apparatus.

[0005]

By the way, in such an image processing apparatus, since it is necessary to perform such a large number of processings, these processings are processed by a pipeline processing system, and an effective processing speed is achieved. Was raised significantly. However, when a large number of processes are performed in parallel at the same time as in a pipeline system, there is a problem that the process that takes the longest time among the processes is rate-determining.
For this reason, there is a problem that the processing speed cannot be increased even when performing light processing such as processing with small data.

For example, in high magnification processing,
The processing time is set in accordance with the data size at the maximum magnification for the processing after the magnification conversion so that the processing does not exceed the set processing time. In other words, in the magnification conversion process, the amount and size of dots that have been subjected to the magnification conversion have determined the length of one line of the entire process.
In any processing, it is necessary to perform the processing of the set length of one line, and there is a problem that it takes much time. For example, even when processing very small data, all the rest will contain dummy data, and processing of one line takes time to process all data including dummy data. . Also,
There is a problem that a large-capacity memory such as a large-capacity FIFO memory is required as an input / output data buffer in order to synchronously perform input / output of the image processing apparatus.

An object of the present invention is to solve the above-mentioned problems of the prior art, and to provide an image processing apparatus for performing a plurality of processes in parallel, which can speed up the processing with a small amount of data, and enables the input / output of the apparatus. An object is to provide an image processing device that can perform processing asynchronously.

[0008]

In order to achieve the above object, the present invention is an image processing apparatus for performing a plurality of processes in parallel, and each of the plurality of processes is performed for each line, and the operation is completed. When the end of operation of all the processing units is confirmed by receiving the signals indicating the end of operation of all the plurality of processing units and the plurality of processing units having the function of generating a signal indicating An image processing apparatus is provided which has a controller for instructing to start the operation of processing of the next line.

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION An image processing apparatus according to the present invention will be described below in detail with reference to the preferred embodiments shown in the accompanying drawings.

FIG. 1 is a block diagram of an embodiment of the image processing apparatus of the present invention. As shown in the figure, the image processing apparatus 10 includes a plurality of, that is, five processing units 12, 1.
It has 3, 14, 15 and 16, and a controller 17.

Here, each of the processing units 12 to 16 performs each processing for each line of the image. Further, each of the processing units 12 to 16 has a function of generating a signal indicating the end of operation.
Further, the processing units 12 to 16 are instructed to start their operations at the same time, and are controlled so as to simultaneously start the processing of one line of the image. Controller 1
When receiving the end signal indicating that the operations of all the processing units 12 to 16 are completed from all the processing units 12 to 16, 7 simultaneously instructs all the processing units 12 to 16 to start the operation of the next image 1 line. To do.

Incidentally, such processing units 12 to 16
Each of them can be configured to have at least one line of buffer memory, preferably a toggle memory, and the operation can be ended when the writing to or the reading from these memories is completed. Therefore, the operation start of each of the processing units 12 to 16 can be the write start and the read start to these memories.

In the image processing apparatus 10 of the present invention, by configuring the processing units 12 to 16 as described above, these processing units 12 to 16 are synchronized with the start of the line processing instructed by the controller 17. Then, the operation is started all at once, but at that time, the processing units 12 to
Since the previous processing has been completed in any of the 16,
To explain each processing unit, for example, one processing unit as a representative example, the processing unit 14 reads the data for which the previous processing is completed from the previous processing unit 13, preferably while not reading the data from its buffer memory. Processing of the processing unit 14, that is, the processing of the processing unit 14,
This processing unit 14 preferably continues to write to its buffer memory.

Thus, in the processing unit 13, the image 1
When the line processing is completed, for example, when the number of data of one image line processed by a counter is counted, a processing end signal is generated and transmitted to the controller 17. Similarly, each of the processing units 12, 13, 15 and 16 also transmits to the controller 17 an end signal generated when the processing of each of the processing units 12, 13, 15, 16 is completed. Controller 17
When the processing end signals of all the processing units 12 to 16 are received, the all processing units 12 to 16 are simultaneously instructed to start the operation of the line processing, and are controlled so as to simultaneously start the operation of one line of the image. . Then, in the image processing apparatus 10, the processing units 12 to 16 and the controller 17 repeat the processing and operation as described above, and the image processing for one page is performed.

Since the image processing apparatus 10 of the present invention performs the processing operation as described above, even if it is unknown which processing unit is the rate-determining processing, the processing of one line of each image is always processed. Since it is possible to start the next processing after waiting for the operation of the processing unit that takes the longest time to finish, it is not necessary to process small data as large data, and each processing unit always processes at the highest speed. Can be done and finished.

FIG. 2 shows a block diagram of an embodiment in which the image processing apparatus of the present invention is applied to the image processing apparatus of the image reading apparatus in the image scanning reading reproduction system. As shown in the figure, the image processing apparatus 20 includes an input buffer 22 to which image data signals of three primary colors or four colors of Y, M, C, and K are input from an input 1 terminal, and an input for controlling the input buffer 22. A buffer controller 24, a color processing and sharpness preprocessing circuit (hereinafter referred to as a color processing circuit) 26, a magnification conversion line buffer 28, a magnification / resolution conversion processing circuit 30, a sharpness enhancement processing circuit 32, and image merging. A combination processing circuit 34, an output buffer 36 for outputting image-processed image data signals of four colors (Y, M, C, K) from an output terminal, an output buffer controller 38 for controlling the output buffer 36, and an input A code buffer 40 to which a code is input from two terminals, and a code buffer 40
A code input controller 42 for controlling the code data, a decompressor 44 for decompressing the code data, a line buffer 46 for holding the decompressed code data, and a controller 48 for controlling these operations.

The input buffer 22 is controlled by an input buffer controller 24, and is preferably a toggle memory capable of holding at least two lines of image data, for example, 32 KB × 4 lines dual port RAM (DPRAM). The three primary colors from the image reading device, for example, R, G, and B, or Y from the image memory such as a hard disk or another system image processing device,
An image data signal of four colors of M, C and K and an image data signal are received and held. The transfer of one line of image data between the input buffer 22 and the output buffer of the image reading device is started in response to an operation start instruction from the controller 48, and a data request (REQ) issued from the input buffer controller 24. On the other hand, it is performed by a handshake method in which a data acknowledge (ACK) is received from the image reading apparatus and started. Therefore, writing to the input buffer 22 can be performed asynchronously with the synchronization signal in the image processing apparatus 20. In addition, the input buffer controller 24 has a built-in counter, for example,
It has a function of counting the number of image data of one line of the image, generating an input end signal indicating that the input of the image data of one line to the input buffer 22 is completed, and transmitting the signal to the controller 48.

Color processing and sharpness preprocessing circuit 26
In response to an operation start instruction from the controller 48, starts to read the image data of three primary colors for one image line from the input buffer 22 as a dot-sequential serial signal. The color processing circuit 26 performs parallel conversion on the read image data of the three primary colors, and then performs color correction (color correction) processing, gradation conversion, and 3 conversion using a look-up table or the like.
-4 conversion or the like to convert into image data of four colors of Y, M, C, and K, and a look-up table or the like is used for the signal read from the input buffer 22 and converted into a parallel signal. 3-by key conversion and matrix operation
Color signal processing such as 4 conversion is performed to perform color-processed Y,
This is a processing circuit for performing in parallel sharpness pre-processing for obtaining sharpness pre-processed image data of four colors Y, M, C, K for performing sharpness enhancement processing on image data of four colors M, C, K. When the image signal read from the input buffer 22 is image data of four colors Y, M, C, K, the color processing circuit 26 also has a function of bypassing color processing and sharpness preprocessing. Have.

The image data signals of the four colors Y, M, C and K, which have been color-processed and sharpness-preprocessed in this way, are sequentially written in the magnification conversion line buffer 28. When the writing of the image data for one line that has undergone the color processing and the sharpness preprocessing to the line buffer 28 is completed, a processing end signal is transmitted from the magnification / resolution conversion processing circuit 30 connected to the line buffer 28 to the controller 48. .

Upon receiving an operation start instruction from the controller 48, the magnification / resolution conversion processing circuit 30 starts reading dot-sequential image data for one image line from the line buffer 28. Then, this circuit 30 includes the line buffer 2
Image data of four colors for one line which has been subjected to color processing in the color processing circuit 26 and four-color image data for one line which has been subjected to sharpness preprocessing,
Alternatively, the bypassed 4-line image data is subjected to magnification conversion in the main scanning direction and resolution conversion (magnification conversion in the sub-scanning direction) by linear interpolation, respectively.
At the same time, dotted line conversion for converting Y, M, C, K dot-sequential signals into line-sequential signals is also performed. Incidentally, by separately controlling the line switching before and after the magnification conversion in the main scanning direction by the magnification / resolution conversion processing circuit 30, the magnification conversion in the sub-scanning direction by linear interpolation is also supported. In this way, the magnification
The line-sequential image data of four colors of Y, M, C, and K whose resolution has been converted is sent to the next sharpness enhancement circuit 32.

By the way, the magnification conversion line buffer 28
Is a toggle memory capable of holding at least two lines of image data, for example, a line memory of 32 KB × 2 lines. In one of the line memories of the line buffer 28, Y, M, C and K dots are sequentially subjected to color processing or sharpness preprocessing in accordance with a write address (color signal and pixel number) generated by a predetermined input synchronizing signal and color signal. Image data (%) is sequentially written. From the other line memory of the line buffer 28, Y, M, C, and K lines are sequentially line-sequentially according to a read address (output color plate signal and pixel number) generated by a predetermined output synchronization signal and output color plate signal. The image data (%) is sequentially read. The four-color line-sequential image data (%) read from the line buffer 28 is stored in the magnification / resolution conversion processing circuit 30 as described above.
After being subjected to interpolation calculation and the like and magnification / resolution conversion, it is sent to the next sharpness enhancement processing circuit 32.

Here, in the magnification / resolution conversion processing circuit 30, when the reading of the image data for one line from the magnification conversion line buffer 28 is completed, a read end signal is generated and transmitted to the controller 48. By the way, the processing from the reading of the image data for one line from the input buffer 22, the color processing and the sharpness preprocessing, and the writing of the image data for one line to the magnification conversion line buffer 28 are performed at the frequency f ₁ . The operation is controlled by the input synchronization signal. On the other hand, the processing from the reading of the image data for one line from the line buffer 28 to the magnification / resolution conversion processing, the sharpness enhancement processing, the image merging / combining processing, and the writing to the output buffer 36 are performed at the output of the frequency f ₂ . The operation is controlled by the sync signal.

Next, the sharpness enhancement processing circuit 32
In order to emphasize the contour of the image, it is generated from the four-color image data after the color processing and the magnification conversion and the four-color image data after the sharpness preprocessing and the magnification conversion, which are sent from the magnification / resolution conversion processing circuit 30. The sharpness enhancement process (edge enhancement process) is performed to add the generated USM (unsharpness mask) signal. The sharpness enhancement processing circuit 32 side also has a function of selecting and processing image data of four colors Y, M, C, and K bypassing the color processing / sharpness preprocessing circuit 26.
4 of Y, M, C and K with sharpness emphasized in this way
The color line-sequential image data is transferred to the next image merging / synthesizing circuit 34.
Sent to

Next, the image merging / combining processing circuit 34.
Reads the linework information such as register marks, comments, and borderlines from the top of the reproduced image from above. This is to synthesize the issued linework data.
The linework data is read from the line buffer 46 in synchronization with the output synchronizing signal of the frequency f ₂ . In the image merging / combining processing circuit 34, the image data of the four colors of Y, M, C, and K to which the linework data is added is written in the output buffer 36.

The output buffer 36 is composed of a toggle memory controlled by the output buffer controller 38, preferably capable of holding at least two lines of image data, for example, 128 KB × 2 lines of RAM. The image processing apparatus 20 holds the Y, M, C, and K image data that have undergone the required processing,
The image is output to an image recording apparatus for producing four plate-making films of Y, M, C and K. The transfer of the image data between the output buffer 36 and the input buffer of the image recording device is started in response to the operation start instruction from the controller 48, and the request (REQ) from the output buffer controller 38 and the image recording device. It is performed by a handshake method that starts by receiving a data acknowledge (ACK). Therefore, the output of the image data from the output buffer 36 can be performed asynchronously with the synchronization signal in the image processing device 20. Further, the output buffer controller 38 has, for example, a counter built therein, counts the number of output image data, and when one image line has been output, indicates that output of all image data for one line has been completed. A signal is generated and transmitted to the controller 48.

On the other hand, the code buffer 40 receives and holds code data of linework information such as border lines, register marks, and comments from the operation unit of the image reading apparatus of the image scanning reading reproduction system, the workstation (WS), or the like. The memory is a memory for controlling the code data, and the code data is transferred by a handshake method of receiving and starting a data acknowledge signal for a request (REQ) signal. Therefore, the writing of the code data in the code buffer 40 can be performed asynchronously with the synchronization signal in the image processing apparatus 20. Then, the code input controller 42 starts the input of the code data to the code buffer 40 after receiving the operation start instruction signal from the controller 48, and when the input of the code data is completed, the code input controller 42 generates the input end signal to the controller 48. Send.

Next, in response to an operation start instruction from the controller 48, the code data to be combined is read out from the code buffer 40, and the decompressor 44 decompresses the code data according to the image data size to obtain one image line. The work data is written in the line work line buffer 46. Here, the reading of the code data from the code buffer 40, the expansion of the data by the expander 44, and the writing of the linework data to the line buffer 46 are operated by the synchronization signal of the frequency f ₃ . Then, when the writing of the line work data for one line of the image to the line buffer 46 is completed, the decompressor 44 generates a line processing end signal and transmits it to the controller 48.

The controller 48 sends an input end signal from the input buffer controller 24 to the input buffer 22,
A write end (processing end) signal and a read end (processing end) signal from the magnification / resolution conversion processing circuit 30 to the magnification conversion line buffer, an output end signal from the output buffer controller 38 from the output buffer 36, and a code input controller 42 When the input end signal to the code buffer 40 and the write end (processing end) signal to the line work line buffer 46 are received from the decompressor 44 and all of these end signals are received,
That is, when the slowest signal of these end signals is received, the input buffer controller 24, the color processing / sharpness preprocessing circuit 26, the magnification / resolution conversion processing circuit 30, the output buffer controller 38, the code input controller 42, and the decompressor. A signal for instructing the operation start of the processing of the image data of the next line is issued to each 44, and at the same time, the operation start is instructed.

Here, the color processing which operates with the synchronizing signal of frequency f ₁ and the processing from the reading from the input buffer to the writing to the line buffer 28 by the sharpness preprocessing circuit 26, the magnification which operates with the synchronizing signal of frequency f ₂ The reading from the line buffer 28 by the resolution conversion processing circuit 30 and the processing from the reading from the line buffer 46 to the writing to the output buffer 36 by the image merging / combining processing circuit 34, and the expansion that operates with the synchronization signal of the frequency f _3. From the code buffer 40 to the writing to the line buffer 46 by the device 44, and device input / output performed asynchronously with these processes, that is, from the input buffer 22 and the code buffer 40 and from the output buffer 36. Output is the processing unit of the present invention. It is a process by Tsu door. Therefore,
These processes simultaneously start the operation of the next one line in response to an operation start instruction from the controller 48 in each processing unit.

Next, each processing unit processes one line of image data, and when the processing is completed, it is transmitted to the controller 48, and when all the processing units are completed, each processing unit completes the next one line of image data. The process of 1 is repeated at the same time. In this way, each processing unit simultaneously starts the operation in synchronization with the start of the line processing, but at this point the processing of one line before each processing unit is always completed, so that the next processing unit: While reading the image data of one line of the processing unit before the end, it processes and writes it in the buffer,
All you have to do is issue an end signal. Since the image processing apparatus of the present invention is configured as described above, it is possible to perform processing even if the input and output of the apparatus are asynchronous, and it is possible to speed up processing with small data.

The image processing apparatus according to the present invention is basically configured as described above, but the present invention is not limited to this, and improvements and design changes are made without departing from the gist of the present invention. Of course, it is possible.

[0032]

As described in detail above, according to the present invention,
CPU bus used for processing load, speed, fluctuations of external factors (for example, input / output) by each processing unit, especially for stopping or suspending the interface of a computer (CPU) that operates a system or device, or for other processing Even for fluctuations such as when it becomes impossible, the most optimal time can be automatically assigned to each process, and the process can always be performed at the highest speed.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of an image processing apparatus according to the present invention.

FIG. 2 is a block diagram of a specific embodiment of the image processing apparatus according to the present invention.

[Explanation of symbols]

 10, 20 Image processing device 12, 13, 14, 15, 16 Processing unit 17, 48 Controller 22 Input buffer 24 Input buffer controller 26 Color processing / sharpness preprocessing circuit 28 Magnification conversion line buffer 30 Magnification / resolution conversion processing circuit 32 Sharpness enhancement processing circuit 34 Image merging / synthesis processing circuit 36 Output buffer 38 Output buffer controller 40 Code buffer 42 Code input controller 44 Expander 46 Linework line buffer

Claims (1)

[Claims] 1. An image processing apparatus for performing a plurality of processes in parallel, comprising a plurality of processing units each having a function of performing each of the plurality of processes line by line and generating a signal indicating the end of operation. When receiving the signal indicating the operation end of the plurality of processing units of, and confirming the operation end of all the processing units,
An image processing apparatus comprising: a controller for instructing all of a plurality of processing units to start operation of processing of a next line.