JPH03132104A - Equalizer - Google Patents

Equalizer

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Publication number
JPH03132104A
JPH03132104A JP27106389A JP27106389A JPH03132104A JP H03132104 A JPH03132104 A JP H03132104A JP 27106389 A JP27106389 A JP 27106389A JP 27106389 A JP27106389 A JP 27106389A JP H03132104 A JPH03132104 A JP H03132104A
Authority
JP
Japan
Prior art keywords
type
correlation matrix
signal
equalization
adaptive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP27106389A
Other languages
Japanese (ja)
Other versions
JP2986488B2 (en
Inventor
Hiroshi Suzuki
博 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
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Priority to JP1271063A priority Critical patent/JP2986488B2/en
Publication of JPH03132104A publication Critical patent/JPH03132104A/en
Application granted granted Critical
Publication of JP2986488B2 publication Critical patent/JP2986488B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Filters That Use Time-Delay Elements (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Noise Elimination (AREA)

Abstract

PURPOSE:To obtain an equalizer suitable for compensation of the characteristic of a transmission line whose delay distortion is timewise varied by selecting two adaptive equalization algorithms as error vector type and correlation matrix modification type. CONSTITUTION:Storage means 10, 11 storing respectively an input signal and a decision output are provided, and a means 7 switching two adaptive equaliza tion algorithms as error vector type and correlation matrix modification type and executing the algorithm and means 6-8 applying the training of correlation matrix modification type with a signal stored in the storage means 10, 11 when the algorithm is selected from the error vector type into correlation matrix modification type are provided. When the adaptive equalization algorithms is selected from the error vector type and correlation matrix modification type, a reproduction signal obtained by the equalization of the error vector type is used a reference signal and the reference signal is used to apply training of the correlation matrix modification type. Thus, since the algorithm of correla tion matrix modification type is applied when the characteristic change in the transmission line is fast, the equalization error is decreased and the deteriora tion in the transmission characteristic is suppressed small.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は伝送路の遅延歪が時間的に変化する伝送路の特
性を補償する等化器に関する。本発明は特に、携帯無線
機などの移動無線に利用するに適する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an equalizer that compensates for characteristics of a transmission line in which delay distortion of the transmission line changes over time. The present invention is particularly suitable for use in mobile radios such as portable radios.

本発明は、伝送路の特性を補償する等化器において、相
関行列修正形と誤差ベクトル形との二つの適応アルゴリ
ズムを切り替えて使用することにより、伝送路の特性変
動が緩やかなときには低電力のアルゴリズムを利用し、
特性変動が激しいときには誤差の小さいアルゴリズムを
利用するものである。
The present invention uses two adaptive algorithms, a correlation matrix correction type and an error vector type, in an equalizer that compensates for the characteristics of the transmission path, thereby reducing power consumption when the characteristics of the transmission path vary slowly. Using an algorithm,
When the characteristic fluctuations are severe, an algorithm with small error is used.

〔従来の技術〕[Conventional technology]

信号が線形歪を受けているとき、その信号を取り出すた
めに、従来から等化器が用いられる。歪の状態は時間的
に変化するので、等化器の状態を適応的に変化させる必
要がある。
When a signal is subjected to linear distortion, an equalizer is conventionally used to extract the signal. Since the state of distortion changes over time, it is necessary to adaptively change the state of the equalizer.

第3図は従来の等化器の一例の回路図を示す。FIG. 3 shows a circuit diagram of an example of a conventional equalizer.

入力端子1には歪を含む信号が入力される。この信号は
等化処理回路2に入力される。
A signal containing distortion is input to the input terminal 1. This signal is input to the equalization processing circuit 2.

等化処理回路2はトランスバーサルフィルタで構成され
、8段接続された遅延回路21、各タップに設けられた
N+1個の乗算器22および各乗算器22の出力を加算
する加算器23を備える。遅延回路21は、入力信号を
それぞれTずつ遅延させる。時刻nにおける入力信号を
x (n)とすると、遅延回路21の各遅延出力はx 
(n−1)・・・x (n−N) となる。入力信号x
 (n)および遅延出力X (n−1) ・−x (n
−N)は、乗算器22によりそれぞれタップ係数c o
 (n)・・・CM(n)が乗算され、加算器23で加
算される。これにより、等化信号Y (n)が得られる
。等化信号Y (n)は、Y(n)=Co(n) x(
t)+C+  x(n−1) +・・・+ C* (n
) x (n−N) で表される。
The equalization processing circuit 2 is composed of a transversal filter, and includes delay circuits 21 connected in eight stages, N+1 multipliers 22 provided at each tap, and an adder 23 that adds the outputs of the multipliers 22. The delay circuit 21 delays each input signal by T. When the input signal at time n is x (n), each delayed output of the delay circuit 21 is x
(n-1)...x (n-N). input signal x
(n) and delayed output X (n-1) ・-x (n
-N) are each tapped coefficient co by the multiplier 22.
(n)...CM(n) is multiplied and added by the adder 23. As a result, an equalized signal Y (n) is obtained. The equalized signal Y(n) is expressed as Y(n)=Co(n) x(
t)+C+ x(n-1) +...+ C* (n
) x (n-N).

等化信号Y (n)は、判定回路3によりディジタルの
判定信号Z (n)に変換される。判定誤りがなければ
、判定信号Z (n)は、歪や雑音などによる劣化のな
い理想受信波形とみなされる。
The equalized signal Y (n) is converted by the determination circuit 3 into a digital determination signal Z (n). If there is no judgment error, the judgment signal Z (n) is regarded as an ideal received waveform without deterioration due to distortion or noise.

判定信号Z (n)は、出力端子4から出力されるとと
もに、スイッチ回路5を介して誤差演算回路6に供給さ
れる。誤差演算回路6は、 e (n)= Z (n) −Y(n)により等化信号
Y (n)の誤差e (n)を算出する。このようにし
て求めた誤差e (n)と、入力信号x (n)および
遅延出力X (n−1)・・・x (n−N)を用いて
、適応処理回路7によりタップ係数C3(n)・・・C
、(n)を更新する。
The determination signal Z (n) is output from the output terminal 4 and is also supplied to the error calculation circuit 6 via the switch circuit 5 . The error calculation circuit 6 calculates the error e (n) of the equalized signal Y (n) using e (n)=Z (n) - Y(n). Using the error e (n) obtained in this way, the input signal x (n) and the delayed outputs X (n-1)...x (n-N), the adaptive processing circuit 7 uses the tap coefficient C3 ( n)...C
, (n).

このようなプロセスにおいて、等化器が動作を開始する
初期においては、タップ係数は正しい値には設定されて
いない。このため、加算器23の出力を判定回路3に入
力しても、判定信号Z (n)は正しい信号とはならな
い。そこで、初期状態を設定するために、送信側と受信
側とで取り決めたトレーニング信号を送信側から送信し
、受信側では、スイッチ回路5を切り替え、トレーニン
グ信号発生回路8からの信号を誤差演算回路6に人力す
る。
In such a process, the tap coefficients are not set to correct values at the initial stage when the equalizer starts operating. Therefore, even if the output of the adder 23 is input to the determination circuit 3, the determination signal Z (n) will not be a correct signal. Therefore, in order to set the initial state, a training signal agreed upon between the transmitting side and the receiving side is transmitted from the transmitting side, and on the receiving side, the switch circuit 5 is switched, and the signal from the training signal generation circuit 8 is sent to the error calculation circuit. 6 to use human power.

これにより誤差演算回路6は、等化信号Y (n)とト
レーニング信号とを比較し、正確な誤差を求める。
Thereby, the error calculation circuit 6 compares the equalized signal Y (n) and the training signal to obtain an accurate error.

このようなトレーニング過程により、等化器の内部状態
を高速に設定できる。
Through such a training process, the internal state of the equalizer can be set quickly.

このような等化器の適応等化アルゴリズムとしては、誤
差ベクトル形と相関行列修正形とがよく知られている。
As adaptive equalization algorithms for such equalizers, error vector type and correlation matrix correction type are well known.

誤差ベクトル形の適応等化アルゴリズムでは、誤差e 
(n)と、各乗算器22の入力信号とを乗算し、その積
をその時点におけるタップ係数値に加算してその係数を
更新する。このアルゴリズムでは、その時点における誤
差e (n)と、入力信号x (n)および遅延出力X
 (n−1)・・・x (n−N)  とを用いて、タ
ップ係数更新分の計算を行う。この計算には他の信号は
不要である。
In the error vector type adaptive equalization algorithm, the error e
(n) by the input signal of each multiplier 22, and the product is added to the tap coefficient value at that time to update the coefficient. In this algorithm, the error e (n) at that point, the input signal x (n) and the delayed output X
(n-1)...x (n-N) is used to calculate the tap coefficient update amount. No other signals are required for this calculation.

通常は、入力信号x (n)および遅延出力X (n−
1)・・・x (n−N)を入力ベクトル、タップ係数
値を係数ベクトルでそれぞれ表し、これらを用いてベク
トル演算を行う。このとき誤差ベクトル形のアルゴリズ
ムでは、誤差を二乗した評価関数Jを係数ベクトルで偏
微分し、これにより得られる評価関数Jの最大勾配方向
に等化器の状態を推移させる。
Typically, the input signal x (n) and the delayed output X (n-
1) . . . x (n-N) is represented as an input vector, the tap coefficient value is represented as a coefficient vector, and vector calculation is performed using these. At this time, in the error vector type algorithm, the evaluation function J obtained by squaring the error is partially differentiated by a coefficient vector, and the state of the equalizer is shifted in the direction of the maximum gradient of the evaluation function J obtained thereby.

誤差ベクトル形アルゴリズムの代表的なものとしては、
最小平均二乗法(Least Mean 5quare
s。
Typical error vector algorithms include:
Least Mean Squares
s.

以下rLSM法」という)が知られている。実用的には
、計算を簡単にするため誤差を量子化するなどの変形法
が用いられている。
The rLSM method (hereinafter referred to as "rLSM method") is known. In practice, modified methods such as quantizing errors are used to simplify calculations.

この一方で相関行列修正形のアルゴリズムでは、入力信
号X (n)と遅延出力X (n−1>・・・x (n
−N) とを用いて入力信号の自己相関行列またはその
逆行列を算出し、この行列を逐次更新しながらタップ係
数を更新する。
On the other hand, in the correlation matrix modified algorithm, the input signal X (n) and the delayed output X (n-1>...x (n
-N) is used to calculate the autocorrelation matrix or its inverse matrix of the input signal, and update the tap coefficients while sequentially updating this matrix.

この方法は、初期設定時から現時点までの全信号、すな
わち遅延回路21から出力される信号より以前の信号を
も考慮して、誤差e (n)が最小になるように最小二
乗法を逐次的に適用する。したが−って、誤差ベクトル
形と異なり、その時点における誤差e (n)と、入力
信号x (n)および遅延出力x(n−1)・・・x 
(n−N)とからだけでは、係数更新分の計算はできな
い。さらに、自己相関行列またはその逆行列を必要とす
る。この行列を信号系列の平均処理で求めるために、ト
レーニング過程が必要である。
This method takes into account all signals from the initial setting up to the present time, that is, signals before the signal output from the delay circuit 21, and sequentially performs the least squares method so that the error e (n) is minimized. apply to Therefore, unlike the error vector type, the error e (n) at that point, the input signal x (n) and the delayed output x (n-1)...x
(n-N) alone cannot calculate the coefficient update amount. Furthermore, it requires an autocorrelation matrix or its inverse. A training process is required to obtain this matrix by averaging the signal sequence.

相関行列修正形アルゴリズムの代表的なものとしては、
逐次最小二乗法(Recursive Least 5
qu−ares、以下rRLS法」という)が知られて
いる。
Typical correlation matrix modified algorithms include:
Recursive Least 5
qu-ares (hereinafter referred to as "rRLS method") is known.

また、この他に、適当な時定数を導入した指数重み付け
RLS法、計算量を削減した高速RLS法、ラティス法
などが知られている。詳しくは、オルファニディス著マ
グロウヒル社刊「オプティマム・シグナル・プロセッシ
ング」第2版(S、J、 0rfani−dis: O
ptimum Signal Processing、
 2nd editionMacGraw−Hill)
  に説明されている。
In addition, the exponentially weighted RLS method that introduces an appropriate time constant, the high-speed RLS method that reduces the amount of calculation, the lattice method, and the like are known. For more information, see "Optimum Signal Processing" by Orfanidis, McGraw-Hill, 2nd edition (S, J, Orfani-dis: O
ptimum Signal Processing,
2nd editionMacGraw-Hill)
is explained in.

以下では、説明を具体的に進めるため、誤差ベクトル形
についてはLMS法、相関行列修正形についてはRLS
法を例に説明する。
Below, in order to proceed with the explanation concretely, we will use the LMS method for the error vector type and the RLS method for the correlation matrix modified type.
This will be explained using the law as an example.

第4図はLMS法とRLS法との特性を示し、初期のリ
セット状態から等什器の誤差が変化するようすの概略を
示す。
FIG. 4 shows the characteristics of the LMS method and the RLS method, and shows an outline of how the uniformity error changes from the initial reset state.

LMS法とRLS法とを比較すると、LMS法は演算量
が少なく簡易な方法であるが、RLS法に比べると、等
化および適応の性能が劣っている。第4図に示した例を
参照すると、RLS法では誤差が収束するまでの時間が
t、であるのに対し、LMS法ではt、の時間を要する
。ただし、t、の値はt。
Comparing the LMS method and the RLS method, the LMS method is a simple method with a small amount of calculations, but the performance of equalization and adaptation is inferior to the RLS method. Referring to the example shown in FIG. 4, it takes t for the error to converge in the RLS method, while it takes t in the LMS method. However, the value of t is t.

の数十倍である。また、LMS法の定常誤差ε、もRL
S法の定常誤差ε8より大きい。
This is several tens of times higher. In addition, the steady-state error ε of the LMS method is also RL
It is larger than the steady-state error ε8 of the S method.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

このようにLMS法とRLS法とにはそれぞれ長所短所
があるので、歪の状態が不規則に変化しているときや変
動が速いときにはRLS法、変動が緩やかなときにはI
JIs法を用いることがよい。特に機器の低消費電力化
が要求される場合には、アルゴリズムが簡単なLMS法
が望ましいが、変動が激しい場合にはRLS法を使用せ
ざるをえない。そこで、LMS法とRLS法とを切り替
えて等化処理を行うことが望ましい。しかし、等化処理
の途中で適応アルゴリズムを切り替える方法は、従来知
られていなかった。
In this way, the LMS method and the RLS method each have their advantages and disadvantages, so when the strain state is changing irregularly or rapidly changing, the RLS method is used, and when the fluctuation is gradual, the I
It is preferable to use the JIs method. In particular, when low power consumption of equipment is required, the LMS method with a simple algorithm is desirable, but when fluctuations are severe, the RLS method must be used. Therefore, it is desirable to perform equalization processing by switching between the LMS method and the RLS method. However, a method of switching the adaptive algorithm in the middle of equalization processing has not been known in the past.

本発明は、誤差ベクトル形と相関行列修正形との二つの
適応等化アルゴリズムを切り替え可能な等什器を提供す
ることを目的とする。
An object of the present invention is to provide an equalizer that can switch between two adaptive equalization algorithms: an error vector type and a correlation matrix correction type.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の等什器は、入力信号と判定出力とをそれぞれ蓄
える記憶手段を備え、適応処理手段として、相関行列修
正形と誤差ベクトル形との二つの適応等化アルゴリズム
を切り替えて実行する手段と、誤差ベクトル形から相関
行列修正形に切り替えるときに記憶手段に蓄えられた信
号により相関行列修正形のトレーニングを行う手段とを
備えたことを特徴とする。
The equalizer of the present invention includes storage means for respectively storing input signals and determination outputs, and means for switching and executing two adaptive equalization algorithms, a correlation matrix correction type and an error vector type, as an adaptive processing means; The present invention is characterized by comprising means for training the correlation matrix modification type using a signal stored in the storage means when switching from the error vector type to the correlation matrix modification type.

〔作 用〕[For production]

誤差ベクトル形から相関行列修正形へ適応等化アルゴリ
ズムを切り替えるときに、誤差ベクトル形で等化したと
きに得た再生信号を基準信号とし、この基準信号を用い
て相関行列修正形アルゴリズムのトレーニングを行う。
When switching the adaptive equalization algorithm from the error vector type to the correlation matrix correction type, the reproduced signal obtained when equalizing with the error vector type is used as a reference signal, and this reference signal is used to train the correlation matrix correction type algorithm. conduct.

これにより、従来のように単一のアルゴリズムを使用す
るのではなく、異なる適応等化アルゴリズムを切り替え
て使用することかできる。
This makes it possible to switch between different adaptive equalization algorithms instead of using a single algorithm as in the past.

〔実施例〕〔Example〕

第1図は本発明実施例の等什器のブロック構成図である
FIG. 1 is a block diagram of a fixture according to an embodiment of the present invention.

この等什器は、入力信号に対する伝送特性を等化する等
化処理回路2と、この等化処理回路2の出力する等化信
号から入力信号の符号を判定する判定回路3と、この判
定回路30判定出力と等化信号との差が小さくなるよう
に等化処理回路2の特性を適応的に設定する適応処理手
段として誤差演算回路6および適応処理回路7とを備え
る。
This equipment includes an equalization processing circuit 2 that equalizes the transmission characteristics of an input signal, a determination circuit 3 that determines the sign of the input signal from the equalized signal output from the equalization processing circuit 2, and this determination circuit 30. An error calculation circuit 6 and an adaptive processing circuit 7 are provided as adaptive processing means for adaptively setting the characteristics of the equalization processing circuit 2 so that the difference between the judgment output and the equalization signal becomes small.

ここで本実施例の特徴とするところは、入力信号と判定
出力とをそれぞれ蓄えるバッファメモリ10およびメモ
リ回路11を備え、適応処理回路7は、相関行列修正形
と誤差ベクトル形との二つの適応等化アルゴリズムを切
り替えて実行する手段と、誤差ベクトル形から相関行列
修正形に切り替えるときにバッファメモリ10およびメ
モリ回路11に蓄えられた信号により相関行列修正形の
トレーニングを行う手段とを含むことにある。
Here, the feature of this embodiment is that it is equipped with a buffer memory 10 and a memory circuit 11 that store input signals and judgment outputs, respectively, and that the adaptive processing circuit 7 has two types of adaptive processing: a correlation matrix correction type and an error vector type. The present invention includes means for switching and executing the equalization algorithm, and means for training the correlation matrix correction type using signals stored in the buffer memory 10 and the memory circuit 11 when switching from the error vector type to the correlation matrix correction type. be.

入力端子1には波形歪を有する信号が入力され、この信
号はバッファメモリ10に蓄積される。等化処理回路2
はバッファメモリlOから入力信号x (n)を読み出
し、等化信号Y (n)を出力する。判定回路4はこの
等化信号Y (n)をディジタル判定信号Z (n)に
変換し、出力端子4に出力する。
A signal having waveform distortion is input to the input terminal 1, and this signal is stored in the buffer memory 10. Equalization processing circuit 2
reads the input signal x (n) from the buffer memory lO and outputs the equalized signal Y (n). The determination circuit 4 converts this equalized signal Y (n) into a digital determination signal Z (n) and outputs it to the output terminal 4.

スイッチ回路5は、定常的な等化動作を行っているとき
には判定信号Y (n)を選択し、これを誤差演算回路
6に接続する。誤差演算回路6はスイッチ回路5から供
給される信号の波形を理想波形とみなし、等化信号Y 
(n)との誤差e (n)を算出する。
The switch circuit 5 selects the determination signal Y (n) when performing a steady equalization operation, and connects it to the error calculation circuit 6. The error calculation circuit 6 regards the waveform of the signal supplied from the switch circuit 5 as an ideal waveform, and converts it into an equalized signal Y.
Calculate the error e (n) with (n).

適応処理回路7は、この誤差e (n)の値に基づいて
等化処理回路2の各タップ係数を設定する。
The adaptive processing circuit 7 sets each tap coefficient of the equalization processing circuit 2 based on the value of this error e (n).

以上の動作はLMS法とRLS法とで共通である。The above operation is common to the LMS method and the RLS method.

次に、第2図に示すフレーム構成の信号を等化する場合
を例に本実施例の動作を説明する。
Next, the operation of this embodiment will be explained using an example in which a signal having a frame structure shown in FIG. 2 is equalized.

第2図に例示したフレーム構成では、長さT。In the frame configuration illustrated in FIG. 2, the length is T.

のトレーニング信号がフレームの先頭に配置されている
。このトレーニング信号に対して適応処理回路7は、収
束性能のよいRLS法で等化処理回路2のタップ係数を
設定する。このときスイッチ回路5は、トレーニング信
号発生回路8からの信号を選択し、これを誤差演算回路
6に接続する。トレーニング終了後は、スイッチ回路5
を切り替えて、判定回路3の判定出力Z (n)を誤差
演算回路6に接続する。
training signal is placed at the beginning of the frame. For this training signal, the adaptive processing circuit 7 sets the tap coefficients of the equalization processing circuit 2 using the RLS method with good convergence performance. At this time, the switch circuit 5 selects the signal from the training signal generation circuit 8 and connects it to the error calculation circuit 6. After training, switch circuit 5
is switched, and the judgment output Z (n) of the judgment circuit 3 is connected to the error calculation circuit 6.

伝送路の変化が緩やかなときには、Vlの時点で適応処
理回路7がその適応等化アルゴリズムをRLS法からL
MS法に切り替える。このときには、RLS法で決定さ
れたタップ係数を初期値とし、単純にLMS法で係数を
更新する。
When the change in the transmission path is gradual, the adaptive processing circuit 7 changes its adaptive equalization algorithm from the RLS method to L at the time of Vl.
Switch to MS method. At this time, the tap coefficients determined by the RLS method are used as initial values, and the coefficients are simply updated by the LMS method.

伝送路の状況が変化し、例えば誤差e(n)’の平均値
が徐々に増加したので、720時点で適応等化アルゴリ
ズムをRLS法に切り替えるとする。RLS法を実行す
るためには、自己相関マ) IJクスが必要である。し
かし、V2の時点だけではその渣を求めることができな
い。そこで、この場合に必要なトレーニング時間TLだ
けさかのぼって再びトレーニングを行う。
Assume that the adaptive equalization algorithm is switched to the RLS method at time 720 because the transmission path situation has changed and, for example, the average value of the error e(n)' has gradually increased. In order to perform the RLS method, an autocorrelation matrix (IJ) is required. However, the residue cannot be obtained only at the time of V2. Therefore, in this case, training is performed again by going back by the necessary training time TL.

すなわち、 ■ バッファメモリ10から(V2   TL)〜V2
の信号をさかのぼって取り出し、これを等化処理回路2
に入力する。
That is, ■ From the buffer memory 10 (V2 TL) to V2
The signal is traced back and sent to the equalization processing circuit 2.
Enter.

■ 等化処理回路2のタップ係数はLMS法で求めてあ
ったV2の時点の値を初期値とする。
(2) The initial value of the tap coefficient of the equalization processing circuit 2 is the value at the time of V2 obtained by the LMS method.

■ スイッチ回路5を切り替えてメモリ回路11を誤差
演算回路6に接続し、メモリ回路11に蓄積された既判
定出力値を基準信号としてトレーニングを行う。
(2) Switch the switch circuit 5 to connect the memory circuit 11 to the error calculation circuit 6, and perform training using the determined output value stored in the memory circuit 11 as a reference signal.

このような動作により、自己相関マトリクスの逆行列を
得ることができる。したがって、■2の時点からRLS
法にる等化を連続的に行うことができる。
Through such an operation, an inverse matrix of the autocorrelation matrix can be obtained. Therefore, from the point of ■2, RLS
Equalization can be performed continuously.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明の等化器は、その適応等化
アルゴリズムを誤差ベクトル形と相関行列修正形とで切
り替えることができる。これにより、 (i)誤差ベクトル形の簡易アルゴリズムで十分なとき
には、相関行列修正形の適応処理を実行する回路を休止
状態とすることができる。したがって、CMO3回路で
構成すれば、低消費電力化が可能となる。
As described above, the equalizer of the present invention can switch its adaptive equalization algorithm between an error vector type and a correlation matrix correction type. As a result, (i) when the simple algorithm of the error vector type is sufficient, the circuit that executes the adaptive processing of the correlation matrix modification type can be placed in a dormant state. Therefore, by configuring with CMO3 circuits, it is possible to reduce power consumption.

(11)伝送路の特性変化が速いときには相関行列修正
形のアルゴリズムを適用できるので、等化誤差を小さく
することができ、伝送特性の劣化を小さく抑えることが
できる。
(11) Since the correlation matrix modification algorithm can be applied when the characteristics of the transmission path change rapidly, equalization errors can be reduced and deterioration of transmission characteristics can be suppressed to a small level.

などの効果がある。したがって、伝送路の波形歪が大き
くその変化が速い移動通信の携帯無線機に本発明を使用
することにより、非常に大きな効果が得られる。
There are effects such as Therefore, by applying the present invention to a portable wireless device for mobile communications in which the waveform distortion of the transmission path is large and the waveform changes quickly, a very large effect can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明実施例等化器のブロック構成図。 第2図は実施例の動作を説明する図。 第3図は従来例等化器のブロック構成図。 第4図はLMS法とRLS法との特性の差を示す図。 1・・・入力端子、2・・・等化処理回路、3・・・判
定回路、4・・・出力端子、5・・・スイッチ回路、6
・・・誤差演算回路、7・・・適応処理回路、8・・・
トレーニング信号発生回路、10・・・バッファメモリ
、11・・・メモリ回路、21・・・遅延回路、22・
・・乗算器、23・・・加算器。
FIG. 1 is a block diagram of an equalizer according to an embodiment of the present invention. FIG. 2 is a diagram explaining the operation of the embodiment. FIG. 3 is a block diagram of a conventional equalizer. FIG. 4 is a diagram showing the difference in characteristics between the LMS method and the RLS method. DESCRIPTION OF SYMBOLS 1... Input terminal, 2... Equalization processing circuit, 3... Judgment circuit, 4... Output terminal, 5... Switch circuit, 6
...Error calculation circuit, 7...Adaptive processing circuit, 8...
training signal generation circuit, 10... buffer memory, 11... memory circuit, 21... delay circuit, 22.
... Multiplier, 23... Adder.

Claims (1)

【特許請求の範囲】 1、入力信号に対する伝送特性を等化する等化処理回路
と、 この等化処理回路の出力する等化信号から上記入力信号
の符号を判定する判定回路と、 この判定回路の判定出力と上記等化信号との差が小さく
なるように上記等化処理回路の特性を適応的に設定する
適応処理手段と を備えた等化器において、 上記入力信号と上記判定出力とをそれぞれ蓄える記憶手
段を備え、 上記適応処理手段は、 相関行列修正形と誤差ベクトル形との二つの適応等化ア
ルゴリズムを切り替えて実行する手段と、誤差ベクトル
形から相関行列修正形に切り替えるときに上記記憶手段
に蓄えられた信号により相関行列修正形のトレーニング
を行う手段と を含む ことを特徴とする等化器。
[Claims] 1. An equalization processing circuit that equalizes the transmission characteristics of an input signal; a determination circuit that determines the sign of the input signal from an equalized signal output from the equalization processing circuit; and this determination circuit. an equalizer comprising adaptive processing means for adaptively setting characteristics of the equalization processing circuit so that the difference between the judgment output of the input signal and the equalization signal is small; The adaptive processing means includes a means for switching and executing two adaptive equalization algorithms, a correlation matrix correction type and an error vector type, and a means for executing the adaptive equalization algorithm by switching between the two adaptive equalization algorithms, a correlation matrix correction type and an error vector type. an equalizer comprising means for training a modified correlation matrix using the signals stored in the storage means.
JP1271063A 1989-10-17 1989-10-17 Equalizer Expired - Lifetime JP2986488B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1271063A JP2986488B2 (en) 1989-10-17 1989-10-17 Equalizer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1271063A JP2986488B2 (en) 1989-10-17 1989-10-17 Equalizer

Publications (2)

Publication Number Publication Date
JPH03132104A true JPH03132104A (en) 1991-06-05
JP2986488B2 JP2986488B2 (en) 1999-12-06

Family

ID=17494880

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1271063A Expired - Lifetime JP2986488B2 (en) 1989-10-17 1989-10-17 Equalizer

Country Status (1)

Country Link
JP (1) JP2986488B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2357938A (en) * 1999-12-24 2001-07-04 Nokia Networks Oy Selecting one of a plurality of equalisation algorithms
JP2004229282A (en) * 2003-01-21 2004-08-12 Samsung Electronics Co Ltd Tap coefficient updating method and tap coefficient updating circuit
JP2007135002A (en) * 2005-11-10 2007-05-31 Mitsubishi Electric Corp Receiver
JP2017516340A (en) * 2014-03-20 2017-06-15 華為技術有限公司Huawei Technologies Co.,Ltd. System and method for adaptive filters

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS553847A (en) * 1978-06-24 1980-01-11 Tooshiyou Plant Kk Automatic controlling method of dust supply to dust treatment apparatus
JPS556989A (en) * 1978-04-26 1980-01-18 Racal Milgo Inc High speed learning digital adaptive equalizer
JPS61184934A (en) * 1985-02-12 1986-08-18 Nippon Telegr & Teleph Corp <Ntt> Digital subscriber line two-way transmitter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS556989A (en) * 1978-04-26 1980-01-18 Racal Milgo Inc High speed learning digital adaptive equalizer
JPS553847A (en) * 1978-06-24 1980-01-11 Tooshiyou Plant Kk Automatic controlling method of dust supply to dust treatment apparatus
JPS61184934A (en) * 1985-02-12 1986-08-18 Nippon Telegr & Teleph Corp <Ntt> Digital subscriber line two-way transmitter

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2357938A (en) * 1999-12-24 2001-07-04 Nokia Networks Oy Selecting one of a plurality of equalisation algorithms
US7260162B2 (en) 1999-12-24 2007-08-21 Nokia Corporation Method and apparatus for selecting an equalization algorithm depending on the used coding algorithm or on the channel quality
JP2004229282A (en) * 2003-01-21 2004-08-12 Samsung Electronics Co Ltd Tap coefficient updating method and tap coefficient updating circuit
JP2007135002A (en) * 2005-11-10 2007-05-31 Mitsubishi Electric Corp Receiver
JP2017516340A (en) * 2014-03-20 2017-06-15 華為技術有限公司Huawei Technologies Co.,Ltd. System and method for adaptive filters

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