JPH03128337U - - Google Patents
Info
- Publication number
- JPH03128337U JPH03128337U JP3772090U JP3772090U JPH03128337U JP H03128337 U JPH03128337 U JP H03128337U JP 3772090 U JP3772090 U JP 3772090U JP 3772090 U JP3772090 U JP 3772090U JP H03128337 U JPH03128337 U JP H03128337U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- input pulses
- pulse
- gate
- pulse width
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
Landscapes
- Noise Elimination (AREA)
Description
第1図は、この考案によるノイズブランカ回路
の一実施例を示す構成図、第2図は従来のノイズ
ブランカ回路の構成図である。
1……ブランキングゲート、2……増幅回路、
3……検波回路、4……波形整形回路、5……パ
ルス弁別回路、6,8……パルス幅可変回路、9
……ブランキング禁止回路、10……ブランキン
グパルス禁止ゲート、51,52……ワンシヨツ
トマルチバイブレータ、53……AND回路。
FIG. 1 is a block diagram showing an embodiment of a noise blanker circuit according to this invention, and FIG. 2 is a block diagram of a conventional noise blanker circuit. 1...Blanking gate, 2...Amplification circuit,
3...Detection circuit, 4...Waveform shaping circuit, 5...Pulse discrimination circuit, 6, 8...Pulse width variable circuit, 9
... Blanking prohibition circuit, 10 ... Blanking pulse prohibition gate, 51, 52 ... One-shot multivibrator, 53 ... AND circuit.
Claims (1)
通過を阻止するブランキングゲート回路と、 前記入力パルスのうち所定値以内の周期をもつ
入力パルスのみを出力するパルス弁別回路と、 前記パルス弁別回路の出力のパルス幅を可変し
前記ゲート信号として前記ブランキングゲート回
路に供給するパルス幅可変回路と、 を備えて成ることを特徴とするノイズブランカ回
路。[Claims for Utility Model Registration] A blanking gate circuit that blocks the passage of input pulses by receiving a gate signal, and a pulse discrimination circuit that outputs only input pulses having a period within a predetermined value among the input pulses. A noise blanker circuit comprising: a variable pulse width circuit that varies the pulse width of the output of the pulse discrimination circuit and supplies the same as the gate signal to the blanking gate circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3772090U JPH03128337U (en) | 1990-04-10 | 1990-04-10 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3772090U JPH03128337U (en) | 1990-04-10 | 1990-04-10 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03128337U true JPH03128337U (en) | 1991-12-24 |
Family
ID=31545091
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3772090U Pending JPH03128337U (en) | 1990-04-10 | 1990-04-10 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03128337U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6246353U (en) * | 1985-09-10 | 1987-03-20 |
-
1990
- 1990-04-10 JP JP3772090U patent/JPH03128337U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6246353U (en) * | 1985-09-10 | 1987-03-20 |