JPH0312754A - Buffer memory controlling system - Google Patents

Abstract

PURPOSE:To improve the operability and the reliability of a buffer memory controlling system by using a memory package deciding circuit and a memory capacity deciding circuit and automatically deciding the capacity of a buffer memory to instruct it to a buffer memory control part. CONSTITUTION:A capacity deciding circuit 2 receives the memory package deciding signals from the memory package deciding circuits 13 of a buffer memory part 1 via an output signal line 14 to decide the memory capacity of the part 1 based on the state of each package deciding signal and sends the information showing the decided memory capacity to a memory buffer control part 3. The part 3 performs the memory access control of the part 1 based on the information on the buffer memory capacity received from the circuit 2. In such a constitution, the memory capacity of the part 1 is instructed to the part 3 via the circuit 2. Thus it is possible to omit such a constitution where the memory capacity is instructed from outside with a manual operation and also to omit the setting operation of this mechanism. As a result, the malfunctions due to a setting mistakes, etc., are eliminated and the working reliability is improved in a buffer memory control system.

Description

Detailed Description of the Invention [Purpose of the Invention (Industrial Application Field) The present invention provides a buffer memory that can have an arbitrary capacity depending on the number of memory modules installed, and a buffer memory that can be configured to have an arbitrary capacity based on an instruction of the buffer memory capacity. The present invention relates to a buffer memory control method used in a system including a buffer memory control unit that controls access.

(Prior Art) Conventionally, there have been two types: a buffer memory that can be configured with an arbitrary capacity depending on the number of memory modules installed, and a buffer memory that receives an external buffer memory capacity instruction and controls access to the buffer memory using an address range according to the instruction. In systems having a control section, an operation setting switch such as a dip switch is used as a means for externally instructing the buffer memory control section to specify the capacity.

However, with the conventional buffer memory capacity indicating means described above, each time a memory module is inserted or removed (changes the number of installed memory modules), it is necessary to reset the buffer memory capacity by setting an operation setting switch such as a dip switch. However, there were problems in terms of operability and reliability, such as the possibility of making a setting error.

(Problem to be Solved by the Invention) As described above, in the conventional buffer memory 6Q instruction means, each time a memory module is inserted or removed to change the number of installed memory modules, the operation switch such as a dip switch is operated to Since it is necessary to reset the memory capacity and there is a possibility that a setting error may occur during the setting, there are problems in terms of operability and reliability.

The present invention has been made in view of the above circumstances, and has a function of recognizing the number of memory modules mounted and instructing a buffer memory control unit to specify a capacity specific to the number of memory modules mounted, and having the function of recognizing the capacity of the buffer memory using a dip switch or the like. The present invention aims to provide a buffer memory control method that eliminates the need for setting operations, eliminates setting errors, and improves operability and reliability.

[Structure of the Invention (Means and Effects for Solving the Problems) The present invention provides a buffer memory that can have an arbitrary capacity depending on the number of memory modules installed, and a buffer memory that can be accessed with a memory size according to an externally instructed capacity. In a buffer memory system comprising a buffer memory control unit for controlling a buffer memory, a memory mounting determination circuit that recognizes the mounting state of memory modules constituting the buffer memory, and a memory mounting determination signal obtained by this circuit are also provided. and a memory capacity determination circuit that determines the capacity of the buffer memory and instructs the buffer memory control unit to determine the same capacity, and is configured to automatically determine the capacity of the buffer memory and instruct the buffer memory control unit. This eliminates the need for a mechanism for setting the capacity from the outside and for setting the capacity, making it possible to significantly improve operability and reliability.

(Example) An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

In FIG. 1, 1 is a buffer memory section having a plurality of connectors in which memory modules are mounted, 2 is a memory capacity determination circuit of the buffer memory section 1, and 3 is a circuit mounted in the buffer memory section 1. This is a buffer memory control unit that controls access to memory modules. 11 to 14 each form a component of the buffer memory section 1;
1.11. , ... are connectors (CN) 12 respectively.
．． 12. A memory module (MM) mounted in the buffer memory section 1 by being inserted into . . . , 13.
13. ... is each connector 12.12. A memory implementation determination circuit (DT) determines whether or not the memory module 11 is installed for each of the memory modules 11, 11, . This is an output signal line for a memory mounting determination signal to be supplied to the capacity determination circuit 2.

FIG. 2 shows the memory implementation determination circuit 13.13. ... is a diagram showing the circuit configuration of.

In FIG. 2, lit, 112 is a pair of terminals at specific positions used for memory mounting determination among the terminals of the memory module 11 that are circuit-connected to the terminals of the connector 12; are connected to each other via a short circuit S. Among these terminals 111 and 112, the terminal 111 may be a ground terminal of another circuit within the memory module 11. 121 and 122 are connectors 12
Among the group of terminals provided in the terminals 111. of the memory module 11. , 112.

Among these terminals 121 and 122, the terminal 121 is grounded and set to the ground (GND) level. Further, the terminal 122 is set to the VCC level via a pull-up resistor R, and is connected to the output signal line 14 of the memory mounting determination signal.

The operation of an embodiment of the present invention will now be described with reference to FIGS. 1 and 2.

When the memory module 11 is mounted on the connector 12 of the buffer memory section 1, the terminal 122 of the connector 12 to which the output signal line 14 of the memory mounting determination signal is connected is connected to the terminal 112. Short circuit S.

It is connected to the ground terminal 121 of the connector 12 through the terminal 1 [1, and becomes the ground level (here, the logic is "02").Also, when the memory module 11 is not mounted on the connector 12 of the buffer memory section ■, , the terminal 122 of the connector 12 becomes vC due to the pull-up action of the pull-up resistor R.
It is at C level (here, logic is "1").

Each connector 1 showing the mounting status of these memory modules
2.12. . . are supplied to the capacity determination circuit 2 via the output signal line 14, respectively.

When the capacity determination circuit 2 receives memory implementation determination signals from the memory implementation determination circuits 13, 13, . 1 (that is, the capacity of all memory modules mounted in the buffer memory section 1), and sends information indicating the buffer memory capacity to the buffer memory control section 3.

The buffer memory control unit 3 controls the buffer memory unit 1 according to the information indicating the buffer memory capacity received from the capacity determination circuit 2.
Performs memory access control.

As described above, by having the configuration in which the capacity determining circuit 2 instructs the buffer memory control unit 3 about the memory capacity of the buffer memory unit 1, a mechanism for instructing the memory capacity by manual operation from the outside and its It eliminates the need for setting operations, eliminates inconveniences such as malfunctions due to setting errors, and maintains highly reliable operation.

Note that the memory implementation determination circuit 13, 1 of the buffer memory section 1
3. . . . are not limited to those of the above embodiment, but in short, each connector 12 . 12°...
- Any circuit configuration may be used as long as it can obtain a determination signal indicating the mounting state of each memory module.

[Effects of the Invention] As detailed above, according to the buffer memory control method of the present invention, there is a buffer memory that can have an arbitrary capacity depending on the number of memory modules installed, and a memory size that can be configured according to an externally instructed capacity. A buffer memory system comprising: a buffer memory control unit that controls access using a memory mounting determination circuit that recognizes the mounting state of memory modules constituting the buffer memory; and a memory mounting determination signal obtained by this circuit. and a memory capacity determination circuit that determines the capacity of the buffer memory based on and instructs the buffer memory control section to determine the same capacity, and automatically determines the capacity of the buffer memory and instructs the buffer memory control section. This eliminates the need for a mechanism for setting the capacity from the outside and for setting the capacity, thereby greatly improving operability and reliability.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is a diagram showing the circuit configuration of a memory mounting determination circuit in the above embodiment. ■...Buffer memory unit, 2...Memory capacity determination circuit, 3...Buffer memory control unit, 11.11,...
...Mounted memory module (MM), 12.12
．． ...... Connector (CN), 13.13. −・
...Memory implementation determination circuit (DT), 14.14.
...Output signal line for memory implementation determination signal, 111
, 112... terminals provided on the memory module 11, 121, 122... terminals provided on the connector 12. Figure 1

Claims (1)

[Claims] In a buffer memory system comprising a buffer memory that can have an arbitrary capacity depending on the number of memory modules installed, and a buffer memory control unit that controls access to the buffer memory with a memory size according to an externally instructed capacity, The buffer memory includes means for recognizing the mounting state of the memory modules constituting the buffer memory, and means for determining the capacity of the buffer memory from the mounting state recognition information of the memory module and instructing the buffer memory controller to determine the same capacity. A buffer memory capacity control method characterized by: