JPH0312499B2 - - Google Patents

Info

Publication number
JPH0312499B2
JPH0312499B2 JP56034147A JP3414781A JPH0312499B2 JP H0312499 B2 JPH0312499 B2 JP H0312499B2 JP 56034147 A JP56034147 A JP 56034147A JP 3414781 A JP3414781 A JP 3414781A JP H0312499 B2 JPH0312499 B2 JP H0312499B2
Authority
JP
Japan
Prior art keywords
error
circuit
counter
mistaken
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56034147A
Other languages
English (en)
Japanese (ja)
Other versions
JPS57148442A (en
Inventor
Shigeharu Eguri
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP3414781A priority Critical patent/JPS57148442A/ja
Publication of JPS57148442A publication Critical patent/JPS57148442A/ja
Publication of JPH0312499B2 publication Critical patent/JPH0312499B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
JP3414781A 1981-03-10 1981-03-10 Automatic discrimination level control circuit Granted JPS57148442A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3414781A JPS57148442A (en) 1981-03-10 1981-03-10 Automatic discrimination level control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3414781A JPS57148442A (en) 1981-03-10 1981-03-10 Automatic discrimination level control circuit

Publications (2)

Publication Number Publication Date
JPS57148442A JPS57148442A (en) 1982-09-13
JPH0312499B2 true JPH0312499B2 (enrdf_load_stackoverflow) 1991-02-20

Family

ID=12406082

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3414781A Granted JPS57148442A (en) 1981-03-10 1981-03-10 Automatic discrimination level control circuit

Country Status (1)

Country Link
JP (1) JPS57148442A (enrdf_load_stackoverflow)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61111045A (ja) * 1984-11-05 1986-05-29 Nec Corp 受信装置
JP2002326224A (ja) * 2001-05-02 2002-11-12 Idemitsu Technofine Co Ltd 熱硬化性樹脂の粉砕方法、粉砕装置、粉砕システム、およびこの粉砕方法により得られた熱硬化性樹脂微粉末
JP2006121387A (ja) * 2004-10-21 2006-05-11 Nec Corp 識別再生方法および識別再生装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5264820A (en) * 1975-11-26 1977-05-28 Toshiba Corp Fsk signal reception unit

Also Published As

Publication number Publication date
JPS57148442A (en) 1982-09-13

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