JPH03124246U - - Google Patents
Info
- Publication number
- JPH03124246U JPH03124246U JP3240490U JP3240490U JPH03124246U JP H03124246 U JPH03124246 U JP H03124246U JP 3240490 U JP3240490 U JP 3240490U JP 3240490 U JP3240490 U JP 3240490U JP H03124246 U JPH03124246 U JP H03124246U
- Authority
- JP
- Japan
- Prior art keywords
- parity bit
- generating
- data
- dual port
- storage means
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000009977 dual effect Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Detection And Correction Of Errors (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Description
第１図は本考案の一実施例の構成を示すブロツ
ク図である。
主要部分の符号の説明、１……制御部、２……
メモリ部、３，４……パリテイチエツク部。
FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. Explanation of symbols of main parts, 1...control section, 2...
Memory section, 3, 4... Parity check section.
Claims (1)
Ｍであつて、前記アクセスにより書込まれるデー
タのパリテイビツトを生成する生成手段と、前記
生成手段により生成された前記パリテイビツトと
前記データとを対応させて格納する記憶手段と、
前記記憶手段から読出された前記データおよび前
記パリテイビツトによりパリテイチエツクを行う
手段とを有することを特徴とするデユアルポート
ＲＡＭ。 Dual port RA accessible from both directions
M, generating means for generating a parity bit of data written by the access, and storage means for storing the parity bit generated by the generating means and the data in correspondence;
A dual port RAM comprising means for performing a parity check using the data read from the storage means and the parity bit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3240490U JPH03124246U (en) | 1990-03-28 | 1990-03-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3240490U JPH03124246U (en) | 1990-03-28 | 1990-03-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03124246U true JPH03124246U (en) | 1991-12-17 |
Family
ID=31535378
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3240490U Pending JPH03124246U (en) | 1990-03-28 | 1990-03-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03124246U (en) |
-
1990
- 1990-03-28 JP JP3240490U patent/JPH03124246U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH03124246U (en) | ||
| JPS63107057U (en) | ||
| JPH03121894U (en) | ||
| JPH0273258U (en) | ||
| JPS6384647U (en) | ||
| JPS5894039U (en) | Memory usage status display device for small electronic calculators | |
| JPS6324747U (en) | ||
| JPS6320247U (en) | ||
| JPH033058U (en) | ||
| JPS6343291U (en) | ||
| JPH0277754U (en) | ||
| JPS63168547U (en) | ||
| JPH0214149U (en) | ||
| JPH0412162U (en) | ||
| JPH0298557U (en) | ||
| JPH0273253U (en) | ||
| JPH02149165U (en) | ||
| JPS6266301U (en) | ||
| JPS5839653U (en) | Character data writing circuit | |
| JPH03104227U (en) | ||
| JPS62175353U (en) | ||
| JPH0478659U (en) | ||
| JPH0455651U (en) | ||
| JPH0321139U (en) | ||
| JPH0267440U (en) |