JPH03123095A - Formation of conductor pattern of plated through-hole double sided printed board - Google Patents
Formation of conductor pattern of plated through-hole double sided printed boardInfo
- Publication number
- JPH03123095A JPH03123095A JP26082389A JP26082389A JPH03123095A JP H03123095 A JPH03123095 A JP H03123095A JP 26082389 A JP26082389 A JP 26082389A JP 26082389 A JP26082389 A JP 26082389A JP H03123095 A JPH03123095 A JP H03123095A
- Authority
- JP
- Japan
- Prior art keywords
- resist layer
- conductor pattern
- plated
- sheet
- double
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 title claims abstract description 33
- 230000015572 biosynthetic process Effects 0.000 title description 2
- 238000005530 etching Methods 0.000 claims abstract description 29
- 238000000034 method Methods 0.000 claims abstract description 15
- 239000007788 liquid Substances 0.000 claims abstract description 6
- 230000002093 peripheral effect Effects 0.000 claims description 24
- 239000000853 adhesive Substances 0.000 claims description 15
- 230000001070 adhesive effect Effects 0.000 claims description 15
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 239000010949 copper Substances 0.000 claims description 4
- 238000007747 plating Methods 0.000 abstract description 11
- 239000000758 substrate Substances 0.000 description 30
- 206010040844 Skin exfoliation Diseases 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000000873 masking effect Effects 0.000 description 3
- PEDCQBHIVMGVHV-UHFFFAOYSA-N Glycerine Chemical compound OCC(O)CO PEDCQBHIVMGVHV-UHFFFAOYSA-N 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- JIAARYAFYJHUJI-UHFFFAOYSA-L zinc dichloride Chemical compound [Cl-].[Cl-].[Zn+2] JIAARYAFYJHUJI-UHFFFAOYSA-L 0.000 description 2
- 239000004698 Polyethylene Substances 0.000 description 1
- 239000004372 Polyvinyl alcohol Substances 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 235000011187 glycerol Nutrition 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- -1 polyethylene Polymers 0.000 description 1
- 229920000573 polyethylene Polymers 0.000 description 1
- 229920002451 polyvinyl alcohol Polymers 0.000 description 1
- 150000003839 salts Chemical class 0.000 description 1
- 238000007790 scraping Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 235000005074 zinc chloride Nutrition 0.000 description 1
- 239000011592 zinc chloride Substances 0.000 description 1
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、スルーホールめっきが施された両面銅張積層
板にエツチングにより導体パターンを形成するスルーホ
ールにめっき両面プリント配線板の導体パターン形成方
法に関する。[Detailed Description of the Invention] [Field of Industrial Application] The present invention is directed to formation of a conductive pattern on a double-sided printed wiring board with plated through-holes, in which a conductive pattern is formed by etching on a double-sided copper-clad laminate plated with through-holes. Regarding the method.
めっきスルーホール付きの両面銅張積層板(以下単に基
板と称する。)に導体パターンをエツチングにより形成
するにあたっては、めっきスルーホールのめっきが剥離
したり、損傷したりしないようにすることが肝要であり
、それに対応した従来技術としては次の技術が知られて
いる。When forming a conductor pattern by etching on a double-sided copper-clad laminate with plated through holes (hereinafter simply referred to as the board), it is important to prevent the plating on the plated through holes from peeling off or being damaged. The following technology is known as a conventional technology corresponding to this.
1つは、第7図に示すように、めっきスルーホール(1
)にレジストインキ等のエラチンブレジス) (10)
を充填したのち、基板(2)の導体パターンを被覆する
パターンレジスト(11)を印刷し、そのパターンレジ
スト(11)を露光したのち、基板(2)に対するエツ
チング処理を行い、その後、パターンレジスト(11)
および充填した工、ソチングレジスト(lO)を除去し
、もって、充填したエツチングレジスト(10)により
めっきスルーホール(1)の周壁めっき面を保護して導
体パターンを形成しようとする方法である。One is a plated through hole (1
) with resist ink, etc.) (10)
After filling the conductive pattern of the substrate (2), a pattern resist (11) is printed to cover the conductor pattern of the substrate (2), and after exposing the pattern resist (11), an etching process is performed on the substrate (2). 11)
In this method, the filled etching resist (10) is removed, and the peripheral wall plating surface of the plated through hole (1) is protected by the filled etching resist (10) to form a conductor pattern.
2つ目は、第8図に示すように、めっきスルーホール(
1)にエツチングレジスト(10)を充填したのち、基
板(2)の表面にドライフィルム(12)を密着させ、
その状態でドライフィルム(12)の導体パターン被覆
部を露光したのち、ドライフィルム(12)の支持フィ
ルム(12A)を剥離し、その状態でドライフィルム(
12)のレジスト膜(12B)を現像したのち、基板(
2)に対するエツチング処理を行い、その後、導体パタ
ーン被覆部および充填したエツチングレジスト(10)
を除去し、もって前記の従来技術と同様にめっきを保護
しようとする方法である。Second, as shown in Figure 8, plated through holes (
1) is filled with an etching resist (10), and then a dry film (12) is closely attached to the surface of the substrate (2).
After exposing the conductive pattern covering part of the dry film (12) in this state, the support film (12A) of the dry film (12) is peeled off, and in that state, the dry film (12) is peeled off.
After developing the resist film (12B) of 12), the substrate (
2) is etched, and then the conductor pattern covering portion and the filled etching resist (10) are etched.
This method attempts to protect the plating by removing it, as in the prior art described above.
3つ目は、第9図(()、(lに示すように、前記トラ
イフィルム(12)を用いる方法において、エツチング
レジスト(10)をめっきスルーホール(1)に充填す
る工程を省き、めっきスルーホール(1)の開口を塞ぐ
導体パターン被覆部によりめっきスルーホール(1)を
保護しようとする方法である。Thirdly, as shown in FIGS. 9(a) and (l), in the method using the tri-film (12), the step of filling the plating through hole (1) with the etching resist (10) is omitted, and the plating This method attempts to protect the plated through hole (1) with a conductor pattern covering that closes the opening of the through hole (1).
4つ目は、第1O図に示すように、基板(2)の表面お
よびめっきスルーホール(1)の周壁面に液状のエツチ
ングレジスト(13)を塗布し、基板(2)表面のレジ
スト層(13)のうち導体パターン被覆部(13A)お
よび周壁面のレジスト層(13B)を露光したのち溶液
現像し、基板(2)に対するエツチング処理を行ったの
ち両レジスト層(13A)。Fourth, as shown in Figure 1O, a liquid etching resist (13) is applied to the surface of the substrate (2) and the peripheral wall surface of the plated through hole (1), and the resist layer ( Of 13), the conductor pattern covering portion (13A) and the resist layer (13B) on the peripheral wall surface were exposed and developed with a solution, and the substrate (2) was etched, and then both resist layers (13A) were formed.
(13B)を除去し、もって、レジスト層(13B)に
よりめっきスルーホール(1)を保護して導体パターン
を形成しようとする方法である。(13B) and thereby protect the plated through holes (1) with a resist layer (13B) to form a conductor pattern.
しかし、前記従来技術には次の欠点があった。 However, the prior art has the following drawbacks.
めっきスルーホールに充填したエツチングレジストによ
りそのめっきスルーホールを保護する第1、第2の穴埋
め式の従来技術によるときは、充填したエツチングレジ
ストが乾燥時の溶剤蒸発に伴い体積収縮し、第7図や第
8図に示すように、めっきスルーホールの両端に対する
マスキング不良が生じ、エツチング処理時にめっきスル
ーホールの両端部のめっきが除去され易い。しかも、エ
ツチングレジストのめっきスルーホールへの充填作業が
、めっきスルーホールにエツチングレジストを多い目に
充填したのち余分なエツチングレジストを掻取る作業と
なるため、掻取りにより基板表面にエツチングレジスト
を不必要に塗布することになる。その結果、エツチング
レジストが基板表面に残らないように掻取る必要があっ
て、作業が煩雑化する。When using the first and second hole-filling conventional techniques in which the plated through hole is protected by the etching resist filled in the plated through hole, the filled etching resist shrinks in volume as the solvent evaporates during drying, as shown in Fig. 7. As shown in FIG. 8, poor masking occurs at both ends of the plated through hole, and the plating at both ends of the plated through hole is likely to be removed during etching. Moreover, filling the plated through-holes with etching resist involves filling the plated through-holes with a large amount of etching resist and then scraping off the excess etching resist, which eliminates the need for etching resist on the substrate surface. It will be applied to. As a result, it is necessary to scrape off the etching resist so that it does not remain on the surface of the substrate, making the work complicated.
第3の従来技術によるときは、ドライフィルムのレジス
ト膜層が薄い場合やパターンフィルムの位置ずれがあっ
た場合、噴射される現像液により、めっきスルーホール
の開口を塞いでいる部分が破損するマスキング不良が生
じ易い。When using the third conventional technique, if the resist film layer of the dry film is thin or the pattern film is misaligned, the sprayed developer may damage the part blocking the opening of the plated through hole. Defects are likely to occur.
しかし、膜厚の大なるドライフィルムを用いると、導体
パターンの露光の解像度が低下する。However, when a dry film with a large thickness is used, the resolution of exposure of the conductor pattern is reduced.
また、ドライフィルムとして、未露光レジストの支持フ
ィルムへの接着力を大にし、レジスト膜層の未露光部分
を支持フィルムに接着させて支持フィルムの剥離により
除去することで基板上に露光された導体パターン被覆部
のみを残置させることができるいわゆる乾式現像タイプ
のものを用いることが改良案として考えられる。In addition, as a dry film, the adhesive strength of the unexposed resist to the support film is increased, and the unexposed portion of the resist film layer is adhered to the support film and removed by peeling off the support film, so that the conductor exposed on the substrate can be removed. An improved idea is to use a so-called dry development type in which only the pattern covering portion can remain.
ところが、この場合、現像メカニズムから膜厚を厚くす
ることに限界があり、所期のテンティングマスク性能が
低い。However, in this case, there is a limit to increasing the film thickness due to the development mechanism, and the desired tenting mask performance is low.
第4の従来技術によるときは、めっきスルーホールの周
壁面がレジスト層で覆われているものの、めっきスルー
ホールの両端開口が開放しているため、溶液現像時、現
像液が周壁面レジスト層に当たることで、その周壁面レ
ジスト層が機械的に破損する等、周壁面レジスト層の劣
化を招来してマスキング不良が生じるおそれがある。特
に、穴径に対して大喪が大なる場合、つまり、めっきス
ルーホールが細長い場合には、周壁面レジスト層に対す
る露光不良を生じ易く、露光不良の未硬化部が現像液に
より洗い流されてめっきスルーホールに対するマスキン
グ不良を招来し易い。In the case of the fourth conventional technique, although the peripheral wall surface of the plated through hole is covered with a resist layer, since both end openings of the plated through hole are open, the developer hits the peripheral wall surface resist layer during solution development. This may cause deterioration of the peripheral wall resist layer, such as mechanical damage to the peripheral wall resist layer, resulting in poor masking. In particular, when the hole diameter is large compared to the hole diameter, that is, when the plated through hole is long and narrow, poor exposure of the resist layer on the peripheral wall surface is likely to occur, and the uncured portion of the poorly exposed area is washed away by the developer, resulting in the plating through hole. This tends to lead to poor masking of holes.
本発明の目的は、上述した欠点を一掃できるスルーホー
ルにめっき両面プリント配線板の導体パターン形成方法
を提供する点にある。SUMMARY OF THE INVENTION An object of the present invention is to provide a method for forming a conductor pattern in a plated double-sided printed wiring board in through-holes, which can eliminate the above-mentioned drawbacks.
本発明によるスルーホールにめっき両面プリント配線板
の導体パターン形成方法の特徴は、めっきスルーホール
を備えた両面銅張積層板の表面およびめっきスルーホー
ルの周壁面に、紫外線照射により前記両面銅張積層板へ
の接着力とシートへの接着力とが反転する液状のエツチ
ングレジストを塗布し、前記両面銅張積層板表面に塗布
された表面レジスト層の表面に前記シートを密着させ、
その状態で前記表面レジスト層のうち導体パターン被覆
部の両面銅張積層板への接着力がシートの接着力よりも
大となり、かつ、それ以外の不要部の両面銅張積層板へ
の接着力がシートの接着力よりも小となるように表面レ
ジスト層をパターンマスクを介して紫外線で露光したの
ち、前記シートを剥離し、前記両面銅張積層板のうち前
記シートの剥離により表面レジスト層の不要部が除去さ
れた部分に対するエツチング処理を行ったのち、前記導
体パターン被覆部および周壁面レジスト層の除去を行う
点にある。The method of forming a conductor pattern on a double-sided printed wiring board with plated through-holes according to the present invention is characterized in that the surface of the double-sided copper-clad laminate with plated through-holes and the peripheral wall surface of the plated through-holes are irradiated with ultraviolet rays to form the double-sided copper-clad laminate. applying a liquid etching resist whose adhesive strength to the plate and the adhesive strength to the sheet are reversed, and bringing the sheet into close contact with the surface of the surface resist layer applied to the surface of the double-sided copper-clad laminate;
In this state, the adhesive strength of the conductor pattern covered portion of the surface resist layer to the double-sided copper-clad laminate is greater than the adhesive strength of the sheet, and the adhesive strength of the other unnecessary parts to the double-sided copper-clad laminate is greater than that of the sheet. After exposing the surface resist layer to ultraviolet light through a pattern mask so that the adhesive strength is smaller than the adhesive strength of the sheet, the sheet is peeled off, and the surface resist layer of the double-sided copper-clad laminate is peeled off. After etching is performed on the portion from which unnecessary portions have been removed, the conductive pattern covering portion and the peripheral wall surface resist layer are removed.
紫外線によるパターンの露光後に、表面レジスト層のう
ち導体パターン被覆部を基板(両面銅張積層板)に残置
させ、不要部を基板から除去する現像を行うに、表面レ
ジスト層の表面に密着させたシートに基板よりも強く不
要部を接着させるとともに、導体パターン被覆部を基板
にシートよりも強く接着させて、シートを剥離すること
により、不要部をそのシートとともに基板から剥離除去
するいわゆる乾式現像法を採用するため、現像時に周壁
面レジスト層に外力を作用させることがなく、周壁面レ
ジスト層の劣化がない。特に、表面レジスト層の導体パ
ターン被覆部および周壁面レジスト層に紫外線を照射し
て硬化させるいわゆるネガタイプの露光を行う場合は、
たとえ、周壁面レジスト層に露光不良があっても、その
現像による周壁面レジスト層の破損を皆無とできる。し
かも、液状のエツチングレジストを塗布することにより
、表面レジスト層と周壁面レジスト層とを連なる状態に
形成するため、塗布といった簡単な操作で、基板の全面
を所望厚さのエツチングレジストで覆うことができる。After exposing the pattern to ultraviolet rays, the conductor pattern covered portion of the surface resist layer is left on the substrate (double-sided copper-clad laminate), and the unnecessary portion is removed from the substrate. A so-called dry development method in which the unnecessary parts are adhered to the sheet more strongly than the substrate, the conductor pattern covering part is adhered to the substrate more strongly than the sheet, and the sheet is peeled off to remove the unnecessary parts from the substrate together with the sheet. Since this method is adopted, no external force is applied to the peripheral wall resist layer during development, and there is no deterioration of the peripheral wall resist layer. In particular, when performing so-called negative type exposure in which the conductor pattern covering portion of the surface resist layer and the peripheral wall surface resist layer are irradiated with ultraviolet rays and cured,
Even if there is an exposure defect in the peripheral wall surface resist layer, the peripheral wall surface resist layer can be completely prevented from being damaged by development. Moreover, by applying a liquid etching resist, the surface resist layer and the peripheral wall resist layer are formed in a continuous state, so the entire surface of the substrate can be covered with the etching resist of a desired thickness by a simple operation such as coating. can.
従って、本発明によれば、操作性良く、めっきスルーホ
ールのめっきを確実に保護した状態でスルーホールにめ
っき両面プリント配線板に導体パターンを形成すること
ができるようになった。Therefore, according to the present invention, it has become possible to form a conductive pattern on a plated double-sided printed wiring board in a plated through hole with good operability and in a state where the plating of the plated through hole is reliably protected.
次に本発明の実施例を示す。 Next, examples of the present invention will be shown.
両面銅張積層板(基板)を用いてスルーホールめっき両
面プリント配線板を作製するに、第1図に示すように、
先ず、スルーホールを基板に開け、スルーホールの周壁
面も含め全体に無電解銅めっきおよび電解銅めっきを施
して、めっきスルーホール(1)付きの基板(2)を作
製する。To fabricate a through-hole plated double-sided printed wiring board using a double-sided copper-clad laminate (substrate), as shown in Figure 1,
First, a through hole is formed in a substrate, and the entire surface of the through hole including the peripheral wall surface is subjected to electroless copper plating and electrolytic copper plating to produce a substrate (2) with a plated through hole (1).
次いで、第2図に示すように、前記基板(2)の表面お
よびめっきスルーホール(1)の周壁面に、紫外線照射
により硬化して、基板(2)よりもシート(4)に強く
接着する状態からシート(4)よりも基板(2)に強く
接着する状態に変化する液状のエツチングレジストを塗
布し、乾燥させて、基板(2)の表面およびめっきスル
ーホール(1)の周壁面に連続するレジスト層(3)を
形成する。Next, as shown in FIG. 2, the surface of the substrate (2) and the peripheral wall surface of the plated through hole (1) are cured by ultraviolet irradiation to adhere more strongly to the sheet (4) than to the substrate (2). A liquid etching resist that changes from a state to a state where it adheres more strongly to the substrate (2) than to the sheet (4) is applied, dried, and continuously applied to the surface of the substrate (2) and the peripheral wall surface of the plated through hole (1). A resist layer (3) is formed.
第3図に示すように、レジスト層(3)付きの0
基板(2)における表面レジスト層(3A)の表面に前
記のシート(4)を密着させる。As shown in FIG. 3, the sheet (4) is brought into close contact with the surface of the surface resist layer (3A) of the substrate (2) with the resist layer (3).
第4図に示すように、シート(4)を密着させた状態で
前記表面レジスト層(3A)の導体パターン被覆部(3
a)および周壁面レジスト層(3B)をパターンマスク
を介して紫外線で露光し、硬化させる。As shown in FIG. 4, the conductor pattern covering portion (3) of the surface resist layer (3A) is
a) and the peripheral wall surface resist layer (3B) are exposed to ultraviolet light through a pattern mask and cured.
第5図に示すように、レジスト層硬化後、表面レジスト
層(3A)からシート(4)を、それに接着する表面レ
ジスト層(3A)のうち未硬化の不要部(3b)ととも
に剥離し、表面レジスト層(3A)の不要部(3b)を
基板(2)表面から除去し、硬化した導体パターン被覆
部(3a)と周壁面レジスト層(3B)とを基板(2)
に残す。つまり、現像する。As shown in FIG. 5, after the resist layer is cured, the sheet (4) is peeled off from the surface resist layer (3A) together with the uncured unnecessary part (3b) of the surface resist layer (3A) that adheres to it. The unnecessary portion (3b) of the resist layer (3A) is removed from the surface of the substrate (2), and the hardened conductor pattern covering portion (3a) and peripheral wall surface resist layer (3B) are removed from the substrate (2).
leave it in In other words, develop it.
第6図に示すように、現像された基板(2)のうち不要
部(3b)が除去された部分に対するエツチング処理、
つまり、その部分の銅箔を除去したのち、導体パターン
被覆部(3a)および周壁面レジスト層(3B)を除去
して、導体パターン(5)が形成されたスルーホールめ
っき両面プリント配線板(A)を得る。As shown in FIG. 6, etching treatment is performed on the portion of the developed substrate (2) from which the unnecessary portion (3b) has been removed;
That is, after removing the copper foil in that area, the conductor pattern covering part (3a) and the peripheral wall surface resist layer (3B) are removed, and the through-hole plated double-sided printed wiring board (A) on which the conductor pattern (5) is formed is removed. ).
前記のように、表面レジスト層(3A)のうち未硬化部
(3b)をシート(4)とともに剥離して現像するいわ
ゆる剥離現像に用いるエツチングレジストとシート(4
)との組合せの一例を次に示す。As mentioned above, the etching resist and sheet (4) used for so-called peeling development in which the uncured portion (3b) of the surface resist layer (3A) is peeled off and developed together with the sheet (4).
) is shown below.
エツチングとしては、
ポリビニルアルコール 10重量部4−ジアゾ
ージフニニルアミン
の塩化亜鉛複塩 1乗員部
グリセリン 1重量部水
80重量部からなるものを挙げる
ことができ、シート(4)としては、ポリエチレンシー
トを挙げることができる。For etching, polyvinyl alcohol 10 parts by weight Zinc chloride double salt of 4-diazodifninylamine 1 part Glycerin 1 part by weight Water
80 parts by weight, and the sheet (4) may be a polyethylene sheet.
本発明の別実施例を以下に示す。 Another embodiment of the invention is shown below.
[1]上記実施例では、表面レジスト層(3A)のうち
導体パターン被覆部(3a)を紫外線で露光し、その露
光された導体パターン被覆部(3a)を基板(2)に残
すいわゆるネガタイプを示したが、1
本発明は、不要部(3b)を紫外線で露光し、その露光
された不要部(3b)を基板(2)から剥離するいわゆ
るポジタイプにも適用できる。もちろん、このポジタイ
プとする場合には、エツチングレジストとして1、露光
によりシート(4)への接着力が基板(2)への接着力
よりも強(なるものを選定する。[1] In the above embodiment, the conductor pattern covering portion (3a) of the surface resist layer (3A) is exposed to ultraviolet rays, and the exposed conductor pattern covering portion (3a) is left on the substrate (2) in a so-called negative type. However, the present invention can also be applied to a so-called positive type in which the unnecessary portion (3b) is exposed to ultraviolet light and the exposed unnecessary portion (3b) is peeled off from the substrate (2). Of course, in the case of this positive type, the etching resist 1 is selected such that the adhesive force to the sheet (4) upon exposure is stronger than the adhesive force to the substrate (2).
[2]尚、特許請求の範囲の項に図面との対照を便利に
する為に符号を記すが、該記入により本発明は添付図面
の構造に限定されるものではない。[2] Note that although reference numerals are written in the claims section for convenience of comparison with the drawings, the present invention is not limited to the structure of the attached drawings by the entry.
第1図乃至第6図は本発明に係るスルーホールにめっき
両面プリント配線板の導体パターン形成方法の実施例を
示す各工程の断面図であり、第7図、第8図、第1O図
は従来例を示す断面図、第9図(イ)、(0)は従来例
を示す各工程の断面図である。
(1)・・・・・・めっきスルーホール、(2)・・・
・・・両面銅張積層板、(3A)・・・・・・表面レジ
スト層、(4)・・・・・・2
シート、(3a)・・・・・・導体パターン被覆部、(
3B)・・・・・・周壁面レジスト層、(3b)・・・
・・・不要部。1 to 6 are cross-sectional views of each process showing an embodiment of the method for forming a conductor pattern on a double-sided printed wiring board plated in through holes according to the present invention, and FIGS. 7, 8, and 1O are 9A and 9B are cross-sectional views showing each process in the conventional example. (1)...Plated through hole, (2)...
...Double-sided copper-clad laminate, (3A)...Surface resist layer, (4)...2 sheet, (3a)...Conductor pattern covering part, (
3B)... Peripheral wall surface resist layer, (3b)...
...Unnecessary part.
Claims (1)
)の表面およびめっきスルーホール(1)の周壁面に、
紫外線照射により前記両面銅張積層板(2)への接着力
とシート(4)への接着力とが反転する液状のエッチン
グレジストを塗布し、前記両面銅張積層板(1)表面に
塗布された表面レジスト層(3A)の表面に前記シート
(4)を密着させ、その状態で前記表面レジスト層(3
A)のうち導体パターン被覆部(3a)の両面銅張積層
板(2)への接着力がシート(4)の接着力よりも大と
なり、かつ、それ以外の不要部(3b)の両面銅張積層
板(2)への接着力がシート(4)の接着力よりも小と
なるように表面レジスト層(3A)をパターンマスクを
介して紫外線で露光したのち、前記シート(4)を剥離
し、前記両面銅張積層板(2)のうち前記シート(4)
の剥離により表面レジスト層(3A)の不要部(3b)
が除去された部分に対するエッチング処理を行ったのち
、前記導体パターン被覆部(3a)および周壁面レジス
ト層(3B)の除去を行うスルーホールめっき両面プリ
ント配線板の導体パターン形成方法。Double-sided copper clad laminate (2) with plated through holes (1)
) and the surrounding wall of the plated through hole (1),
A liquid etching resist whose adhesive strength to the double-sided copper-clad laminate (2) and the adhesive strength to the sheet (4) are reversed by ultraviolet irradiation is applied to the surface of the double-sided copper-clad laminate (1). The sheet (4) is brought into close contact with the surface of the surface resist layer (3A), and in this state, the surface resist layer (3A) is
Among A), the adhesive strength of the conductor pattern covering part (3a) to the double-sided copper-clad laminate (2) is greater than the adhesive strength of the sheet (4), and the double-sided copper of the other unnecessary part (3b) After exposing the surface resist layer (3A) to ultraviolet light through a pattern mask so that the adhesive force to the stretched laminate (2) is smaller than that of the sheet (4), the sheet (4) is peeled off. and the sheet (4) of the double-sided copper-clad laminate (2).
Unnecessary parts (3b) of the surface resist layer (3A) are removed due to peeling of
A method for forming a conductor pattern on a through-hole plated double-sided printed wiring board, in which the conductor pattern covering portion (3a) and the peripheral wall surface resist layer (3B) are removed after etching the portion from which the conductor pattern has been removed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP26082389A JPH03123095A (en) | 1989-10-04 | 1989-10-04 | Formation of conductor pattern of plated through-hole double sided printed board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP26082389A JPH03123095A (en) | 1989-10-04 | 1989-10-04 | Formation of conductor pattern of plated through-hole double sided printed board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03123095A true JPH03123095A (en) | 1991-05-24 |
Family
ID=17353259
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP26082389A Pending JPH03123095A (en) | 1989-10-04 | 1989-10-04 | Formation of conductor pattern of plated through-hole double sided printed board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03123095A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11232412B2 (en) | 2014-10-03 | 2022-01-25 | Ecoatm, Llc | System for electrically testing mobile devices at a consumer-operated kiosk, and associated devices and methods |
-
1989
- 1989-10-04 JP JP26082389A patent/JPH03123095A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11232412B2 (en) | 2014-10-03 | 2022-01-25 | Ecoatm, Llc | System for electrically testing mobile devices at a consumer-operated kiosk, and associated devices and methods |
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