JPH03123061A - Mounting of semiconductor device - Google Patents

Mounting of semiconductor device

Info

Publication number
JPH03123061A
JPH03123061A JP26178389A JP26178389A JPH03123061A JP H03123061 A JPH03123061 A JP H03123061A JP 26178389 A JP26178389 A JP 26178389A JP 26178389 A JP26178389 A JP 26178389A JP H03123061 A JPH03123061 A JP H03123061A
Authority
JP
Japan
Prior art keywords
semiconductor device
circuit board
positioning
hole
mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26178389A
Other languages
Japanese (ja)
Inventor
Sueo Shinbashi
新橋 末男
Akihiro Yakuwa
八鍬 明弘
Shiyoujirou Taniguchi
谷口 昌司郎
Katsuya Fujii
克弥 藤井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP26178389A priority Critical patent/JPH03123061A/en
Publication of JPH03123061A publication Critical patent/JPH03123061A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PURPOSE:To facilitate the mounting alignment of a semiconductor device and to improve a nut fastening operation and soldering operation in workability by a method wherein a positioning jig is used to tighten a nut fitted to a threaded stud provided to the semiconductor device. CONSTITUTION:A circuit board 1 is placed on the upside of the opening of an auxiliary heat dissipating case 4, a boss 4a is inserted into a through-hole 1b of the circuit board 1, and the four corners of the circuit board 1 are fixed by mounting screws 5. Then, a threaded stud 2c of a semiconductor device 2 is inserted into the through-hole 1b of the circuit board 1 and furthermore into a mounting hole 4a-1. Engaging grooves 3a of a positioning jig 3 are engaged with angular parts 2a-1 of the semiconductor device 2, and positioning pins 3b are inserted into positioning holes 1c respectively. At this point, leads 2b are automatically positioned to lands 1a. By this engagement, a nut 2d is tightened from below by a torque driver to bring the semiconductor device 2 into close contact with the boss 4a as the semiconductor device is stopped from rotating. In succession, the positioning jig 3 is drawn out, and then the leads 2b are soldered to the lands 1a.

Description

【発明の詳細な説明】 〔概要〕 ねし付スタッドを有する半導体装置の実装方法に関し、 ナンド締め時の半導体装置の共回りを防止し、半田接合
部及びリードへの悪影響を無くすことを目的とし、 実装する角形の半導体装置のねじ付スタッドを回路基板
の貫通孔に挿通し、つぎに位置決め具で該位置決め具の
係合溝を上記半導体装置の外形に嵌挿し且つ位置決め具
の位置決めピンを前記回路基板の位置決め孔に嵌入し保
合することにより前記半導体装置のリードを回路基板の
ランドに位置決めするとともに半導体装置を回り止めし
た後、ナツト締めを行い、最後にリードをランドに半田
付けするように構成する。
[Detailed Description of the Invention] [Summary] Regarding a mounting method for a semiconductor device having a threaded stud, the present invention aims to prevent the semiconductor device from co-rotating when tightening the NAND and eliminate any adverse effects on the solder joints and leads. , Insert the threaded stud of the rectangular semiconductor device to be mounted into the through hole of the circuit board, then use a positioning tool to fit the engagement groove of the positioning tool into the outer shape of the semiconductor device, and insert the locating pin of the positioning tool into the above-mentioned shape. After positioning the leads of the semiconductor device on the lands of the circuit board by fitting and securing them into the positioning holes of the circuit board and preventing the semiconductor device from rotating, the nuts are tightened, and finally the leads are soldered to the lands. Configure.

〔産業上の利用分野〕[Industrial application field]

本発明はねじ付スタッドを有する半導体装置の実装方法
に関する。
The present invention relates to a method for mounting a semiconductor device having a threaded stud.

回路基板に実装されたねじ付スタッドを有する半導体装
置のねじ付スタッドは取着手段と熱伝導手段とを兼ねて
おり、放熱効果のよい回路基板や放熱体、例えばセラミ
ック基板や補助放熱板などにナンド締め固着しているが
、ナンド締めに際し、その回転力が半田接合部及びリー
ドに掛からないようにすることが要望されている。
The threaded stud of a semiconductor device that has a threaded stud mounted on a circuit board serves as both a mounting means and a heat conduction means, and is suitable for circuit boards and heat sinks with good heat dissipation effects, such as ceramic substrates and auxiliary heat sinks. Although the solder joints are firmly fixed, there is a need to prevent the rotational force from being applied to the solder joints and leads when tightening the pads.

〔従来の技術〕[Conventional technology]

従来は第3図の側断面図に示すように、回路基板11は
ランドllaにねじ付スタッドを有する半導体装置2、
例えば第4図の斜視図に示す四角形のLSIのり−ド2
bを半田付は実装した後、良熱伝導金属からなる補助放
熱筐体4の上面に載せ筐体底部に突設したボス4aを回
路基板11の貫通孔11bに種油しくボス4a上面と回
路基板11実装面とは面一となる)、四隅を取付ねじ5
で同定している。
Conventionally, as shown in the side sectional view of FIG. 3, the circuit board 11 has a semiconductor device 2 having a threaded stud on the land lla,
For example, the rectangular LSI board 2 shown in the perspective view of FIG.
After soldering and mounting, the boss 4a protruding from the bottom of the housing is placed on the top surface of the auxiliary heat dissipation housing 4 made of metal with good thermal conductivity, and the boss 4a protruding from the bottom of the housing is inserted into the through hole 11b of the circuit board 11, and the top surface of the boss 4a and the circuit are connected. flush with the mounting surface of the board 11), and attach the mounting screws 5 at the four corners.
It is identified by

半導体装置2は放熱をよ(するため、ねじ付スタッド2
cはさらにボス4aの取付孔4a−1に挿通し、パッケ
ージ2aをポス4a上面に直接、密着させ、下側からナ
ソ1−26でトルクドライバ(図示略)を用い所定のト
ルクで締め付は固着されている。
The semiconductor device 2 is equipped with a threaded stud 2 for heat dissipation.
c is further inserted into the mounting hole 4a-1 of the boss 4a, the package 2a is brought into direct contact with the upper surface of the post 4a, and the screwdriver (not shown) is tightened from below using a torque driver (not shown) with a naso 1-26. It is fixed.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら、このような」二頭実装構造によれば、半
導体装置はリードを回路基板のランドに半田付けした後
にナツト締めされるため、先に半H1付けされた接合部
及びリードにナンド締めの回転力が加わりストレスを生
じて信頼性を低下させるといった問題があった。
However, according to such a two-head mounting structure, the semiconductor device is tightened with nuts after the leads are soldered to the lands of the circuit board. There was a problem in that the added force caused stress and reduced reliability.

上記問題点に鑑み、本発明はナラ1〜締め時の半導体装
置の共回りを防止し、半ETI接合部及びリードへの悪
影響を無くずことのできる半導体装置の実装方法を提供
することを目的とする。
In view of the above-mentioned problems, an object of the present invention is to provide a method for mounting a semiconductor device that can prevent the semiconductor device from co-rotating during the initial tightening process and eliminate the adverse effects on the semi-ETI joint and the leads. shall be.

〔課題を解決するための手段〕[Means to solve the problem]

上記目的を達成するために、本発明の半導体装置の実装
方法においては、実装する角形の半導体装置のねじ(−
Jスタッドを回路基板の貫通孔に挿通し、つぎに位置決
め具で該位置決め具の係合溝を上記半導体装置の外形に
嵌挿し且つ位置決め具の位置決めピンを前記回路基板の
位置決め孔に嵌入し係合することにより前記半導体装置
のリードを回路基板のランドに位置決めするとともに半
導体装置を回り止めした後、ナンド締めを行い、最後に
リードをランドに半田付けするように構成する。
In order to achieve the above object, in the semiconductor device mounting method of the present invention, the screws (-
Insert the J stud into the through hole of the circuit board, then use a positioning tool to fit the engagement groove of the positioning tool into the outer shape of the semiconductor device, and fit the locating pin of the locating tool into the locating hole of the circuit board. After aligning the leads of the semiconductor device to the lands of the circuit board and preventing the semiconductor device from rotating, NAND tightening is performed, and finally the leads are soldered to the lands.

〔作用〕[Effect]

位置決め具は、その係合溝と半導体装置の外形との係合
、及び位置決めピンと回路基板の位置決め孔との係合に
より、リードをランドに位置決めすることができ、その
状態でナンド締めを行うごとにより半導体装置を回り止
めして共回りを防止することができ、最後にリードを半
田付けすることにより半田接合部及びリードへの悪影響
を無くずことができる。
The positioning tool can position the lead on the land by engaging the engagement groove with the external shape of the semiconductor device and the positioning pin with the positioning hole of the circuit board. This makes it possible to stop the semiconductor device from rotating and prevent co-rotation, and by finally soldering the leads, it is possible to eliminate any adverse effects on the solder joints and the leads.

〔実施例〕〔Example〕

以下図面に示した実施例に基づいて本発明の要旨を詳細
に説明する。なお、構成、動作の説明を理解し易くする
ために全図をとおして同一部分には同一符号を付してそ
の重複説明を省略する。
The gist of the present invention will be explained in detail below based on embodiments shown in the drawings. In order to make it easier to understand the explanation of the configuration and operation, the same parts are given the same reference numerals throughout all the figures, and repeated explanation thereof will be omitted.

第1図の側断面図に示すように、回路基板1は第4図に
示した半導体装置2のリード2bを接続するランド18
と、補助放熱筺体4のボス4aを挿通ずる貫通孔1bと
、ランド]aの外側、即ちパッケージ2aの対角線上に
孔径約0.9111(他の図示しないスルーホールの下
孔径に合ね−ける)の位置決め孔1cとを備える。
As shown in the side sectional view of FIG. 1, the circuit board 1 has lands 18 to which leads 2b of the semiconductor device 2 shown in FIG. 4 are connected.
and a through hole 1b through which the boss 4a of the auxiliary heat dissipation housing 4 is inserted, and a hole diameter of approximately 0.9111 mm (to match the diameter of the other through hole (not shown)) on the outside of the land]a, that is, on the diagonal line of the package 2a. ) positioning hole 1c.

位置決め具3は金属からなり、第2図の単体斜視図に示
すように第4図に示す半導体装置2のパッケージ2aの
外形、即ち対向する角部2a−1を嵌合する係合溝3a
と、その両外側中心線上に回路基板1の位置決め孔1c
に嵌入する段付きの位置決めピン3bと、さらにアース
線(図示略)を接続する接地ねじ3cを螺着備える。な
お、第1図に示したように係合溝3aの深さはり一ド2
bに接触しない程度にし、かつ係合溝3aをパッケージ
2aの角部2a−1に嵌挿し且つ位置決めピン3bを位
置決め孔1cに嵌入したとき、リード2bとランド1a
とは重なり一致するように相対関係は設定する。
The positioning tool 3 is made of metal, and as shown in the single perspective view of FIG. 2, has an engaging groove 3a into which the outer shape of the package 2a of the semiconductor device 2 shown in FIG. 4, that is, the opposing corner 2a-1 is fitted.
and a positioning hole 1c of the circuit board 1 on the center line on both outer sides thereof.
It is provided with a stepped positioning pin 3b that is fitted into the holder, and a ground screw 3c that connects a ground wire (not shown). In addition, as shown in FIG. 1, the depth of the engagement groove 3a is
When the engagement groove 3a is inserted into the corner 2a-1 of the package 2a and the positioning pin 3b is inserted into the positioning hole 1c, the lead 2b and the land 1a
Set the relative relationship so that it overlaps and matches.

このように設定した回路基板1に半導体装置2を実装す
る場合はつぎのように行う。
When mounting the semiconductor device 2 on the circuit board 1 set in this way, it is performed as follows.

まず、回路基板1を補助放熱筺体4の開口上面に載せ、
ボス4aを回路基板1の貫通孔1bに挿通し取付ねじ5
で四隅を固定する。(ポス4a上面と回路基板Iの実装
面は面一となっている)つぎに、実装する半導体装置2
のねじ付スタッド2cを回路基板1の貫通孔1bに挿通
した後、さらにボス4aの取付孔4a−1に挿通ずる。
First, place the circuit board 1 on the opening top surface of the auxiliary heat dissipation housing 4,
Insert the boss 4a into the through hole 1b of the circuit board 1 and tighten the mounting screw 5.
Fix the four corners with. (The top surface of the post 4a and the mounting surface of the circuit board I are flush with each other.) Next, the semiconductor device 2 to be mounted is
After inserting the threaded stud 2c into the through hole 1b of the circuit board 1, it is further inserted into the mounting hole 4a-1 of the boss 4a.

そして、位置決め具3の係合溝3aを半導体装置2の角
部2a−1に嵌合し、かつ位置決めビン3bを位置決め
孔1cに嵌入する。このとき、リード2bはランドla
に自動的に位置決めされる。
Then, the engaging groove 3a of the positioning tool 3 is fitted into the corner 2a-1 of the semiconductor device 2, and the positioning pin 3b is fitted into the positioning hole 1c. At this time, lead 2b is connected to land la.
automatically positioned.

なお、図示しないアースレヘルに接続されたアース線6
はその端子6aを接地ねじ3cに接続しておく。
In addition, the ground wire 6 connected to the ground level (not shown)
The terminal 6a is connected to the ground screw 3c.

そうして、位置決め具3を指などで軽く上方から押さえ
ておき、係合溝3aと半導体装置2の角部2a−1との
係合、及び位置決めビン3bと位置決め孔1cとの係合
により半導体装置2を回り止めした状態で下方からナツ
ト2dをトルクドライバ(図示略)を用いて所定トルク
(約5〜6kg/cm)で締め半導体装置2をボス4a
に密着固定する。
Then, by lightly pressing the positioning tool 3 from above with a finger or the like, the engagement groove 3a is engaged with the corner 2a-1 of the semiconductor device 2, and the positioning pin 3b is engaged with the positioning hole 1c. With the semiconductor device 2 prevented from rotating, tighten the nut 2d from below with a predetermined torque (approximately 5 to 6 kg/cm) using a torque driver (not shown) to fix the semiconductor device 2 to the boss 4a.
Fix it tightly.

つぎに、アース線6を外し、位置決め具3を抜き取った
後、リード2bとランド1aとの半田(=Jけを行う。
Next, after removing the ground wire 6 and pulling out the positioning tool 3, soldering is performed between the lead 2b and the land 1a.

このように、半導体装置の実装位置決め(リードとラン
ドとの重ね合わせ)とナンド締め時の半導体装置の回り
止めとを兼ねる位置決め具を位置決め治具兼ストッパと
して用いることにより、リードとランドとが自動的に位
置決めすることができ、その状態でナツト締めを半導体
装置が共回りすることなく安全に行うことができる。
In this way, by using a positioning tool that serves both as a positioning jig and stopper to position the semiconductor device for mounting (overlapping the leads and lands) and to prevent the semiconductor device from rotating when tightening the NAND, the leads and lands can be automatically aligned. In this state, the nut can be safely tightened without the semiconductor device rotating together.

そして、半導体装置をナンド締め固定した後、半田付け
は最後に行うため従来のようにリード及び半田接合部に
悪影響を与えることは無くなり、電気的信頬性を良好に
維持することができる。
Since soldering is performed last after the semiconductor device is fixed with a NAND clamp, there is no adverse effect on the leads and solder joints as in the conventional method, and good electrical reliability can be maintained.

なお、アース線は半導体装置の内部素子の静電気破壊を
予防する。
Note that the ground wire prevents electrostatic damage to internal elements of the semiconductor device.

上記説明の半導体装置は放熱を効率よくするため、回路
基板を補助放熱筐体に取着しそのボス上面に半導体装置
を密着固定したが、発熱の程度により上記実装方法を用
い例えば、良熱伝導性のセラミック基板自体にナンド締
めしてもよく、あるいはセラミック基板とボスとを共締
めする形でナツト締め固定してもよい。
In the semiconductor device described above, in order to improve heat dissipation efficiency, the circuit board is attached to an auxiliary heat dissipation case, and the semiconductor device is tightly fixed on the top surface of the boss. The ceramic substrate may be fastened with a nut to the ceramic substrate itself, or the ceramic substrate and the boss may be fastened together with a nut.

〔発明の効果〕〔Effect of the invention〕

以上、詳述したように本発明によれば、ねじ付スクッド
を有する半導体装置のナツト締めに際し、位置決め具を
用いることにより半導体装置の実装位置合わせが容易に
でき、半導体装置を回り止めした状態でナンドを締める
ことができるため、ナツト締め及び半田イ1けの作業性
が向上し、リードや半田接合部などに応力を生じること
な(電気的信顛性の高い電子回路ユニットを提供するこ
とができるといった産業上極めて有用な効果を発揮する
As described in detail above, according to the present invention, when tightening the nut of a semiconductor device having a threaded scud, the mounting position of the semiconductor device can be easily aligned by using a positioning tool, and the semiconductor device can be easily aligned while the semiconductor device is prevented from rotating. Since the NAND can be tightened, the workability of nut tightening and soldering is improved, and there is no stress on the leads or solder joints (it is possible to provide an electronic circuit unit with high electrical reliability). It exhibits extremely useful effects in industry.

第3図は従来技術による側断面図、 第4図は第3図の半導体装置の斜視図である。Figure 3 is a side sectional view of the conventional technology; FIG. 4 is a perspective view of the semiconductor device of FIG. 3.

図において、 lは回路基板、    2dはナツト、1aはランド、
      3は位置決め具、1bは貫通孔、    
 3aは係合溝、1cは位置決め孔、   3bは位置
決めビン、2は半導体装置、   4は補助放熱筐体、
2bはリード、      4aはボス、2Cはねじ付
スタッド、 4a−1は取付孔を示1゜
In the figure, l is the circuit board, 2d is the nut, 1a is the land,
3 is a positioning tool, 1b is a through hole,
3a is an engagement groove, 1c is a positioning hole, 3b is a positioning bottle, 2 is a semiconductor device, 4 is an auxiliary heat dissipation housing,
2b is a lead, 4a is a boss, 2C is a threaded stud, 4a-1 is a mounting hole 1°

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明による一実施例の側断面図、第2図は第
1図の位置決め具の斜視図、0 垢
FIG. 1 is a side sectional view of an embodiment of the present invention, and FIG. 2 is a perspective view of the positioning tool shown in FIG. 1.

Claims (1)

【特許請求の範囲】[Claims] 実装する角形の半導体装置(2)のねじ付スタッド(2
c)を回路基板(1)の貫通孔(1b)に挿通し、つぎ
に位置決め具(3)で該位置決め具(3)の係合溝(3
a)を上記半導体装置(2)の外形に嵌挿し且つ前記位
置決め具(3)の位置決めピン(3b)を前記回路基板
(1)の位置決め孔(1c)に嵌入し係合することによ
り前記半導体装置(2)のリード(2b)を回路基板(
1)のランド(1a)に位置決めするとともに半導体装
置(2)を回り止めした後、ナット(2d)締めを行い
、最後にリード(2b)をランド(1a)に半田付けす
ることを特徴とする半導体装置の実装方法。
The threaded stud (2) of the rectangular semiconductor device (2) to be mounted
c) into the through hole (1b) of the circuit board (1), and then use the positioning tool (3) to insert the engagement groove (3) of the positioning tool (3).
a) into the outer shape of the semiconductor device (2), and the positioning pin (3b) of the positioning tool (3) is fitted into and engaged with the positioning hole (1c) of the circuit board (1). Connect the leads (2b) of the device (2) to the circuit board (
1) After positioning the semiconductor device (2) on the land (1a) and preventing it from rotating, the nut (2d) is tightened, and finally the lead (2b) is soldered to the land (1a). A method for mounting semiconductor devices.
JP26178389A 1989-10-05 1989-10-05 Mounting of semiconductor device Pending JPH03123061A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26178389A JPH03123061A (en) 1989-10-05 1989-10-05 Mounting of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26178389A JPH03123061A (en) 1989-10-05 1989-10-05 Mounting of semiconductor device

Publications (1)

Publication Number Publication Date
JPH03123061A true JPH03123061A (en) 1991-05-24

Family

ID=17366642

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26178389A Pending JPH03123061A (en) 1989-10-05 1989-10-05 Mounting of semiconductor device

Country Status (1)

Country Link
JP (1) JPH03123061A (en)

Similar Documents

Publication Publication Date Title
JPH03123061A (en) Mounting of semiconductor device
JPH02170494A (en) Electronic circuit package
JPS63283136A (en) Method for packaging circuit substrate
JP3348485B2 (en) Semiconductor devices and mounting boards
JPH0278265A (en) Lead frame and compound semiconductor device provided therewith
JPH06260573A (en) Assembly structure of semiconductor package and cooling fin
JPH08167669A (en) Semiconductor element
JPH01293544A (en) Semiconductor device
JPH02192138A (en) Manufacture of semiconductor device
JPH11186479A (en) Surface mounting parts with heat slinger
JPH07131170A (en) Electronic device having printed board
JPS6244539Y2 (en)
JPS6328608Y2 (en)
JP3201270B2 (en) Semiconductor device
JPS5840610Y2 (en) Transistor mounting structure
JPH0677620A (en) Electronic component mounting structure
JPH0727678Y2 (en) Fixing structure for heat dissipation parts
JPH0356078Y2 (en)
JP2530783Y2 (en) Chip component mounting structure
JPS5846549Y2 (en) Structure of socket for leadless package
KR920000823Y1 (en) Power hybrid ceramic board & aluminium plate structure
JPH0617305Y2 (en) Hybrid IC board fixed structure
JPH1197594A (en) Heat sink fixing apparatus
JPH0736453U (en) Mounting structure for heat sink to IC package
JPS62150867A (en) High density ceramic package