JPH03122378U - - Google Patents

Info

Publication number
JPH03122378U
JPH03122378U JP3088890U JP3088890U JPH03122378U JP H03122378 U JPH03122378 U JP H03122378U JP 3088890 U JP3088890 U JP 3088890U JP 3088890 U JP3088890 U JP 3088890U JP H03122378 U JPH03122378 U JP H03122378U
Authority
JP
Japan
Prior art keywords
input
circuit
clock signal
measured
analog signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3088890U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3088890U priority Critical patent/JPH03122378U/ja
Publication of JPH03122378U publication Critical patent/JPH03122378U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本考案実施例の全体構成を示すブロ
ツク構成図。第2図は、本考案実施例のサンプリ
ング動作を示す説明図。 1……電圧信号入力回路、2……電流信号入力
回路、3……演算回路、4……位相制御手段、1
1……第一サンプル・ホルダ、12……第一アナ
ログ・デイジタル変換器、21……第二サンプル
・ホルダ、22……第二アナログ・デイジタル変
換器、41……比較器、42……制御回路、43
……サンプリング周波数発生回路、44……高周
波数発生回路、45……シフトレジスタ、46…
…第一切替回路、47……第二切替回路。
FIG. 1 is a block configuration diagram showing the overall configuration of an embodiment of the present invention. FIG. 2 is an explanatory diagram showing the sampling operation of the embodiment of the present invention. DESCRIPTION OF SYMBOLS 1...Voltage signal input circuit, 2...Current signal input circuit, 3...Arithmetic circuit, 4...Phase control means, 1
DESCRIPTION OF SYMBOLS 1...First sample holder, 12...First analog-to-digital converter, 21...Second sample holder, 22...Second analog-to-digital converter, 41...Comparator, 42...Control circuit, 43
...Sampling frequency generation circuit, 44...High frequency generation circuit, 45...Shift register, 46...
...first switching circuit, 47...second switching circuit.

Claims (1)

【実用新案登録請求の範囲】 1 被測定端の交流の電圧を表すアナログ信号を
入力する第一の入力回路と、 前記被測定端の交流の電流を表すアナログ信号
を入力する第二の入力回路と、 前記二つの入力回路に入力した値から、前記被
測定端の電力を演算する演算回路と を備えた広帯域電力計において、 前記二つの入力回路には、それぞれ、入力する
アナログ信号を所定周期のクロツク信号でサンプ
リングしてデイジタルデータに変換するアナログ
・デイジタル変換回路を含み、 前記クロツク信号の位相を時間の経過にしたが
つてわずかづつ変更する位相制御手段を備えた ことを特徴とする広帯域電力計。 2 前記位相制御手段は、 一つの周波数について位相がわずかづつ異なる
多数の出力を発生するクロツク信号発生回路と、 この多数の出力の一つを選択して前記サンプリ
ング用のクロツク信号として供給する切換回路と
、 前記入力回路の一つについて、サンプリングさ
れたデイジタルデータが繰り返して同一値になる
ことを検出する手段と、 この検出する手段の出力により前記切換回路を
制御する制御回路と を含む請求項1記載の広帯域電力計。
[Claims for Utility Model Registration] 1. A first input circuit into which an analog signal representing an alternating current voltage at the end to be measured is input, and a second input circuit into which an analog signal representing an alternating current at the end to be measured is input. and an arithmetic circuit that calculates the power at the end to be measured from the values input to the two input circuits, wherein each of the two input circuits receives an input analog signal at a predetermined period. A wideband power source comprising: an analog-to-digital conversion circuit that samples a clock signal and converts it into digital data; and a phase control means that changes the phase of the clock signal little by little over time. Total. 2. The phase control means includes a clock signal generation circuit that generates multiple outputs with slightly different phases for one frequency, and a switching circuit that selects one of the multiple outputs and supplies it as the sampling clock signal. 2. A control circuit according to claim 1, further comprising means for detecting that sampled digital data repeatedly becomes the same value for one of said input circuits, and a control circuit for controlling said switching circuit based on the output of said detecting means. Broadband power meter as described.
JP3088890U 1990-03-26 1990-03-26 Pending JPH03122378U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3088890U JPH03122378U (en) 1990-03-26 1990-03-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3088890U JPH03122378U (en) 1990-03-26 1990-03-26

Publications (1)

Publication Number Publication Date
JPH03122378U true JPH03122378U (en) 1991-12-13

Family

ID=31533609

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3088890U Pending JPH03122378U (en) 1990-03-26 1990-03-26

Country Status (1)

Country Link
JP (1) JPH03122378U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008125579A (en) * 2006-11-17 2008-06-05 Sogo Kikaku:Kk Token collection container

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5262068A (en) * 1975-11-17 1977-05-23 Toshiba Corp Electronic watthour meter

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5262068A (en) * 1975-11-17 1977-05-23 Toshiba Corp Electronic watthour meter

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008125579A (en) * 2006-11-17 2008-06-05 Sogo Kikaku:Kk Token collection container
JP4495135B2 (en) * 2006-11-17 2010-06-30 有限会社相互企画 Coin collection container

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