JPH03120073U - - Google Patents

Info

Publication number
JPH03120073U
JPH03120073U JP3018490U JP3018490U JPH03120073U JP H03120073 U JPH03120073 U JP H03120073U JP 3018490 U JP3018490 U JP 3018490U JP 3018490 U JP3018490 U JP 3018490U JP H03120073 U JPH03120073 U JP H03120073U
Authority
JP
Japan
Prior art keywords
lsi element
circuit board
printed circuit
groove
separable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3018490U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3018490U priority Critical patent/JPH03120073U/ja
Publication of JPH03120073U publication Critical patent/JPH03120073U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図、第2図は本考案実施例を示す。第1図
は、取付要領を示す側面略図、第2図は、取付状
態の平面図、第3図、第4図は従来例を示す。第
3図は、取付要領を示す側面略図、第4図は、取
付状態の平面図である。 1……プリント基板、1′……分離部、2……
溝、2′……連設部、3……LSI、4……接着
剤。
1 and 2 show an embodiment of the present invention. FIG. 1 is a schematic side view showing the installation procedure, FIG. 2 is a plan view of the installed state, and FIGS. 3 and 4 show a conventional example. FIG. 3 is a schematic side view showing the installation procedure, and FIG. 4 is a plan view of the installed state. 1...Printed circuit board, 1'...separation section, 2...
Groove, 2'...Continuous portion, 3...LSI, 4...Adhesive.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] プリント基板上のLSI素子取付個所に予め分
離可能な溝を形成すると共に、該LSI素子の取
付面と前記プリント基板上の分離可能な溝に囲ま
れた部分との間で接着剤にて仮設するようにした
ことを特徴とするLSI素子の取付構造。
A separable groove is formed in advance at the location where the LSI element is to be mounted on the printed circuit board, and temporary adhesive is used between the mounting surface of the LSI element and the portion surrounded by the separable groove on the printed circuit board. An LSI element mounting structure characterized by:
JP3018490U 1990-03-22 1990-03-22 Pending JPH03120073U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3018490U JPH03120073U (en) 1990-03-22 1990-03-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3018490U JPH03120073U (en) 1990-03-22 1990-03-22

Publications (1)

Publication Number Publication Date
JPH03120073U true JPH03120073U (en) 1991-12-10

Family

ID=31532913

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3018490U Pending JPH03120073U (en) 1990-03-22 1990-03-22

Country Status (1)

Country Link
JP (1) JPH03120073U (en)

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