JPH03120052U - - Google Patents

Info

Publication number
JPH03120052U
JPH03120052U JP2903390U JP2903390U JPH03120052U JP H03120052 U JPH03120052 U JP H03120052U JP 2903390 U JP2903390 U JP 2903390U JP 2903390 U JP2903390 U JP 2903390U JP H03120052 U JPH03120052 U JP H03120052U
Authority
JP
Japan
Prior art keywords
chip
pad
terminal
circuit pattern
base material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2903390U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP2903390U priority Critical patent/JPH03120052U/ja
Publication of JPH03120052U publication Critical patent/JPH03120052U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
JP2903390U 1990-03-23 1990-03-23 Pending JPH03120052U (it)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2903390U JPH03120052U (it) 1990-03-23 1990-03-23

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2903390U JPH03120052U (it) 1990-03-23 1990-03-23

Publications (1)

Publication Number Publication Date
JPH03120052U true JPH03120052U (it) 1991-12-10

Family

ID=31531814

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2903390U Pending JPH03120052U (it) 1990-03-23 1990-03-23

Country Status (1)

Country Link
JP (1) JPH03120052U (it)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013033981A (ja) * 2004-12-13 2013-02-14 Agere Systems Inc 基板導通を利用した積重ねダイ式の構成をもつ集積回路

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5737867A (en) * 1980-08-18 1982-03-02 Mitsubishi Electric Corp Semiconductor device
JPS58137407A (ja) * 1981-09-30 1983-08-15 インペリアル・ケミカル・インダストリ−ズ・ピ−エルシ− 所望しない発泡を抑制する組成物及び方法
JPS61216391A (ja) * 1985-03-22 1986-09-26 古河電気工業株式会社 多層回路基板の製造方法
JPH0254119A (ja) * 1988-08-18 1990-02-23 Kyowa Electron Instr Co Ltd 地すべり自動観測装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5737867A (en) * 1980-08-18 1982-03-02 Mitsubishi Electric Corp Semiconductor device
JPS58137407A (ja) * 1981-09-30 1983-08-15 インペリアル・ケミカル・インダストリ−ズ・ピ−エルシ− 所望しない発泡を抑制する組成物及び方法
JPS61216391A (ja) * 1985-03-22 1986-09-26 古河電気工業株式会社 多層回路基板の製造方法
JPH0254119A (ja) * 1988-08-18 1990-02-23 Kyowa Electron Instr Co Ltd 地すべり自動観測装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013033981A (ja) * 2004-12-13 2013-02-14 Agere Systems Inc 基板導通を利用した積重ねダイ式の構成をもつ集積回路

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