JPH03117199A - Communication system between digital exchanges - Google Patents

Abstract

PURPOSE:To provide a margin to a timing of data signal fetch by providing a means generating a 1st clock signal with a same transmission speed of a time slot on a multiplex transmission line and a 2nd clock signal whose phase difference differs from that of the 1st clock signal. CONSTITUTION:When a data signal is sent from A to B, the data signal from the A is sent to a digital exchange 9 after being converted into a digital signal via a CODEC 8. The digital data signal is sent to a multiplex transmission line 1 from the digital exchange 9 synchronously with a leading (f) of the leading of a 1st clock signal. A control circuit 10' receives an instruction to fetch the data signal from a control circuit 10 and gives an instruction to the digital exchange 9' to fetch the data signal. The digital exchange 9' receives a 2nd clock signal and fetches the data signal from a time slot of a multiplex transmission line 1 synchronously with the trailing (g) of the 2nd clock signal.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital exchange, and particularly to a digital exchange that sends data signals to specific time slots on multiplex transmission paths (highways) in synchronization with clock signals. and a digital exchange that captures data signals from that particular time slot on a multiplex transmission path.

[Prior Art] Conventionally, this type of digital exchange is interposed between a telephone set and a multiplex transmission line.

Telephones transmit and receive analog data signals such as voice signals. In order to input and output the data signal to the digital exchange, there is a C0DE that converts the data signal into a digital data signal between the telephone and the digital exchange.
C (encoding/decoding device) is required.

Each digital exchange has a C0DEC (encoder/decoder)
The receiver has a function as a time division switch that provides the timing for transmitting data signals from the multiplex transmission line to the multiplex transmission line and for taking in the data signals from the multiplex transmission line.

Considering the case where a data signal is transferred from Party A's telephone to Party B's telephone, as shown in Figure 3, for example, Party A's digital exchange receives a clock signal with a predetermined period, and the rising edge of the clock signal. By synchronizing with a, data signals are sent to time slots on multiplex transmission paths.

On the other hand, in the digital exchange system B, the timing for taking in the data signal in that time slot on the multiplex transmission path is synchronized with the falling edge b of the clock signal.

Incidentally, as the multiplicity of the time slots of the multiplex transmission path increases and the transmission speed of the time slots increases, the frequency of the clock signal also increases accordingly, and the time t for capturing the data signal also decreases.

FIG. 4 shows an example in which the multiplicity of highway time slots is the same as in FIG. 3, but the frequency of the clock signal is doubled.

In this case, Party A sends the data signal to the multiplex transmission path (
After (C), when the data signal is fetched in B, the data signal can be fetched at the timing e.

At this time, the timing time t from data signal transmission to capture is 1.5 times (t = t
2), and there is a margin in the timing time t.

[Problems to be Solved by the Invention] However, doubling the frequency of the clock signal increases the likelihood of noise generation, impairing the reception of desired electromagnetic signals, and potentially causing malfunctions due to noise. growing. That is, EMI (electomag
netic 1 interference) was not desirable in terms of countermeasures.

Therefore, a technical object of the present invention is to eliminate the above-mentioned drawbacks and to provide a communication system between digital exchanges that has sufficient timing to take in data signals from time slots on multiple transmission paths.

[Means for Solving the Problems] According to the present invention, there is provided a multiplex transmission line that transmits a plurality of time slots at a transmission rate of a predetermined frequency, and a first clock signal that outputs a first clock signal of the same frequency as the transmission rate. 1 clock signal generating means, and a clock signal generating means for receiving the first clock signal and transmitting a data signal to a predetermined one of the plurality of time slots of the multiplex transmission path in synchronization with the first clock signal. 1 digital exchange; and a second digital exchange that takes in the data signal from the predetermined one time slot of the multiplex transmission path, whereby the data signal is transferred from the first digital exchange to the multiplex. In a communication system between digital exchanges in which a clock signal is transmitted to the second digital exchange via a transmission line, a second clock signal having the same frequency as the transmission rate and a predetermined phase difference with the first clock signal; a second clock signal generating means for outputting a clock signal, receiving the second clock signal and synchronizing with the second clock signal, the second clock signal generating means outputs the clock signal from the predetermined one time slot of the multiplex transmission path; A communication system between digital exchanges is obtained which is characterized by the acquisition of data signals.

[Examples] Examples of the present invention will be described below with reference to the drawings.

Referring to FIG. 1, a communication system between digital exchanges according to an embodiment of the present invention includes a multiplex transmission line (1), a clock generator unit (2), a control line (3),
C0DEC (8), digital exchange (9), and control circuit (10) connected to Party A's telephone, and c connected to Party B's telephone.

It has a DEC (8'), a digital exchange (9'), and a control circuit (10').

The multiplex transmission path (1) multiplexes multiple time slots,
The plurality of time slots are transmitted at a transmission rate of a predetermined frequency (4,096 MHz).

The clock generator unit (2) has multiple transmission lines (
1) Same frequency as the transmission speed (4,096MHz
), and a second clock signal having the same frequency (4,096 MHz) as the first clock signal and differing by a predetermined phase difference θ. A second clock signal generating means (6) that outputs a signal and a time slot ○ on the multiplex transmission line (1)
Frame clock signal generating means (7) for generating a frame clock signal (its frequency is 8 kHz) that performs the operation of providing the timing of time slot 0 among the time slots having a time series up to time slot 511, that is, frame synchronization. It has

The control circuit (10) of Party A is connected to the control circuit (IOM) of Party B via the control line (3).
), upon receiving the analog signal transmission information via the C0DEC (8) and the digital exchange (9), it is transmitted from Party A's control circuit (10) to Party B's control circuit (1) via the control line (3).
0') to receive the transmission information.

The CODECs (8) and (8') convert the analog signal transmission information into a digital data signal, or conversely convert the digital data signal into an analog data signal.

While receiving the data signal, the digital exchange (9) also receives a frame clock signal, first and second clock signals from the clock generator unit (2), and synchronizes with the first clock signal to generate the data signal. is sent to the time slot of multiplex transmission path (1).

Consider the case where a data signal is sent from Party A to Party B.

The data signal from Party A is analog, so C0DEC
(8), it is converted into digital data and then sent to the digital exchange (9). The digital data signal is
The signal is sent from the digital exchange (9) to the multiplex transmission path (1) in synchronization with the rising edge f of the clock signal.

The digital exchange (9') receives a frame clock signal and first and second clock signals from the clock generator unit (2).

The control circuit (10') receives an instruction from the control circuit (1o) to take in the data signal, and the control circuit (10') receives the command to take in the data signal from the digital exchange (9').
to take in the data signal.

The digital exchange (9') receives the second clock signal, and in synchronization with the falling g of the second clock signal,
The data signal is taken in from the time slot of the multiplex transmission path (1). Since this data signal is digital, C
The data is converted to analog and sent to Party B via 0DEC (8').

In this way, Party A's analog data signal is transmitted to Party B.

[Effects of the Invention] As is clear from the above description, according to the present invention, the first clock signal having the same transmission rate as the time slot on the multiplex transmission path and the first clock signal having different phase differences from each other. By providing means for generating a second clock signal, the data signal is sent to the time slot in synchronization with the first clock signal, and the data signal is generated in synchronization with the second clock signal. This has the effect that the data signal can be taken in in its time slot, and that the phase difference allows a margin in the timing of data signal acquisition.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a communication system between digital exchanges according to an embodiment of the present invention, and FIG. 2 is a diagram showing a time chart of the first and second clock signals and multiplex transmission paths in FIG. 1. , 3rd
The figure shows a time chart of the clock signal and multiplex transmission line of a conventional digital exchange, and Figure 4 is the time chart of the clock signal and multiplex transmission line when the frequency of the clock signal in Figure 3 is doubled. FIG. DESCRIPTION OF SYMBOLS 1...Multiple transmission line, 2...Clock generator unit, 3...Control line, 5...First clock signal generation means, 6...Second clock signal generation means, 7.
...Frame clock signal generation means, 8.8'...C
0DEC,9,9'...Digital exchange, 10,10
...Control circuit.

Claims (1)

[Claims] 1. A multiplex transmission line that transmits a plurality of time slots at a transmission rate of a predetermined frequency, and a first clock signal generating means that outputs a first clock signal of the same frequency as the transmission rate. and a first digital exchange that receives the first clock signal and transmits a data signal to a predetermined one of the plurality of time slots of the multiplex transmission path in synchronization with the first clock signal; a second digital exchange that takes in the data signal from the predetermined one time slot of the multiplex transmission path, thereby transmitting the data signal from the first digital exchange to the multiplex transmission path through the multiplex transmission path. In a communication system between digital exchanges, the second clock signal is outputted at the same frequency as the transmission rate and has a predetermined phase difference from the first clock signal. 2 clock signal generating means, receiving the second clock signal and taking in the data signal from the predetermined one time slot of the multiplex transmission path in synchronization with the second clock signal. Communication system between digital exchanges.