JPS63283247A - Image transmission processing system - Google Patents

Abstract

PURPOSE:To suppress the increase of total information quantities for transmission and to miniaturize a system, by replacing the least significant bit in digital serial data obtained by processing an analog picture signal for the purpose of transmission by a synchronizing signal. CONSTITUTION:An A/D converter 1 converts the analog picture signal to the digital data based on a sampling clock, and outputs it to an output bit line 4 in parallel. A parallel/serial converter 2 fetches the data from the output bit line 4 based on the sampling clock, and also, after converting digital parallel data to the digital serial data, outputs it to a serial data output terminal 7. The data corresponding to the LSB of the digital serial data is always fixed at a 0 level. In such a way, it is possible to perform a reception processing under the recognition of the LSB of said digital serial data as the synchronizing signal at a reception side.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to an image transmission processing system that converts an analog image signal obtained from a television camera or the like into digital serial data and transmits the digital serial data. relates to a method for providing a synchronization signal necessary for reception processing to the digital serial data.

(Prior art) For example, when trying to transmit an image signal obtained from a television camera, the image signal, which is an analog signal, is converted into digital parallel data of predetermined bits (usually 8 bits), and then this digital parallel data is There is a method of converting the data into digital serial data and sending it out.

At this time, in order to efficiently receive the digital serial data on the receiving side, it is common to add a synchronization signal to the digital serial data before transmitting it.

In this type of conventional image transmission processing system, in order to completely preserve all image signals, the above processing is performed by adding a new synchronization signal to each digital serial signal.

As a result of such processing, the data rate (data transmission speed) of the transmission path is increased in proportion to the increase in the total amount of information (digital serial data and synchronization signal).

For this reason, the conventional image transmission processing system requires a large-scale circuit to perform the data rate conversion processing described above, which inevitably increases the size and cost of the system.

(Problems to be Solved by the Invention) As described above, in the above-mentioned conventional image transmission processing system, the total information increases by adding the synchronization signal to the image signal.
Since a circuit was required to increase the data rate of the transmission line, there was a problem in that the system had to become larger and more expensive.

The present invention has been made in view of the above-mentioned circumstances, and eliminates the need for a circuit for converting the data rate of the transmission line when adding a synchronization signal to an image signal, thereby reducing the size and cost of the system. The purpose is to provide an image transmission processing system that can contribute to this.

[Structure of the invention]

(Means for Solving the Problems) The image transmission processing system of the present invention includes an A/D conversion means for converting an analog image signal into a digital signal at a constant sampling period and outputting it as parallel data of predetermined bits; The apparatus includes a parallel/serial conversion means that converts parallel data into serial data for transmission and outputs the same, and a replacement means that replaces the least significant bit in the serial data with a synchronization signal.

(Function) In the image transmission processing system of the present invention, according to the bit structure of the digital serial data obtained by processing the image signal for transmission, even if the least significant bit (the bit with the least weight) is deleted, it is not practical. Focusing on the fact that it does not cause any inconvenience as an image signal, the least significant bit is replaced with a synchronization signal to suppress an increase in the total amount of information for transmission and eliminate the need for a data rate conversion circuit.

(Example) Hereinafter, an example of the present invention will be described in detail based on the accompanying drawings.

FIG. 1 is a block diagram showing an embodiment of the image transmission processing system according to the present invention, in which 1 is an A/D converter, 2 is a parallel/serial converter, 3 is an analog input terminal, and 4 is an A/D converter.
The output bit line of the /D converter 1, 5 is a sampling clock input terminal, 6 is a serial shift output clock input terminal, and 7 is a serial data output terminal.

In FIG. 1, an analog image signal 3 obtained from a television camera or the like is input to an A/D converter 1, and a sampling clock is input from a limp ring clock input terminal 5 at a predetermined sampling period. is input.

This sampling clock is also input to the parallel/serial converter 2 together with the serial shift output clock applied from the serial shift output clock input terminal 6.

The A/D converter 1 converts an analog image signal into, for example, 8-bit digital data based on the sampling clock mentioned above, and converts this digital data into a corresponding output bit (1lA4) determined for each bit in parallel. Output to.

On the other hand, the parallel/serial converter 2 takes in the digital data output in parallel from the A/D converter 1 from the output bit line 4 based on the same sampling clock as mentioned above, and also converts the taken digital parallel data into is converted into digital serial data based on the serial shift output clock, and then output to the serial data output terminal 7.

If we pay attention to the output bit lines of the A/D converter 1, one of them is connected to GND.

Normally, the line connected to GND in this way carries the least significant bit (Least) of the 8-bit digital parallel data output from the A/D converter 1.
The output focus line 4 corresponding to 51gn1ficant Bit (hereinafter referred to as LSB) is applied.

In this way, connect the LSB of digital parallel data to GND.
When the level is fixed, the output of the parallel/serial converter 2 is the digital serial data.
Data corresponding to B is always fixed at the "0" level.

Furthermore, according to the bit structure of the digital serial data mentioned above, the LSB appears at a constant repetition period,
Moreover, since it is always fixed at the "0" level, the receiving side can receive and process the LSB of the digital serial data while recognizing it as a synchronizing signal.

The digital serial data in which the LSB has been replaced with a synchronization signal in this manner is sent from the serial data output terminal 7 to the transmission path via the transmission control section, and is transmitted to the receiving side.

On the other hand, on the receiving side, the original analog image signal transmitted from the transmitting side can be obtained by demodulating the digital serial data received from the transmission path based on the synchronization signal corresponding to the LSB.

In addition, in order to replace the LSB in the digital serial data with a synchronization signal, in addition to fixing the output bit line corresponding to the LSB of the output bit IQ4 to the GND level as described above, it is also necessary to fix it to the +5V level. You may also do so.

Further, in the above embodiment, a method has been described in which the LSB of the digital serial data is replaced with a synchronization signal every sampling period, but there is also a method in which the above-mentioned replacement processing is performed every arbitrary sampling period.

FIG. 2 is a block diagram showing an embodiment of a system that performs image transmission processing based on the latter method.The difference from the image transmission system shown in FIG. 1 is that the output bit line of the A/D converter 1 is 4 is completely directly connected to the parallel/serial converter 2, and a switch 8 connected between the parallel/serial converter 2 and the serial data output terminal 7 and a timing signal generator 9 that controls the switch 8 are newly installed. It has a configuration equipped with.

In FIG. 2, A/D converter 1 and parallel/serial converter 2 operate in the same manner as in FIG.

The switch 8 is normally connected to the parallel/serial converter 2 side, and is intermittently connected to the GND side under timing control of the timing signal generator 9 based on the sampling clock and the serial shift output clock.

Therefore, if the above timing control is performed at the 188 output timing of the digital serial data from the parallel/serial converter 2 in a predetermined sampling period, the LSB becomes "0" level and becomes the synchronizing signal. Replacement becomes possible.

As an example, FIG. 3 shows the structure of digital serial data obtained at the serial data output terminal 7 when the above timing control is performed at a period twice the sampling period, and the data is divided into every other period. It can be seen that each LSB is replaced with a synchronization signal of *.

It goes without saying that the cycle for performing the above timing control can be arbitrarily set to n times the sampling cycle depending on the circumstances of the system and the like.

(Effects of the Invention) As explained above, according to the image transmission processing system of the present invention, the least significant bit in digital serial data obtained by processing an analog image signal for transmission is replaced with a synchronization signal, In order to suppress the increase in the total amount of information,
This has the excellent advantage of eliminating the need for a data rate conversion circuit, making it possible to significantly reduce the size and cost of the system.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the image transmission processing system according to the present invention, FIG. 2 is a block diagram showing another embodiment of the image transmission processing system according to the present invention, and FIG.
FIG. 2 is a diagram showing an example of digital serial data processed by the image transmission processing system shown in the figure. 1... A/D converter, 2... Parallel/serial converter, 3... Analog input terminal, 4... Output bit line of A/D converter 1, 5... Sampling clock input Terminal, 6... Serial shift output clock input terminal, 7... Serial data output terminal, 8... Switch, 9... Timing signal generator

Claims (2)

[Claims] (1) A/D conversion means that converts an analog image signal into a digital signal at a fixed sampling period and outputs it as parallel data of predetermined bits; and a parallel/digital converter that converts the parallel data into serial data for transmission and outputs it.
An image transmission processing system comprising: serial conversion means; and replacement means for replacing the least significant bit in the serial data with a synchronization signal. (2) The replacing means performs the process of replacing the least significant bit with a synchronization signal at a cycle that is n times the sampling cycle (n is a positive integer excluding 0). The image transmission processing system described in ).