JPH0311572B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a circuit for generating a reset pulse for resetting storage elements of various electronic circuits upon power-up.

Figure 1 shows a power-on reset pulse generation circuit that has been widely used in the past.This circuit consists of a time constant determining resistor 1 and capacitor 2 that determine the pulse width at power-on, and a reset Buffer IC3 with built-in Schmitt circuit that shapes the pulse waveform, and capacitor 2 when the power is cut off.
It consists of a diode 4 for prompt discharge.

FIG. 2 is an equivalent circuit of the circuit shown in FIG. 1 when the power is turned on, and the input impedance of the buffer IC 3 can be approximated to the resistor 5. Here, the constant value of capacitor 2 is C2, the constant value of resistor 1 is R1, and the constant value of resistor 5 is
Assuming R5, the circuit time constant is determined by C2・(R1R5), and when the power is turned on, capacitor 2 is charged with this time constant. The potential of capacitor 2
If v ₂ , then v ₂ ≧v _IL (v _IL is the buffer IC3's output H
(upper limit of input voltage that can maintain the level),
The output of buffer IC3 changes from H level to L level. Therefore, the time from power-on to this point becomes the pulse width of the reset pulse. Also the third
The figure shows an equivalent circuit when the power is cut off, and the charge stored in the capacitor 2 is discharged through the diode 4 and the power supply impedance 6 shown as a resistor. Since the power supply is usually low impedance, the capacitor 2 quickly discharges to about 1V, which is the forward voltage drop of the diode 4, but after that, the diode 4 is cut off, so the voltage gradually discharges through the resistor 1 over a long period of time. discharge to.

In Fig. 4, a is the power-on and power-off waveforms,
b is the voltage waveform across capacitor 2, c is the buffer
The output waveforms of IC3 are shown. If the power is cut off at time A, when a sufficient amount of time has elapsed since the power was turned on, sufficient charge will be stored in capacitor 2, and if the power is turned on again at time B, when a sufficient amount of time has elapsed from time A. , capacitor 2 is completely discharged, so normal operation is performed. However, if the power is turned off and turned on again in a short period of time, that is, if the power is turned on again at time D immediately after being turned off at point C, the capacitor 2 will not be fully discharged. Since the power is turned on again, it becomes impossible to generate a reset pulse, and there is a risk that the operation of the electronic circuit will become unstable.

This invention was made in order to eliminate the above-mentioned drawbacks, and it is a power supply that uses a general-purpose timer IC and takes advantage of its one-shot characteristics and instant discharge characteristics to ensure that it can follow instantaneous power interruptions. The purpose of this invention is to provide a power-on reset pulse generation circuit.

An embodiment of the present invention will be described below with reference to the drawings. In FIG. 5, 20 is a power supply, 21 is a Zener diode, 22 and 23 are resistors, 24 is a capacitor, and 25 is a timer IC. The Zener diode 21 and the resistor 22 constitute a first series circuit connected across the power supply 20, and the connection point between them is connected to the terminal e of the timer IC.
The resistor 23 and capacitor 24 also form a similar series circuit, and the connection point between them is the timer IC 25.
is connected to terminals d and h of.

FIG. 6 shows the circuit configuration of the timer IC 25. a
is a power input terminal, b is a ground terminal, c is a reference voltage output terminal, d is a threshold input terminal, e is a trigger terminal, f is a reset input terminal, g is an output terminal,
h is a discharge terminal, and i is a bias terminal that supplies a reference voltage created inside the IC to the emitter side of the transistor 15. In addition, 11 is a first voltage comparator, which compares the voltage created inside the IC and appearing at terminal c with the threshold input of terminal d.
When the latter is higher than the former, the output is set to H level. A second voltage comparator 12 compares the voltage at the terminal c and the trigger input at the terminal e, and sets the output to H level when the latter is lower than the former.
13 is a flip-flop, and the first voltage comparator 1
1 is supplied to the reset input, and the output of the second voltage comparator 12 is supplied to the set input,
Its output passes through the buffer IC 14 and appears at the terminal g. 15 is a reset transistor, and 16 is a discharge transistor.

Next, the operation will be explained. After the power source 20 is turned on, the trigger terminal e is grounded via the resistor 22 until the level reaches a certain level. Therefore, in this state, the output of the second voltage comparator 12 becomes H level, and this output causes the flip-flop 1 to
3 is set. As a result, the output of the flip-flop 13 becomes 0, and the output of the terminal g becomes 0. Next, when the power supply 20 reaches a predetermined level and a Zener current flows through the Zener diode 21,
The voltage at trigger terminal e increases, which causes the second
voltage comparator 12 is inverted, flip-flop 1
The set input of No. 3 becomes L level. On the other hand, after the power supply 20 is turned on, the voltage at the threshold terminal d increases with a time constant determined by the product of the constant values of the resistor 23 and the capacitor 24. When the power supply voltage is _Vcc , the reference voltage inside the timer IC 25 is 2/3× _Vcc , and when (threshold voltage)≧2/3× _Vcc , the first voltage comparator 11 is inverted,
A reset input is applied to flip-flop 13, its output becomes 1, and the output of terminal g also becomes 1.
Furthermore, since the terminals d and h are connected in common, the output becomes 1 and the transistor 16 becomes conductive, and at the same time, the charge stored in the capacitor 24 is instantly discharged through the transistor 16.
The voltage across capacitor 24 remains approximately 0V. The transistor 16 is turned off only when the next trigger input is applied to the trigger terminal e.

In FIG. 7A, A turns on the power at time P,
This shows the power supply voltage waveform when the power is cut off at time Q and then turned on again at time R, where V _T is the trigger level determined by the Zener voltage of the Zener diode 21. In addition, B is the voltage waveform of the trigger terminal e corresponding to the waveform of A. In FIG. 7B, C is the threshold voltage waveform at terminal d, which is approximately determined by 1.1×(value of resistor 23)×(value of capacitor 24). D is the output waveform from terminal g. As is clear from this figure, since the above circuit reliably follows the instantaneous shutoff and restart of the power supply, it never fails to generate a reset pulse.

FIG. 8 shows an example of application of the reset pulse generating circuit 30 shown in FIG. 5 to an IC circuit, and FIG. 9 shows an example of application to a relay logic circuit.

As described above, by using a general-purpose timer IC, the present invention has the effect of reliably generating a reset pulse no matter what timing the power is turned off and turned on again.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram of a conventional reset pulse generation circuit, Figure 2 is an equivalent circuit diagram of the circuit in Figure 1 when the power is turned on, Figure 3 is an equivalent circuit diagram when the power is turned off, and Figure 4 is an equivalent circuit diagram of the circuit in Figure 1. Voltage waveform diagram of each part in the circuit shown in Figure 5
The figure is a circuit diagram of a reset pulse generation circuit according to an embodiment of the present invention, Figure 6 is a circuit diagram of a timer IC used in the circuit of Figure 5, and Figures 7A and B are various parts of the circuit of Figure 5. The voltage waveform diagrams in FIGS. 8 and 9 are circuit diagrams showing application examples of the circuit in FIG. 5, respectively. 11, 12... Voltage comparator, 13... Flip-flop, 14... Buffer, 15, 16... Transistor, 20... Power supply, 21... Zener diode, 2
2, 23...Resistor, 24...Capacitor, 25...Timer IC, 30...Reset pulse generation circuit. In addition,
The same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

[Claims] 1 has a threshold input terminal, a trigger terminal, a discharge terminal, and a reset pulse output terminal, compares the threshold voltage applied to the threshold input terminal with a predetermined set voltage, and detects when the threshold voltage becomes higher than the set voltage. a first comparator that inverts the output when the trigger voltage is applied to the trigger terminal, and a second comparator that inverts the output when the trigger voltage becomes higher than the set voltage by comparing the trigger voltage applied to the trigger terminal with the set voltage; It enters the first state upon receiving the inverted output of the comparator and the second comparator, enters the second state upon receiving the inverted output of the first comparator, and outputs a reset pulse to the reset pulse output terminal. A timer IC has a flip-flop that discharges the capacitor, a discharge circuit that discharges the capacitor using the reset pulse, and a Zener diode and a resistor connected across the power supply. a first series circuit connected to the power source; and a second series circuit comprising a resistor and a capacitor connected across the power source, the connection point between the two being connected to the threshold input terminal. Power-on reset pulse generation circuit.