JPH03111012U - - Google Patents
Info
- Publication number
- JPH03111012U JPH03111012U JP2037090U JP2037090U JPH03111012U JP H03111012 U JPH03111012 U JP H03111012U JP 2037090 U JP2037090 U JP 2037090U JP 2037090 U JP2037090 U JP 2037090U JP H03111012 U JPH03111012 U JP H03111012U
- Authority
- JP
- Japan
- Prior art keywords
- input signal
- diodes
- phase divider
- signals
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Manipulation Of Pulses (AREA)
Description
第１図は本考案に係る周波数逓倍器の第１の実
施例を示す構成回路図、第２図は従来の周波数逓
倍器を示す構成回路図、第３図は第２図回路の動
作を示すタイムチヤートである。
１……位相分配器、Ｖｉｎ……入力信号、Ｄ１
，Ｄ２……ダイオード、Ｖｃｃ……直流バイアス
電圧。
Figure 1 is a configuration circuit diagram showing a first embodiment of the frequency multiplier according to the present invention, Figure 2 is a configuration circuit diagram showing a conventional frequency multiplier, and Figure 3 shows the operation of the circuit shown in Figure 2. It is a time chart. 1... Phase divider, V in ... Input signal, D 1
, D 2 ... diode, Vcc ... DC bias voltage.
Claims (1)
分配器の出力側から位相が逆の２つの信号を出力
し、前記信号を２つのダイオードが交互に導通す
ることにより、前記入力信号の偶数倍の周波数の
信号を得る周波数逓倍器において、少なくとも一
方のダイオードの一端に直流バイアス電圧を加え
ることにより、奇数次の高調波を除去するように
構成したことを特徴とする周波数逓倍器。 An input signal is applied to the input side of the phase divider, two signals with opposite phases are output from the output side of the phase divider, and two diodes conduct the signals alternately, thereby converting the input signal into an even multiple of the input signal. 1. A frequency multiplier for obtaining a signal with a frequency of , which is configured to remove odd-order harmonics by applying a DC bias voltage to one end of at least one of the diodes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2037090U JPH03111012U (en) | 1990-02-28 | 1990-02-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2037090U JPH03111012U (en) | 1990-02-28 | 1990-02-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03111012U true JPH03111012U (en) | 1991-11-14 |
Family
ID=31523460
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2037090U Pending JPH03111012U (en) | 1990-02-28 | 1990-02-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03111012U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2018133683A (en) * | 2017-02-15 | 2018-08-23 | アンリツ株式会社 | Frequency multiplier and measuring apparatus including the same |
-
1990
- 1990-02-28 JP JP2037090U patent/JPH03111012U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2018133683A (en) * | 2017-02-15 | 2018-08-23 | アンリツ株式会社 | Frequency multiplier and measuring apparatus including the same |