JPH03106139A - Discrimination device for quality of transmission line - Google Patents

Discrimination device for quality of transmission line

Info

Publication number
JPH03106139A
JPH03106139A JP24422789A JP24422789A JPH03106139A JP H03106139 A JPH03106139 A JP H03106139A JP 24422789 A JP24422789 A JP 24422789A JP 24422789 A JP24422789 A JP 24422789A JP H03106139 A JPH03106139 A JP H03106139A
Authority
JP
Japan
Prior art keywords
circuit
signal
quality
series
discrimination
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24422789A
Other languages
Japanese (ja)
Inventor
Kazutomo Souma
一等 相馬
Seiji Fukuda
福田 誠二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Engineering Ltd
Original Assignee
NEC Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Engineering Ltd filed Critical NEC Engineering Ltd
Priority to JP24422789A priority Critical patent/JPH03106139A/en
Publication of JPH03106139A publication Critical patent/JPH03106139A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To reduce the circuit scale and the power consumption by using one transmission line quality discrimination series in time division corresponding to each input signal series. CONSTITUTION:A signal selection circuit (a) selects an input interface signal 2 among inputted interface signals 11...1n with a series selection signal 8 generated from a control signal generating circuit (g). From the selected input interface signal 2, the quality is discriminated by an interface signal - NRZ signal conversion circuit (b), an error pulse detection circuit (c) and a quality discrimination circuit (d) to obtain quality discrimination resulting information 5. Then the input interface signals are being selected sequentially under the control of the series selection signal 8 to obtain the quality discrimination resulting information 5 corresponding to each series. After the quality discrimination resulting information 5 is stored sequentially in a discrimination result storage circuit (e), an overall discrimination circuit (f) outputs transmission line quality deterioration information 7 as the overall discrimination of the transmission quality of the n-series of the transmission lines for each period of the series selection signal 8. Thus, the scale of the circuit is reduced and the power consumption is decreased.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はディジタル信号を伝送するn系列の伝送路の伝
送品質を判定する伝送路品質判定装置に関する. 〔従来の技術〕 従来のかかる伝送品質判定装置は、n系列の伝送路のそ
れぞれにおいて個別に品質を判定した後、n系列の判定
結果を2論理和演算することにより伝送路の品質劣化を
検出している。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a transmission path quality determination device that determines the transmission quality of n-sequence transmission paths for transmitting digital signals. [Prior Art] Such a conventional transmission quality determination device detects quality deterioration of the transmission path by individually determining the quality of each of the n series of transmission paths, and then performing a two-OR operation on the determination results of the n series. are doing.

第2図を参照して、従来例について更に説明する. 伝送品質を判定すべきn系列の伝送路のそれぞれの送端
に試験用ディジタル信号を入力し受端で得たn系列の入
力インタフェース信号11・・・1nは、それぞれのイ
ンタフェース信号一NRZ信号変換回路bに入力され、
NRZ信号31・・・3nに変換される.NRZ信号3
1・・・3nはそれぞれの誤りパルス検出回路Cに入力
され、各NRZ信号列中の誤りパルス41・・・4nが
検出される。誤りパルス41・・・4nはそれぞれの品
質判定回路dに入力され、誤りパルス41・・・4nを
計数することにより品質劣化が判定される.判定された
各列の品質判定情報51・・・5nはOR回路hに入力
され、伝送路品質劣化情報7を出力する。
The conventional example will be further explained with reference to FIG. A test digital signal is input to each sending end of the n-series transmission line whose transmission quality is to be judged, and the n-series input interface signals 11...1n obtained at the receiving end are converted into NRZ signal from each interface signal. input to circuit b,
Converted to NRZ signals 31...3n. NRZ signal 3
1...3n are input to each error pulse detection circuit C, and error pulses 41...4n in each NRZ signal train are detected. The error pulses 41...4n are input to each quality determination circuit d, and quality deterioration is determined by counting the error pulses 41...4n. The determined quality determination information 51 . . . 5n of each column is input to an OR circuit h, which outputs transmission path quality deterioration information 7.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の伝送路品質判定装置は、伝送品質を判定
するため、n系列の伝送路に対して各列ごとにインタフ
ェース信号一NRZ信号変換回路,誤りパルス検出回路
,品質判定回路が必要である.そのため伝送路の系列数
nの増加にともない、前記各回路の必要数も同じたけ増
加するため回路規模が大きくなり、消費電力も多くなる
欠点を有している。
The conventional transmission line quality determination device described above requires an interface signal to NRZ signal conversion circuit, an error pulse detection circuit, and a quality determination circuit for each column of n series transmission lines in order to determine transmission quality. .. Therefore, as the number n of transmission line series increases, the required number of each of the circuits increases by the same amount, resulting in a disadvantage that the circuit scale increases and the power consumption also increases.

〔課題を解決するための手段〕 本発明の伝送路品質判定装置は、伝送品質を判定すべき
n系列(nは2以上の整数)の伝送路のそれぞれの送端
に試験用ディジタル信号を入力し受端で得たn系列のイ
ンタフェース信号を1系列ずつ順次時分割的に選択出力
する信号選択回路と、この信号選択回路から入力したそ
れぞれの系列の前記インタフェース信号中の誤りパルス
を検出する誤りパルス検出回路と、前記誤りパルスをも
とに前記インタフェース信号の信号品質を判定する品質
判定回路と、この品質判定回路の判定結果を前記信号選
択回路の選択切替周期ごとに蓄積する判定結果蓄積回路
と、この判定結果蓄積回路の蓄積情報より前記n系列の
インタフェース信号の品質を判定する総合判定回路と、
前記信号選択回路、判定結果蓄積回路及び総合判定回路
を制御する制御信号発生回路とを備えている。
[Means for Solving the Problems] The transmission line quality determination device of the present invention inputs a test digital signal to each sending end of n series (n is an integer of 2 or more) of transmission lines whose transmission quality is to be determined. a signal selection circuit that sequentially selects and outputs the n series of interface signals obtained at the receiving end one series at a time in a time-division manner; and an error detection circuit that detects error pulses in the interface signals of each series input from the signal selection circuit. a pulse detection circuit; a quality determination circuit that determines the signal quality of the interface signal based on the error pulse; and a determination result accumulation circuit that accumulates the determination result of the quality determination circuit every selection switching period of the signal selection circuit. and a comprehensive determination circuit that determines the quality of the n series of interface signals from the information accumulated in the determination result accumulation circuit;
A control signal generation circuit is provided for controlling the signal selection circuit, the determination result accumulation circuit, and the comprehensive determination circuit.

本発明の伝送路品質判定装置は、前記信号選択回路から
入力した前記インタフェース信号をNRZ信号に変換し
て前記誤りパルス検出回路へ出力する変換回路を含んで
構成されてもよい.〔実施例〕 次に、本発明について図面を参照して説明する。
The transmission line quality determination device of the present invention may include a conversion circuit that converts the interface signal input from the signal selection circuit into an NRZ signal and outputs the signal to the error pulse detection circuit. [Example] Next, the present invention will be described with reference to the drawings.

第1図は本発明の一実施例のブロック図である. 伝送品質を判定すべきn系列の伝送路のそれぞれの送端
に試験用ディジタル信号を入力し受端で得たn系列の入
力インタフェース信号11・・・1nは信号選択回路a
に入力される.信号選択回路aにおいて、制御信号発生
回路gより発生される列選択信号8により、入力インタ
フェース信号l1・・・1nのうち1つの入力インタフ
ェース信号2が選択される.選択された入力インタフェ
ース信号2は、第2図に示す従来例におけると同一のイ
ンタフェース信号一NRZ信号変換回路b,誤りパルス
検出回路C,品質判定回路dにより、品質が判定されて
品質判定結果情報5を得る.同様にして列選択信号8の
制御のもとに、順次、入力インタフェース信号が選択さ
れ、各系列に対応した品質判定結果情報5を得る。各系
列に対応した品質判定結果情報5は、列選択信号8の制
御のもとに、順次、判定結果蓄積回路eに蓄積された後
、総合判定回路fにより列選択信号8の1周期ごとに、
n系列の伝送路の伝送品質の総合判定として、伝送路品
質劣化情報7を出力する。
FIG. 1 is a block diagram of an embodiment of the present invention. Input interface signals 11...1n of n series obtained at the receiving end by inputting a test digital signal to each sending end of the transmission line of n series whose transmission quality is to be judged are signal selection circuit a.
is input into . In the signal selection circuit a, one input interface signal 2 among the input interface signals l1...1n is selected by the column selection signal 8 generated by the control signal generation circuit g. The quality of the selected input interface signal 2 is determined by the same interface signal-NRZ signal conversion circuit b, error pulse detection circuit C, and quality determination circuit d as in the conventional example shown in FIG. 2, and quality determination result information is obtained. Get 5. Similarly, input interface signals are sequentially selected under the control of the column selection signal 8, and quality determination result information 5 corresponding to each sequence is obtained. The quality judgment result information 5 corresponding to each series is sequentially accumulated in the judgment result storage circuit e under the control of the column selection signal 8, and then is sent to the comprehensive judgment circuit f for each period of the column selection signal 8. ,
Transmission path quality deterioration information 7 is output as a comprehensive judgment of the transmission quality of the n-series transmission paths.

なお、各伝送路が出力する入力インタフェース信号11
・・・1nがNRZ信号である場合は、インタフェース
信号一NRZ信号変換回路bは不要である. 〔発明の効果〕 以上説明したように本発明は、1系列の伝送路品質判定
系列を各入力信号列に対応して時分割的に使用すること
により、回路規模が小さく、消費電力も少ない経済的な
装置構或が可能となる効果がある.
In addition, the input interface signal 11 output from each transmission line
...If 1n is an NRZ signal, the interface signal-NRZ signal conversion circuit b is not necessary. [Effects of the Invention] As explained above, the present invention uses one transmission line quality judgment series in a time-sharing manner corresponding to each input signal train, thereby achieving an economical design with a small circuit scale and low power consumption. This has the effect of making it possible to have a unique device configuration.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例のブロック図、第2図は従来
例のブロック図である。 a・・・信号選択回路、b・・・インタフェース信号−
NRZ信号変換回路、C・・・誤りパルス検出回路、d
・・・品質判定回路、e・・・判定結果蓄積回路、f・
・・総合判定回路、g・・・制御信号発生回路。
FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram of a conventional example. a...Signal selection circuit, b...Interface signal-
NRZ signal conversion circuit, C...Error pulse detection circuit, d
...Quality judgment circuit, e...Judgment result storage circuit, f.
... Comprehensive judgment circuit, g... Control signal generation circuit.

Claims (2)

【特許請求の範囲】[Claims] (1)伝送品質を判定すべきn系列(nは2以上の整数
)の伝送路のそれぞれの送端に試験用ディジタル信号を
入力し受端で得たn系列のインタフェース信号を1系列
ずつ順次時分割的に選択出力する信号選択回路と、この
信号選択回路から入力したそれぞれの系列の前記インタ
フェース信号中の誤りパルスを検出する誤りパルス検出
回路と、前記誤りパルスをもとに前記インタフェース信
号の信号品質を判定する品質判定回路と、この品質判定
回路の判定結果を前記信号選択回路の選択切替周期ごと
に蓄積する判定結果蓄積回路と、この判定結果蓄積回路
の蓄積情報より前記n系列のインタフェース信号の品質
を判定する総合判定回路と、前記信号選択回路、判定結
果蓄積回路及び総合判定回路を制御する制御信号発生回
路とを備えたことを特徴とする伝送路品質判定装置。
(1) A test digital signal is input to each sending end of the n series (n is an integer of 2 or more) of transmission lines whose transmission quality is to be judged, and the n series of interface signals obtained at the receiving end are sequentially analyzed one series at a time. a signal selection circuit that selectively outputs signals in a time-division manner; an error pulse detection circuit that detects error pulses in each series of the interface signals inputted from the signal selection circuit; a quality determination circuit that determines signal quality; a determination result accumulation circuit that accumulates the determination results of this quality determination circuit every selection switching cycle of the signal selection circuit; and an interface of the n series based on the accumulated information of this determination result accumulation circuit. A transmission line quality determination device comprising: a comprehensive determination circuit that determines the quality of a signal; and a control signal generation circuit that controls the signal selection circuit, the determination result accumulation circuit, and the comprehensive determination circuit.
(2)前記信号選択回路から入力した前記インタフェー
ス信号をNRZ信号に変換して前記誤りパルス検出回路
へ出力する変換回路を含む請求項1記載の伝送路品質判
定装置。
(2) The transmission line quality determination device according to claim 1, further comprising a conversion circuit that converts the interface signal inputted from the signal selection circuit into an NRZ signal and outputs the signal to the error pulse detection circuit.
JP24422789A 1989-09-19 1989-09-19 Discrimination device for quality of transmission line Pending JPH03106139A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24422789A JPH03106139A (en) 1989-09-19 1989-09-19 Discrimination device for quality of transmission line

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24422789A JPH03106139A (en) 1989-09-19 1989-09-19 Discrimination device for quality of transmission line

Publications (1)

Publication Number Publication Date
JPH03106139A true JPH03106139A (en) 1991-05-02

Family

ID=17115633

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24422789A Pending JPH03106139A (en) 1989-09-19 1989-09-19 Discrimination device for quality of transmission line

Country Status (1)

Country Link
JP (1) JPH03106139A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102445620A (en) * 2011-11-21 2012-05-09 东北大学 Transient power quality detection device and method for the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102445620A (en) * 2011-11-21 2012-05-09 东北大学 Transient power quality detection device and method for the same

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