JPH03104236A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH03104236A
JPH03104236A JP24266889A JP24266889A JPH03104236A JP H03104236 A JPH03104236 A JP H03104236A JP 24266889 A JP24266889 A JP 24266889A JP 24266889 A JP24266889 A JP 24266889A JP H03104236 A JPH03104236 A JP H03104236A
Authority
JP
Japan
Prior art keywords
gate electrode
temporary
pattern
side wall
concentration diffused
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP24266889A
Other languages
Japanese (ja)
Other versions
JP2768995B2 (en
Inventor
Naoyoshi Tamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP24266889A priority Critical patent/JP2768995B2/en
Publication of JPH03104236A publication Critical patent/JPH03104236A/en
Application granted granted Critical
Publication of JP2768995B2 publication Critical patent/JP2768995B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE: To manufacture a semiconductor device with good yield by forming a low concentration diffused layer through introducing an impurity into a substrate with a temporary gate electrode pattern being used as a mask, forming a temporary side wall pattern on the side wall of the temporary gate electrode pattern and forming a high concentration diffused layer through using the temporary gate electrode pattern and side wall pattern as a mask.
CONSTITUTION: A gate electrode 6 is formed by etching back to leave a high melting point metal layer 5 only in an aperture 4 through anisotropic RIE. At that time, the gate electrode 6 is formed to the above part of low concentration diffused layers 36a, 36b constituting an LDD structure via a gate insulating film 34. Thus, the gate electrode 6 is provided to the above part of the low concentration diffused layers 36a, 36b so that the gate electrode 6 can have a larger width than, even if the thickness thereof is same as, the case of prior art wherein a gate electrodes is provided on a substrate 31 via the gate insulating film 34 to increase the metal amount, thus a larger amount of the carrier can be controlled. Therefore, the controllability of the gate electrode 6 and the element characteristics can be improved.
COPYRIGHT: (C)1991,JPO&Japio
JP24266889A 1989-09-19 1989-09-19 Method for manufacturing semiconductor device Expired - Fee Related JP2768995B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24266889A JP2768995B2 (en) 1989-09-19 1989-09-19 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24266889A JP2768995B2 (en) 1989-09-19 1989-09-19 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPH03104236A true JPH03104236A (en) 1991-05-01
JP2768995B2 JP2768995B2 (en) 1998-06-25

Family

ID=17092465

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24266889A Expired - Fee Related JP2768995B2 (en) 1989-09-19 1989-09-19 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JP2768995B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003046079A (en) * 2001-07-27 2003-02-14 Hitachi Ltd Semiconductor device and production method therefor
JP2007221158A (en) * 2007-04-03 2007-08-30 Toshiba Corp Semiconductor device and its manufacturing method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003046079A (en) * 2001-07-27 2003-02-14 Hitachi Ltd Semiconductor device and production method therefor
JP2007221158A (en) * 2007-04-03 2007-08-30 Toshiba Corp Semiconductor device and its manufacturing method

Also Published As

Publication number Publication date
JP2768995B2 (en) 1998-06-25

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees