JPH03101079U - - Google Patents

Info

Publication number
JPH03101079U
JPH03101079U JP941190U JP941190U JPH03101079U JP H03101079 U JPH03101079 U JP H03101079U JP 941190 U JP941190 U JP 941190U JP 941190 U JP941190 U JP 941190U JP H03101079 U JPH03101079 U JP H03101079U
Authority
JP
Japan
Prior art keywords
separation circuit
switching element
amplitude
conductive path
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP941190U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP941190U priority Critical patent/JPH03101079U/ja
Publication of JPH03101079U publication Critical patent/JPH03101079U/ja
Pending legal-status Critical Current

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  • Synchronizing For Television (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案による同期信号分離回路の一実
施例の回路図、第2図は従来の同期信号分離回路
のブロツク図、第3図はハムやサグの影響を受け
た複合テレビジヨン信号を示す図である。 16……振幅分離回路、18……トランジスタ
(スイツチング素子)、20……直流電源、28
……微分回路(導通回路)、22……抵抗器(バ
イアス供給手段)。
Fig. 1 is a circuit diagram of an embodiment of the sync signal separation circuit according to the present invention, Fig. 2 is a block diagram of a conventional sync signal separation circuit, and Fig. 3 shows a composite television signal affected by hum and sag. FIG. 16... Amplitude separation circuit, 18... Transistor (switching element), 20... DC power supply, 28
...Differentiating circuit (conduction circuit), 22...Resistor (bias supply means).

Claims (1)

【実用新案登録請求の範囲】 (1) 振幅分離回路と、この振幅分離回路の入力
側に導電路の一端を接続されたスイツチング素子
と、このスイツチング素子の導電路の他端に接続
された直流電源と、上記スイツチング素子の制御
電極と上記振幅分離回路の出力側との間に設けら
れ上記振幅分離回路で分離された同期信号に関連
する信号を上記スイツチング素子に供給してこれ
を導通させる回路とを、具備する同期信号分離回
路。 (2) 請求項1記載の同期信号分離回路において
、上記スイツチング素子がトランジスタであり、
このスイツチングトランジスタのベースと上記直
流電源との間に接続され、上記スイツチングトラ
ンジスタのベースから上記導電路であるエミツタ
・コレクタ導電路を介して上記振幅分離回路の入
力側にバイアスを供給する手段を、設けてなる同
期信号分離回路。
[Claims for Utility Model Registration] (1) An amplitude separation circuit, a switching element having one end of a conductive path connected to the input side of the amplitude separation circuit, and a direct current connected to the other end of the conduction path of the switching element. a circuit provided between a power source, a control electrode of the switching element, and the output side of the amplitude separation circuit, and supplying a signal related to the synchronization signal separated by the amplitude separation circuit to the switching element to make it conductive; A synchronous signal separation circuit comprising: (2) The synchronizing signal separation circuit according to claim 1, wherein the switching element is a transistor;
means connected between the base of the switching transistor and the DC power supply, and supplying a bias from the base of the switching transistor to the input side of the amplitude separation circuit via the emitter-collector conductive path, which is the conductive path; A synchronous signal separation circuit is provided.
JP941190U 1990-01-31 1990-01-31 Pending JPH03101079U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP941190U JPH03101079U (en) 1990-01-31 1990-01-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP941190U JPH03101079U (en) 1990-01-31 1990-01-31

Publications (1)

Publication Number Publication Date
JPH03101079U true JPH03101079U (en) 1991-10-22

Family

ID=31513014

Family Applications (1)

Application Number Title Priority Date Filing Date
JP941190U Pending JPH03101079U (en) 1990-01-31 1990-01-31

Country Status (1)

Country Link
JP (1) JPH03101079U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56149869A (en) * 1980-04-23 1981-11-19 Nec Corp Synchronism separation circuit
JPS6214859B2 (en) * 1981-12-04 1987-04-04 Matsushita Electric Ind Co Ltd

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56149869A (en) * 1980-04-23 1981-11-19 Nec Corp Synchronism separation circuit
JPS6214859B2 (en) * 1981-12-04 1987-04-04 Matsushita Electric Ind Co Ltd

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