JPH03101077U - - Google Patents

Info

Publication number
JPH03101077U
JPH03101077U JP885990U JP885990U JPH03101077U JP H03101077 U JPH03101077 U JP H03101077U JP 885990 U JP885990 U JP 885990U JP 885990 U JP885990 U JP 885990U JP H03101077 U JPH03101077 U JP H03101077U
Authority
JP
Japan
Prior art keywords
image processing
value
input
processing device
conversion means
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP885990U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP885990U priority Critical patent/JPH03101077U/ja
Publication of JPH03101077U publication Critical patent/JPH03101077U/ja
Pending legal-status Critical Current

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  • Facsimile Image Signal Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の実施例を示す画像処理装置の
構成ブロツク図、第2図は画像の座標系の定義を
示す図、第3図は従来の画像処理装置の構成ブロ
ツク図、第4図は誤差信号の平均値と分散を示す
図、第5図a,bは第1図のγ補正特性図、第6
図a,bは第1図の階調変換特性図である。 10……γ補正回路、11……階調変換回路、
20……2値化回路、30……メモリ。
FIG. 1 is a block diagram of the configuration of an image processing device showing an embodiment of the present invention, FIG. 2 is a diagram showing the definition of the image coordinate system, FIG. 3 is a block diagram of the configuration of a conventional image processing device, and FIG. 4 is a diagram showing the average value and variance of the error signal, Figures 5a and b are the γ correction characteristic diagrams of Figure 1, and Figure 6 is a diagram showing the average value and variance of the error signal.
Figures a and b are gradation conversion characteristic diagrams in Figure 1. 10...γ correction circuit, 11...gradation conversion circuit,
20...Binarization circuit, 30...Memory.

Claims (1)

【実用新案登録請求の範囲】 (1) 原画素の入力多値データを所定の閾値で2
値化する2値化処理手段を有する画像処理装置に
おいて、 前記入力多値データを特定のレベルを持たない
多値データに変換する階調変換手段を、前記2値
化処理手段の入力側に設けたことを特徴とする画
像処理装置。 (2) 請求項1記載の画像処理装置において、前
記階調変換手段は、 少なくとも前記閾値あるいはその近傍の値に変
換しないような階調ジヤンプの領域特性を持つ画
像処理装置。
[Claims for Utility Model Registration] (1) Input multivalued data of original pixels is
In an image processing apparatus having a binarization processing means for digitizing, a gradation conversion means for converting the input multi-value data into multi-value data without a specific level is provided on the input side of the binarization processing means. An image processing device characterized by: (2) The image processing device according to claim 1, wherein the tone conversion means has a tone jump region characteristic that does not convert to at least the threshold value or a value in the vicinity thereof.
JP885990U 1990-01-31 1990-01-31 Pending JPH03101077U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP885990U JPH03101077U (en) 1990-01-31 1990-01-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP885990U JPH03101077U (en) 1990-01-31 1990-01-31

Publications (1)

Publication Number Publication Date
JPH03101077U true JPH03101077U (en) 1991-10-22

Family

ID=31512475

Family Applications (1)

Application Number Title Priority Date Filing Date
JP885990U Pending JPH03101077U (en) 1990-01-31 1990-01-31

Country Status (1)

Country Link
JP (1) JPH03101077U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007191883A (en) * 2006-01-18 2007-08-02 Global Arts:Kk Joint forming spacer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007191883A (en) * 2006-01-18 2007-08-02 Global Arts:Kk Joint forming spacer

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