JPH0298644U - - Google Patents

Info

Publication number
JPH0298644U
JPH0298644U JP1989007336U JP733689U JPH0298644U JP H0298644 U JPH0298644 U JP H0298644U JP 1989007336 U JP1989007336 U JP 1989007336U JP 733689 U JP733689 U JP 733689U JP H0298644 U JPH0298644 U JP H0298644U
Authority
JP
Japan
Prior art keywords
cavity
center
semiconductor package
forming
periphery
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1989007336U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989007336U priority Critical patent/JPH0298644U/ja
Publication of JPH0298644U publication Critical patent/JPH0298644U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68Shapes or dispositions thereof
    • H10W70/682Shapes or dispositions thereof comprising holes having chips therein
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Die Bonding (AREA)
JP1989007336U 1989-01-24 1989-01-24 Pending JPH0298644U (enExample)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989007336U JPH0298644U (enExample) 1989-01-24 1989-01-24

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989007336U JPH0298644U (enExample) 1989-01-24 1989-01-24

Publications (1)

Publication Number Publication Date
JPH0298644U true JPH0298644U (enExample) 1990-08-06

Family

ID=31212264

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989007336U Pending JPH0298644U (enExample) 1989-01-24 1989-01-24

Country Status (1)

Country Link
JP (1) JPH0298644U (enExample)

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