JPH0295211A - Data picking up and recording device - Google Patents

Abstract

PURPOSE:To read out compiled data in the machine of its own and to record and reproduce it by a recorder, etc., by constituting the title device of a signal conversion circuit, a display unit having display functions in two systems and a microprocessor, etc. CONSTITUTION:At first, conditions necessary for logging are set in an operation part 40. The conditions are stored in a memory 60. By driving scanners 21-2n according to the start of logging, analog inputs supplied from input terminals 11-1n are successively taken in the signal conversion circuit 30 and converted into digital signals to be stored in a memory 60 through muP (microprocessor) 50. Then, a memory read mode is started by an operation part 40, so that memory data is successively converted into display data sequentially in time and numerically displayed on the display part (a) of the display unit 70. Since the initial value of logging period, etc., is stored in the memory 60 in virtue of the setting on the operation part 40, the data NO, real time, etc., corresponding to the data read out are displayed on a display part (b) as soon as the data is displayed on the display part (a).

Description

DETAILED DESCRIPTION OF THE INVENTION <Field of Industrial Application> The present invention relates to a portable data recording device suitable for on-site use.

<Background of the Invention> A data recording device records data at multiple points and displays the stored data. Among such data recording devices, especially portable type ones for on-site use, it would be convenient if the data and set parameters could be read out within the device without connecting the collected data to other equipment. It would be convenient if the data could be recorded and played back on a recorder or the like at the required time.

<Problems to be Solved by the Invention> The present invention aims to realize a data recording device with the above-mentioned functions with a relatively simple mechanism, and is a portable type device suitable for on-site use. This is what we provide.

Means for Solving the Problems> In order to achieve the above object, the present invention provides an analog-to-digital conversion function composed of common parts and a digital conversion function.
It is constructed using a signal conversion circuit with an analog conversion function, a display device with at least two systems of display functions, and a microprocessor that controls these. Hereinafter, examples will be described in detail using figures.

<Embodiment> FIG. 1 is a block diagram of an embodiment of a data recording device according to the present invention. In FIG. 1, 11, 12, . . . , bow n are terminals to which analog inputs are applied, respectively; ...2
n is a scanner, and 30 is a signal conversion circuit. This signal conversion circuit connects the scanners 21 to 2 [I to the input terminals 11 to 2].
An analog-digital conversion function (hereinafter referred to as A/D conversion function) that converts the analog input applied from 1n into a digital signal, and a digital-analog conversion function (hereinafter referred to as “A/D conversion function”) that converts the acquired digital data into an analog signal. (D/A conversion ate).

30a is an output terminal from which the analog signal is taken out. 4
0 is an operation unit, 50 is a microprocessor (hereinafter referred to as μP) that controls the arithmetic and control functions of this device, and 60 is a memory. The operation unit 40 is used to set conditions necessary for logging such as logging interval, measurement channel selection, and range, and the setting parameters are stored in the memory 60 under the control of the μP 50. The μP 50 reads out the conditions necessary for logging stored in the memory 60 from the operation unit 40, controls the A/D conversion function in the signal conversion circuit 30 based on the data, and controls the A/D conversion and D/D conversion function.
A digital signal converted by the A/D conversion function, which performs the switching action of the A conversion function, is taken into the memory 60 via the μP 50. 70 is a memory 60 under the control of μP50.
This is a display device that displays data stored in the . This display has at least 62 display sections a and b as shown in FIG.
It has a number display section for the system, and in the embodiment, the measurement data is displayed on the display section a, and the data number is already displayed on the display section.

Parameters such as elapsed time or real time from the start of logging are displayed. The operation of the apparatus of the present invention having such a configuration will be explained as follows.

First, the conditions necessary for the above-mentioned logging are set on the operation unit 40. This setting condition is stored in the memory 60 via the μP 50. By starting logging, the scanners 21 to 2n are driven according to preset conditions, and the analog inputs supplied from the input terminals 11 to 1n are sequentially input to the signal conversion circuit 30, and the A/D conversion function in this signal conversion circuit is performed. converts the analog input into a digital signal at regular intervals. The converted digital signals are sequentially stored in memory 60 via μP 50. In this manner, during logging, the signal conversion circuit 30 mainly operates as an A/D conversion function.

By selecting and starting the memory read mode on the operation unit 40, the acquired data stored in the memory 60 is read in chronological order under the control of the μP 50. A constant speed that can be followed visually by the user (
For example, every - seconds), the display data is converted into display data, and the display data is displayed numerically on the display section a of the display 70. Logging period.

The initial wIfli such as the start time is stored in the memory 60 according to the settings on the operation unit 40, and at the same time when the acquired data on the display unit a″1″ of the display unit 70 is displayed, the display unit 7
Data N corresponding to the read data on the display section 0
o, the elapsed time from the start, the actual time, etc. are displayed numerically.

At the time of memory read, the signal conversion circuit 30 is switched from the A/D conversion function to the D/A conversion function under the control of the μP 50, and the acquired data read from the memory 60 is transferred to the D/A conversion function.
Add to A conversion function. Thereby, memory data is converted into an analog signal at the memory read speed, and the analog signal is taken out from the output terminal 30a. In this way, when reading memory, the signal conversion circuit 30 uses the A/D
No conversion function is required. The analog output taken out during this memory read has a relatively long logging cycle, so that data acquired over a long period of time can be easily recorded and reproduced in a short time on, for example, an analog recorder at a desired time.

Here, various circuits can be considered as the signal conversion circuit 30, but the circuit diagram of an embodiment in which the 17f1 width/analog voltage converter and the analog/digital converter are configured with common elements is shown in Fig. 3. I will show and explain this. In Figure 3, 11 (12~In) is a terminal to which the analog input shown in Figure 1 is applied, ±Es is a positive and negative reference voltage source, and S
1 and S2 are switches, 31 is an integrator, and a reset switch 31a is connected to the integrating capacitor. 32a and 32b are comparators to which the outputs of the integrator 31 are respectively added, the comparator 32a uses OV as a reference voltage, and the comparator 32b uses +Es as a reference voltage. 33 is the gate, 33
a is a clock pulse; 34 is a clock pulse 3 which receives the output of the comparators 32a, 32b and passes through the gate 33;
This is a gate control circuit that controls 3a. 34a is a counter that counts the tarok pulse 33a that has passed through the gate 33; 50 is the μI described in FIG. 1; input terminal 11 (12~In); reference voltage ±Es; integrator 31; , 32b, gate 33. Gate control circuit 3
4. A of the double integral type by the counter 34a and μP50
/D converter is configured.

35 is a sample/hold circuit consisting of a sample switch 35a, a hold capacitor 35b, and a buffer amplifier 35c, and is connected to the output terminal of the integrator 31. The A/D converter constitutes a time width/analog voltage converter. Signal conversion circuit 3o in such a configuration
The operation of A/D conversion 1 is first explained using FIG. 4 as follows. In this case, the gate control circuit 3
4, the output of the comparator 32b is prohibited and only the comparator 32a operates.

In FIG. 4, by turning on the relay switch 21 at time t1, an analog input is applied from the input terminal 11 to the integrator 31 and integrated.

The switch 21 is turned on for a certain period of time 1 and turned off at time t2. At the same time, switch S1 is turned on, and the polarity is opposite to that of the input. The semi-E indenter Es is the integrator 31
is added to the gate control circuit 3 and starts to be integrated.
The output of 4 opens gate 33, through which clock pulses 33a are applied to counter 34a and counted.

When the output of the integrator 31 decreases and its value passes the zero level, the comparator 32a detects this and closes the gate 336.
As is well known, the period T2 from time t2 to time t3 when the integrator output crosses the zero level corresponds to the value of analog human power, and the counter 34a does not count the clock pulses 33a passing through the gate 33 during this T2 period. The content of corresponds to the value of the analog input to be converted. The contents of counter 34a are stored via )t P 50 in memory 60 as described in FIG.

Next, the operation of the time width/analog voltage converter will be explained using FIG. In this case, the comparator 32b is disabled and both comparator units operate. When switch S2 is turned on,
The reference voltage -Es is applied to the integrator 31, and the integrator output is greater than the zero level by the reference voltage +1! , increases to S. The zero level is detected by the comparator 32a, and the zero level is detected by the comparator 32a.
2b. The outputs of these two comparators are applied to a gate control circuit 34 which keeps the gate 33 open during this period and the clock pulses 33a passing through it are counted by a counter 34a. The total t& value of the counter 34a is μ
Incorporated into P50. No. zP50 is set to switch 31a after a predetermined period of time has passed since the output of integrator 31 reaches 10Es.
After turning on the switch to reset the integrator 31, the switch is turned off and the integrator 31 integrates the reference voltage -Es again. The counter 34a has a preset function, and the time T'o is preset using this preset terminal.The integrator 31 integrates the reference voltage -Es again after being reset, but when To is reached, the switch S2 is activated. Turn off. At the same time, the μP 50 turns on the switch 35a of the sample-and-hold circuit 35, samples the output of the integrator 31, and holds the value in the capacitor 35b. This bold voltage is taken out as an analog output from the output terminal 30a also shown in FIG. 1 via the buffer amplifier 35c.

Effects of the Present Invention> As explained above, according to the present invention, acquired data can be read out within the device without being connected to other equipment, and the acquired data can be recorded on a recorder or the like. - Since it can be regenerated, it is possible to obtain a small data recording device that is particularly suitable for use in the field, especially in the vortaple type.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an example of a repaired data recording device according to the present invention, FIG. 2 is an explanatory diagram of the configuration of a display used in the device shown in FIG. 1, and FIG. 3 is a signal diagram used in the device shown in FIG. The connection diagrams of the conversion circuit portion, FIGS. 4 and 5, are diagrams for explaining the operation of the signal conversion circuit portion of FIG. 3. 11~In...Input terminal, 21~2n...Scanner, 30...Signal conversion circuit, 40...Operation unit, 50...
...Microprocessor, 60...Memory, 70.
··display.

Claims (1)

[Claims] A signal conversion circuit that is composed of common elements and has an analog-to-digital conversion function and a digital-to-analog conversion function,
Display device with at least two display systems, micro-
Consists of a control/calculation unit consisting of a processor, a memory, and an operation unit, and in logging mode, converts analog input into digital signals at predetermined time intervals using the analog/digital conversion function in the signal conversion circuit under preset conditions. and store this digital signal in the memory,
In the memory read mode, the memory data and its parameters are simultaneously displayed in chronological order on the display, and the memory data and its parameters are displayed as necessary using the digital-to-analog conversion function of the signal conversion circuit. A data recording device characterized in that it is configured to convert data into an analog signal and output it.