JPS61138047U - - Google Patents

Description

[Brief explanation of the drawing]

Figure 1 is a circuit diagram showing one embodiment of the present invention;
The figure is a circuit diagram of a conventional analog signal output device. 1,1-1n...analog memory element, 3...register, 4...timing controller, 5...D/A
Converter, 6... Power supply abnormality detection circuit, 7... Initialization judgment circuit, 8... Output clear circuit.

Claims (1)

[Scope of utility model registration request] An analog signal output device that converts a digital value set in a register into an analog signal using a D/A converter, samples and holds this analog signal in an analog memory element under the control of a timing controller, and then outputs it to the outside. A power supply abnormality detection circuit that detects a voltage abnormality; and a power supply abnormality detection signal output from the power supply abnormality detection circuit, or a signal output from the register indicating an unwritten state of a digital value, which is input to the register. an initialization determination circuit that outputs a clear signal for clearing;
an output clear circuit for controlling a digital value input to the D/A converter so that the output signal of the D/A converter becomes zero volts upon input of the clear signal; An analog signal output device characterized in that the analog memory element is controlled to be in a sample state by inputting the power supply abnormality detection signal.