JPH0294796A - Multi-processor exchange station system - Google Patents

Multi-processor exchange station system

Info

Publication number
JPH0294796A
JPH0294796A JP24401588A JP24401588A JPH0294796A JP H0294796 A JPH0294796 A JP H0294796A JP 24401588 A JP24401588 A JP 24401588A JP 24401588 A JP24401588 A JP 24401588A JP H0294796 A JPH0294796 A JP H0294796A
Authority
JP
Japan
Prior art keywords
communication processing
auxiliary storage
common information
processor
storage device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24401588A
Other languages
Japanese (ja)
Inventor
Nobuyuki Masaoka
正岡 信行
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP24401588A priority Critical patent/JPH0294796A/en
Publication of JPH0294796A publication Critical patent/JPH0294796A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To reduce system starting up time by reading initial common information for setting system initial state of plural communication processing processors and common information for preceding transmission for initial setting with an active auxiliary storage and a standby auxiliary storage respectively simultaneously. CONSTITUTION:A master communication processor 1 reads the common information of a communication processing processor i2 and a communication processing processor n21 from an active auxiliary storage device 3 in a signal form of the initial setting information 4 and gives a read request to an area 5 of a memory 0, reads the common information of the communication processing processor i2 and the communication processing processor n21 from a standby auxiliary storage device 31 in a form of the initial setting information 4 and gives a read request to an area 51 of the memory 1. The common information of the area 5 of the memory 0 is set to an initial setting common information set section 12 and the initial setting common information 6 is transferred simultaneously by the multiple address processing to the processors i2, n21. Succeedingly, the common information of the area 51 of a memory 1 is similarly transferred to the processors i2, n21 by the multiple address processing simultaneously. Thus, the system starting up time is reduced.

Description

【発明の詳細な説明】 「産業上の利用分野〕 本発明は、マルチプロセッサ交換局のシステム立上げ時
間短縮に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to reducing the system start-up time of a multiprocessor switching center.

〔従来の技術〕[Conventional technology]

従来の交換機のシステム立上げ方式は、昭和55年度電
子通信学会通信部門全国大会講演論文集〔分冊1]P1
−183に記載されているように、現用補助記憶装置か
らのみシステム初期設定用情報%/R上げ、各々のプロ
セッサに転送し初期設定を行っていた。
The system start-up method for conventional switching equipment is the collection of papers from the 1985 National Conference of the Telecommunications Division of the Institute of Electronics and Communication Engineers [Volume 1] P1
-183, system initialization information %/R was raised only from the current auxiliary storage device and transferred to each processor for initialization.

〔発明が解決りようとする課題〕[Problem that the invention seeks to solve]

上記従来技術は、通信処理機能を実現する複数ノ通信処
理プロセッサと、システム運用機能を実現するマスク通
信処理プロセッサから構成されるマルチプロセッサ交換
局において、システム立上げ時、マスク通信処理プロセ
ッサに接続されている現用系補助記憶装置からのみ、シ
ステム初期設定用情報を読上げ、各々のプロセッサに転
送する処理ケ操返し行うととiCより、マルチプロセッ
サ交換局システム立上げを行っているため、交換機全体
のシステム立上げ時間がかかりすぎるという問題があっ
to 本発明の目的は、マルチプロセッサ交換局システム立上
げ時間短縮を計ることである。
In the above-mentioned conventional technology, in a multiprocessor exchange consisting of a plurality of communication processing processors that realize communication processing functions and a mask communication processing processor that realizes system operation functions, when the system is started up, the communication processing processor is connected to the mask communication processing processor. The system initialization information is read out only from the active auxiliary storage device, and the process of transferring it to each processor is performed.Since the multiprocessor exchange system is started up from the iC, the entire exchange There is a problem that it takes too much time to start up the system.An object of the present invention is to reduce the time required to start up a multiprocessor exchange system.

〔課題を解決するための手段J 上記目的は、あらかじめマスク通信処理プロセッサに現
用補助記憶装置および、予備補助記憶裟[代′fX’接
続し、マルチプロセンサシステム交換局立上げ時、現用
補助記憶装置からシステム初期設定用M回情報を、マス
ク41M処理プロセッサのメモリ0而に読上げ、予備記
憶袈咋からはシステム初期設定用次回転送用情報を、マ
スタ通信処理プロセッサのメモリ1而に同時Vcg上げ
後、まずメモ90面IC読上げられfこ初期設定用情報
ケ各々のプロセッサに回部処理で同時初期設定する。続
いてメモリ1面に読上げられた初期設定用情報を同様′
c/?!r々のプロセッサに転送する。
[Means for Solving the Problems J] The above purpose is to connect the current auxiliary storage device and the backup auxiliary storage device [fX'' to the mask communication processing processor in advance, and to connect the current auxiliary storage device and the backup auxiliary storage device [fX] to the mask communication processing processor, and to The system initialization M times information is read out from the device to the memory 0 of the mask 41M processing processor, and the next transfer information for system initialization is read out from the preliminary memory to the memory 1 of the master communication processor at the same time. After that, first, the memo 90 is read out to the IC, and the initial setting information is simultaneously initialized in each processor in a circular process. Next, read out the initial setting information to the first side of memory in the same way.
c/? ! r processors.

以“−上1、現用補助記1意裟肯のみでな(、予備補助
記憶装置からも、各々のプロセンサに転送する初期設定
用情報を、現用補助記憶装置から読上げと同時に読上げ
ろことにより、マルチプロセッサ交換局システム立上げ
時間ケ短縮することが出来る。
Above 1, current auxiliary memory 1 Please read out the initial setting information to be transferred to each processor from the auxiliary storage device at the same time as the reading from the current auxiliary storage device. It is possible to shorten the startup time of a multiprocessor exchange system.

〔作用〕[Effect]

マスタ通1ど処理プロセッサのシステム初期設定は、マ
スク)Jfl信処理プロセフすに接続されている現用補
助記憶装置凌から、システム初期設定用情報を読上げる
ことにより行っている。現用補助記憶K +[が障害時
は、予備補助記憶装置からシスデム初HA設定用情報ケ
読上げ、マスク通信処理プロセッサのシステム初期設定
ケ行っているため、現用補助記憶袋+i虻、予備補助記
憶装置からシステム初期設定用情報を読上げることによ
り、マルチプロセッサ交換局システム立上げにおいて7
法影?’Y及ぼすことはない。
System initialization of the master communication processor is performed by reading out system initialization information from the current auxiliary storage device connected to the master communication processing processor. When the current auxiliary memory K+[ is in failure, the system reads out the initial HA setting information from the backup auxiliary storage and performs the system initialization of the mask communication processor, so the current auxiliary memory + i and the backup auxiliary storage are read out. By reading out system initial setting information from
Hokage? 'Y will not affect you.

〔実i例」 以下、添付の図面を用いて、更に詳細に本発明について
説明する。
[Example I] The present invention will be described in more detail below with reference to the accompanying drawings.

第1図は、本発明に、J:ろマルチフロセッサ父換局シ
ステノ・立上げ方式の一実施例ケ示すシーケンス図であ
る。里1図において、1はマスク通信処理プロセッサ、
2は通信処理プロセッサi、21は通信処理プロセッサ
n、3は現用補助記憶装置装置、31は予備補助記憶装
置、4は初期設定情報、5は読上げメそり0面、51は
読上げメモリ1面、6は初期設定共通情報である。
FIG. 1 is a sequence diagram illustrating an embodiment of the J: filter multiprocessor father exchange system start-up method according to the present invention. In Figure 1, 1 is a mask communication processing processor;
2 is a communication processor i, 21 is a communication processor n, 3 is a current auxiliary storage device, 31 is a spare auxiliary storage device, 4 is initial setting information, 5 is the 0th page of the reading memory, 51 is the 1st page of the reading memory, 6 is initial setting common information.

第2図は、マスク通信処理プロセッサ1から送信された
複数の通信処理プロセンサr 2 s A傷処理プロセ
ッサn21に向う初期設定共通情報6の信号形式の−g
111ケ示し、第3図はマスタ通信処テブr1セッサ1
1C接続された現用補助記ti装置6、予備補助記憶装
置31から、マスク通信処理プロセッサ1が0.出しを
行った初期設定情報40信号形式の一例である。
FIG. 2 shows the -g signal format of the initial setting common information 6 sent from the mask communication processor 1 to the plurality of communication processing processors r2sA flaw processing processor n21.
Figure 3 shows the master communication processing table r1 processor 1.
The mask communication processing processor 1 receives 0. This is an example of the initial setting information 40 signal format that has been issued.

第2図において、9はマスタ通信処理プロセッサ1通信
処理プロセッサi 2− A傷処理プロセッサn21の
間のデータ送受?行ウコマンド種別、10は初期設定共
通情報6を送信するA侶処理プロセクサ12、A傷処理
プロセッサn21.11は初期設定共通情報6の転送語
数、12は通信処理フロセッサ12、通信処理プロセッ
サn21に設定する初期設定共通情報設定部である。
In FIG. 2, reference numeral 9 indicates data transmission and reception between the master communication processor 1 communication processor i2-A flaw processing processor n21? Line C command type, 10 is the A-mate processing processor 12 that sends the initial setting common information 6, A scratch processing processor n21.11 is the number of words to transfer the initial setting common information 6, 12 is the communication processing processor 12, the communication processing processor n21. This is an initial setting common information setting section to be set.

第3図において、9はマスク通信処理プロセッサ1が、
現用補助記憶装置3、予備補助記憶装置31から読出し
ケ行うコマンド種別、13は初期設定情報4の読出し語
数部、14はマスタ通信処理プロセッサ1の読出し先ア
ドレス部、15は現用補助記憶装#3、予備補助記憶装
#31のアドレス部である。
In FIG. 3, 9 indicates a mask communication processing processor 1,
The type of command to be read from the current auxiliary storage device 3 and the backup auxiliary storage device 31, 13 is the number of words to be read from the initial setting information 4, 14 is the read destination address portion of the master communication processor 1, and 15 is the current auxiliary storage #3 , is the address part of the spare auxiliary storage device #31.

次vCm1図に示す一実施例の動作を成体的に説明する
Next, the operation of one embodiment shown in FIG. vCm1 will be explained in detail.

マスク通信処理プロセッサ1はマスク通信処理プロセッ
サ1に接続されている現用補助記憶装置冴6から各々の
通信処理プロセッサ12 、通信処理プロセッサn21
の共通情報¥第3図の初期設定情報4の信号形式により
読上げメモリ0面5に読上げ要求を出すとともにマスク
通信処理プロセッサ1VC,接続されている予備補助記
憶装置31から各々の通1M処理プロセッサ12、通信
処理プロセツサn21の共通情報を第5図の初期設定情
報4の信号形式により先はど現用補助記憶装置t3から
読上げた次のアドレス部より、読上げメモリ1面51に
読上げ要求を同時に行う。読上げメモリ0面5に読上げ
られた共通情報を、第2図の初期設定共通情報設定部1
2に設定し、筆2図の初期設定共通情報6を各々の通信
処理プロセッサ12、通信処理プロセッサn21に回報
処理で同時に転送する。続いて、読上げメモリ1而51
に読上げられた共通情報ケ同様に各々の通信処理プロセ
ッサi2、通信処理プロセッサn21に回報処理で同時
に転送する。以上のように現用・予備補助記憶装置装償
から同時VC読上げ、読上げメモリ0而・1面転送ケ繰
り返すことによりマルチプロセッサ交換局システム立上
げ時間を短縮することが出来る。
The mask communication processor 1 stores communication processors 12 and 21 from the active auxiliary storage device 6 connected to the mask communication processor 1.
Common information ¥ In accordance with the signal format of the initial setting information 4 shown in FIG. , the common information of the communication processing processor n21 is simultaneously requested to be read out from the next address field read out from the current auxiliary storage device t3 to the readout memory 1 side 51 according to the signal format of the initial setting information 4 shown in FIG. The common information read out to the reading memory 0 side 5 is transferred to the initial setting common information setting section 1 in FIG.
2, and the initial setting common information 6 of the brush 2 drawing is simultaneously transferred to each communication processing processor 12 and communication processing processor n21 by a relay process. Next, reading memory 1 and 51
Similarly, the common information read aloud is simultaneously transferred to each communication processor i2 and communication processor n21 in a relay process. As described above, it is possible to shorten the startup time of the multiprocessor exchange system by repeating the process of loading the current and spare auxiliary storage devices, reading the VC simultaneously, and transferring 0 and 1 pages of the reading memory.

〔発明の効果〕〔Effect of the invention〕

以上の説明から明らかな様に、本発明によれば各々の通
信処理プロセッサのシステム初期設定はマスク通信処理
プロセッサに接続されている現用補助記憶装置と予備補
助記憶装置の両装置から、同時に異なった初期設定情報
乞読出すことによりシステム立上げ時間が短縮され、サ
ービス中断時間が短縮出来るという効果がある。
As is clear from the above description, according to the present invention, the system initial settings of each communication processor are simultaneously different from both the active auxiliary storage device and the spare auxiliary storage device connected to the mask communication processor. By reading the initial setting information, system start-up time is shortened, and service interruption time can be shortened.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明のマルチプロセッサ交換局システム立上
げ方式の一実施例を示すシーケンス図、第2図は、第1
図に示す実施例で用いろ初期設定共通情報の信号形式の
一例ケ示す説明図、第3図は、初期設定情報の信号形式
の一例を示す説明図である。 1・・・マスタ通信処理プロセッサ、2・・・通信処理
プロセッサi、21・・・通信処理プロセッサn、3・
現用補助記憶装置、31・・・予備補助記憶装置、4・
・・初期設定情報、5・・・読上げメモリ0面、51・
・・読上げメモリ1面、6・・・初期設定共通情報。
FIG. 1 is a sequence diagram showing an embodiment of the multiprocessor exchange system start-up method of the present invention, and FIG.
FIG. 3 is an explanatory diagram showing an example of the signal format of the initial setting common information used in the embodiment shown in the figure. FIG. 3 is an explanatory diagram showing an example of the signal format of the initial setting information. 1... Master communication processing processor, 2... Communication processing processor i, 21... Communication processing processor n, 3.
Current auxiliary storage device, 31... Spare auxiliary storage device, 4.
...Initial setting information, 5...Reading memory page 0, 51.
・Reading memory page 1, 6... Initial setting common information.

Claims (1)

【特許請求の範囲】[Claims] 1、通信処理機能を実現する複数の通信処理プロセッサ
と、これら通信処理プロセツサの装置状態管理及び初期
設定等のシステム運用機能を実現するマスタ通信処理プ
ロセツサに接続されている現用補助記憶装置と、予備補
助記憶装置に格納された複数の通信処理プロセッサのシ
ステム初期設定用共通情報から構成されたマルチプロセ
ッサ交換局において、交換局のシステム立上げ時に、現
用補助記憶装置から複数の通信処理プロセッサのシステ
ム初期設定用初回共通情報を、予備補助記憶装置からは
複数の通信処理プロセッサのシステム初期設定用次回転
送用共通情報を同時に、マスタ通信処理プロセッサ上の
メモリ0面、1面に読上げ各々のプロセッサに同報処理
で同時初期設定することにより、交換機全体のシステム
立上げ時間短縮を特徴とするマルチプロセッサ交換局シ
ステム。
1. A plurality of communication processing processors that realize communication processing functions, a working auxiliary storage device connected to a master communication processing processor that realizes system operation functions such as device status management and initial settings of these communication processing processors, and a backup storage device. In a multiprocessor switching center, which is composed of common information for system initialization of multiple communication processing processors stored in an auxiliary storage device, when starting up the system of the switching center, the system initialization of the multiple communication processing processors is performed from the current auxiliary storage device. The initial common information for setting is read out from the spare auxiliary storage device, and the common information for next transfer for system initialization of multiple communication processors is simultaneously read out to memory planes 0 and 1 on the master communication processor and sent to each processor simultaneously. A multiprocessor switching center system that reduces system start-up time for the entire switch by performing simultaneous initial settings during information processing.
JP24401588A 1988-09-30 1988-09-30 Multi-processor exchange station system Pending JPH0294796A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24401588A JPH0294796A (en) 1988-09-30 1988-09-30 Multi-processor exchange station system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24401588A JPH0294796A (en) 1988-09-30 1988-09-30 Multi-processor exchange station system

Publications (1)

Publication Number Publication Date
JPH0294796A true JPH0294796A (en) 1990-04-05

Family

ID=17112441

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24401588A Pending JPH0294796A (en) 1988-09-30 1988-09-30 Multi-processor exchange station system

Country Status (1)

Country Link
JP (1) JPH0294796A (en)

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