JPH0294200A - Sound recording and reproducing device - Google Patents

Abstract

PURPOSE:To eliminate the necessity of manual switching operations from the title device and to make the reproducing operation of the device easier by automatically switching the sound process operating mode of an ADPCM analysis and synthesization circuit based on storing mode data at the time of the reproducing operation. CONSTITUTION:This sound recording and reproducing device is constituted in such a way that, when sound recording operations are started by switching an operation switch 21 for recording sounds, storing mode data based on the switching of a storing time changeover switch 25, namely, data indicating whether the sound recording operations are to be made in a normal time mode or long time mode are written in an index section provided in a RAM 18. On the other hand, signal reading-out operations from the RAM 18 are performed from the position where the sound recording operations are started and, at the same time, the sound process operating mode of an ADPCM analysis and synthesization circuit 8 is switched by reading the storing mode data. Therefore, necessity of manual operating mode switching operations is eliminated.

Description

Detailed Description of the Invention (a) Industrial Application Field The present invention converts a recording signal obtained from a microphone into a digital signal and stores it in a semiconductor memory circuit, and also stores it in the semiconductor memory circuit during playback operation. The present invention relates to an audio recording and reproducing device that reads out a signal, converts it into an analog signal, and emits the sound through a speaker.

(b) Prior Art Cassette type tape recorders that use magnetic tape called cassette tape have become popular as devices for recording and reproducing audio. Devices such as cassette tape recorders that use magnetic tape as a means of recording audio signals have the advantage of being able to perform long recording operations, but they are difficult to miniaturize. Since it requires a mechanism to drive the magnetic tape, there is a problem in that the failure rate is high. As an improved device, the audio signal is converted into a digital signal and stored in a semiconductor memory circuit, and during playback, the signal stored in the semiconductor memory circuit is read out, converted to an analog signal, and then emitted by a speaker. Techniques have been developed to make sounds, such as the one disclosed in Japanese Utility Model Application Publication No. 62-22800, for example.

(c) Problems to be Solved by the Invention The technology disclosed in the above-mentioned publication uses a semiconductor memory circuit as a means for recording audio signals, which eliminates the need for a drive mechanism such as a recorder, which makes the device It has the advantage of being smaller and lowering the failure rate. However, such technology has a problem in that it is not possible to perform long recording operations. The present invention aims to provide a device that improves this point.

(d) Means for Solving the Problems The present invention provides an ADPCM analysis and synthesis circuit that performs voice analysis and voice synthesis using the ADPCM method during recording and playback operations;
a control circuit that controls writing of digital signals output from the ADPCM analysis and synthesis circuit into the semiconductor memory circuit and reading of signals stored in the semiconductor memory circuit; a recording operation switch that is switched during a recording operation and starts writing a signal to the semiconductor memory circuit; and a recording operation switch that is switched during a playback operation and starts writing a signal to the semiconductor memory circuit; and a playback operation switch that starts the readout operation of the signal.

The present invention writes storage mode data based on a storage time changeover switch into a semiconductor memory circuit when a recording operation is started by switching a recording operation switch, and also writes storage mode data based on the storage mode data during a playback operation. This is designed to switch the audio processing operation mode of the ADPCM analysis and synthesis circuit.

(g) Example The illustrated circuit is an example of the present invention, in which (1) is a microphone that converts an acoustic signal into an electrical signal, and (2) is a recording that is converted into an electrical signal by the microphone (1). This is a recording amplifier circuit that amplifies the signal as it is input. (3) is an H (high) signal at the control terminal (3c).
An electronic switch (4) is closed when a level signal is applied, and the recording signal amplified by the recording amplifier circuit (2) is input through the electronic switch (3) and an unnecessary 10th block that blocks high frequency signals
bus filter, (5) is the 10th bus filter<
4> is applied to the 20th bus filter, and its cutoff frequency is set lower than the cutoff frequency of the 10th bus filter (4). (6)
7) is an electronic switch that is closed when an H level signal is applied to the control terminal (6c);
an A-D converter (8) that converts an analog signal that passes through the 0-bus filter (4) and the 20-th bus filter (5) and is input through the electronic switch (6) into a digital signal; is an ADP that performs digital processing using a method called ADPCM (adaptive differential pulse code modulation).
CM analysis and synthesis circuit (9) is the ADPCM during playback operation.
This is a DA converter that converts the digital signal processed by the analysis/synthesis circuit (8) into an analog signal. (10
〉 is an electronic switch connected to guide the reproduction signal converted by the DA converter (9) to the tenth bus filter (4〉) during reproduction operation, and the control terminal (
10c) is configured to be closed when an H level signal is applied to the terminal 10c). <11) is the control terminal (ll
(12) is an electronic switch that is closed when an H level signal is applied to the electronic switch (11);
) is an electronic control terminal that adjusts the level of the playback signal input through the control terminal (12) that adjusts the level.
c). (13) is the electronic volume reference 2)
A reproduction amplifier circuit (14) to which a reproduction signal whose level has been adjusted by is input and amplifies the signal is applied with a reproduction signal amplified by the reproduction amplifier circuit (13) and emits the signal. It is a speaker that does. (15
) is a control unit that controls the analysis operation and synthesis operation of the ADPCM analysis and synthesis circuit (8), and (16) is a control unit that controls signals between an external circuit and the control unit (15) and the ADPCM analysis and synthesis circuit (8>). This is a data I10 buffer circuit that controls input/output operations.In this circuit, an A-D converter (7
〉, ADPCM analysis and synthesis circuit (8〉, D-A converter (9)
>, control unit (15) and data I10 buffer circuit (1
6) constitutes an audio processing circuit (17), and such a circuit is manufactured by, for example, Oki Electric Industry Co., Ltd. = l [(71) Ls I
'MSM625s' etc. may be used incorrectly, and the details will be omitted. (18) is a semiconductor memory R that stores the digital signal output from the data buffer circuit (16) that constitutes the audio processing circuit (17).
AM, (19) is an address control circuit that controls write and read operations of signals to the RAM (18);
(2o) is the audio processing circuit (17), RAM (18)
This is a control circuit that controls the operations of the address control circuit (19) and the like. (21) is a recording operation switch that is pressed and closed when an audio signal is stored in the RAM (18);
22) is a reproduction operation switch that is pressed and closed when the signal stored in the RAM (18) is read and reproduced; 23> is a stop operation switch that is suppressed and opened during a stop operation; (24) 25 is a volume adjustment operation switch that is operated when adjusting the volume, and 25 is a storage time changeover switch that changes the storage time to the RAM (18) by changing the sampling frequency. It is configured to be closed.

(26) is a switching signal output terminal provided in the control circuit (20), and is a switching signal output terminal provided in the control circuit (20).
) is open, it outputs an H level signal, and when the changeover switch (25) is closed, it outputs a very low) level signal. (
27) is connected to bypass the 20th pass filter (5) and is connected to the control terminal (27c).
an electronic switch that is in an open state when a level signal is applied and bypasses the 20th pass filter (5), and its control terminal (27e) is connected to the switching signal output terminal (26). (28>) is a volume adjustment signal output terminal that outputs a control signal for volume adjustment in response to the operation of the volume adjustment operation switch 24), and is connected to the control terminal (12c) of the electronic volume control (12). It is connected.

(29) is a recording switching signal output terminal which outputs an H level signal when the recording operation switch 21> is pressed and closed; ) (6c). (3o> is H when the regeneration operation switch (22>) is pressed and closed.
This is a playback switching signal output terminal to which a level signal is output, and is a control terminal (1) of the electronic switch (10) (11).
0c) (llc).

The present invention is constructed as described above, and its operation will be explained next. The sampling frequency in the audio processing circuit (17) when performing a normal storage operation, that is, when the storage time selection switch (25) is in the open state, is set to 8 KH.
If the number of quantization bits is 4, the bit rate will be 32 bits/second, and if the capacity of the RAM (18) is 2 Mbits, data can be stored for about 64 seconds. Also,
When the storage time switch (25) is in the open state, the sampling frequency is 4 KHz and the number of quantization bits is 4.
Then, the bit rate becomes 16 bits/second, and the RAM (18) can store data for about 128 seconds. When the sampling frequency is set to such a frequency, the cutoff frequency of the 10th-pass filter (4) is set to 4 KHz, and the cutoff frequency of the 20th-pass filter (5) is set to 2 KHz. be done.

Further, the analysis and synthesis processing by the ADPCM analysis and synthesis circuit (8) and the write operation to the RAM <18) accompanying the processing are started in conjunction with the pressing and closing operation of the recording operation switch (21). It is designed to be stopped by a suppression/opening operation of a stop operation switch (23). That is,
Control unit <15) built into the audio processing circuit (17>)
ADPCM is activated by the start signal output during recording operation.
The analysis and synthesis operation by the analysis and synthesis circuit (8) is started, and at the same time, the analysis and synthesis operation is stopped by a stop signal outputted from the control section (15) at the time of the stop operation. And RAM (
18), that is, during a recording operation, the signal analyzed and processed by the ADPCM analysis and synthesis circuit (8) from the time the recording operation described above is performed until the stop operation is performed is sent to the data I10 buffer circuit. (16), and is output to the RAM (18), and is also written into the RAM (18) with an address specified by the control operation of the address control circuit (19). Furthermore, when the recording operation is started by switching the recording operation switch 21), the memory mode data based on the switching of the memory time changeover switch (25), that is, the normal time mode, is stored in the index section provided in the RAM (18). The recording operation is configured such that data indicating whether the recording operation is in the long-term mode or the recording operation in the long-term mode is written.The reading operation of the signal from the RAM (<18) is performed from the position where the recording operation is started. The audio processing operation mode of the audio processing circuit 8> is switched by reading the storage mode data. In this way, the audio processing circuit 17)
The RAM (18) is controlled by the address control circuit 9), and each operation in this embodiment will be explained next.

First, the recording operation when the storage time changeover switch (25) is in the open state, that is, in the normal time mode, will be described.

When a recording operation is performed in such a state, power is supplied to each circuit, the recording operation switch 21 is suppressed and opened, and the control circuit (20) performs a control operation for recording. In this state, an H level signal is output to the switching signal output terminal (26) provided in the control circuit (20), so the electronic switch (27) is in the open state and the 20th-bus Bypass filter (5) '1-6 KM km. In addition, since an H level signal is output to the recording switching signal output terminal (29), the electronic switches (3) and (6) are in the open state, but an L level signal is output to the playback switching signal output terminal (30). is output, the electronic switches (10) and (11) are in an open state. The recording signal converted into an electrical signal by the microphone (1) is input to a recording amplifier circuit (2), amplified, and then input to a tenth pass filter (4) through an electronic switch (3). The recording signal input to the tenth pass filter (4) is filtered from unnecessary high-frequency signals, that is, signals with frequencies higher than 4 KHz, and then passed through electronic switches (27) and (6) to the audio processing circuit (17).
) is input. The recording signal input to the audio processing circuit (17) is converted into a digital signal by an A-D converter (7) and is also sent to an ADPCM analysis and synthesis circuit (8).
An analysis processing operation is performed. In addition, the ADPC
The signal analyzed and processed by the M analysis and synthesis circuit (8>) is
RAM (1) through data I10 buffer circuit (16)
8) and written into the RAM (18) by the control operation of the address control circuit (19). At the start of recording, the storage mode data is written into the index section provided in the RAM (18). While the recording operation is being performed, the above-mentioned ADPCM analysis and synthesis circuit 8) performs the analysis operation and the writing operation to the RAM (18) until the stop operation is performed or the capacity of the RAM (18) is exhausted. It will be done. In this way, the recording operation in normal time mode is performed, but next, press the memory time selector switch (
25) is in the open state, that is, the recording operation in the long time mode will be explained. The memory time changeover switch (25
) is in the open state, an L level signal is output to the switching signal output terminal (26>) provided in the control circuit (20), so the electronic switch (27) is in the open state.Such a state The recording signal amplified by the recording amplifier circuit (2) is input to the 10th pass filter (4) through the electronic switch (3), and the 4K
After removing signals with frequencies higher than Hz, the signal is input to the 20th pass filter (5). The recording signal input to the 20th bass filter (5) is filtered out from unnecessary high-frequency signals during long-term recording operations, that is, signals with frequencies higher than 2 KHz, and then passed through an electronic switch <6) to an audio processing circuit. 7). The recording signal input to the audio processing circuit (17) is stored in the RAM (17) by the operation described above.
8), but the zumbling frequency is 8 KHz.
Since the frequency is switched to 4 KHz, the RAM (
18) The recording time is twice that of normal recording operation. In step 17, at the start of such recording operation, the RAM
Storage mode data indicating the long-term mode is written in the index section provided at (ts).

Although the recording operation is performed as described above, the reproduction operation will be explained next. When the playback operation is performed, the playback amplifier circuit (13
), etc., and the playback operation switch (2
2) is suppressed and the control circuit (20) performs a control operation for reproduction. When such a switching operation is performed, an H level signal is output to the playback switching signal output terminal (30), so the electronic switches (10) and (11) are in the closed state, but the recording switching signal output terminal ( 29) is L
Since the level signal is output, the electronic switch (3) (6
) is in the open state. The signal stored in RAM (18) is read out by the control operation by the address control circuit (19) and is also read out by the data I10 buffer circuit (
16) and is input to the ADPCM analysis and synthesis circuit <8). The digital signals input to the ADPCM analysis and synthesis circuit (8) are subjected to synthesis processing by the ADPCM analysis and synthesis circuit (8), and then applied to the DA converter (9) where they are converted into analog signals. The processing operation is performed by the audio processing circuit (17) in this way, but at this time, the switching operation between the normal time mode and the long time mode is performed by the RAM (18).
The output level of the switching signal output terminal (26) provided in the control circuit (20) is determined based on the data. Automatically switched. The reproduced signal converted into an analog signal by the D-A converter (9) is input to the tenth pass filter (4) through the electronic switch (10), and unnecessary high-frequency signals are removed. -Pass filter (4)
The playback signal that has passed through the electronic switches (27) (11)
Or the 20th pass filter (5) and the electronic switch (1
1) '1m and input to the electronic volume (12). The level of the playback signal input to the electronic volume control (12) is adjusted based on a control signal output from the volume adjustment signal output terminal (28) in response to the operation of the volume adjustment operation switch (24). Ru. The playback signal whose level has been adjusted by the electronic volume controller (12) is sent to the playback amplifier circuit (
13) and is amplified, and then applied to the speaker (14) to emit sound. During the playback operation, the readout operation from the RAM (18) and the ADP
The CM analysis and synthesis circuit (8) continues to perform the synthesis operation until a stop operation is performed or until there are no more signals written in the RAM (18).

Note that by increasing the capacity of the RAM (18), the recording and playback time can be increased. In addition, RAM (18) is
An IC card or RA is installed in a container called a card.
If M (18) is made replaceable, it can be used as a recording means in place of a tape recorder even if the capacity of RAM (18) is small.

(G) Effects of the Invention The audio recording/playback device of the present invention not only enables long-term storage operation by switching the zumbling frequency of the audio signal subjected to digital signal processing, but also enables recording operation by switching the recording operation switch. At the start, storage mode data based on the storage time changeover switch is written in the semiconductor memory circuit, and at the time of playback operation, A is written based on the storage mode data.
The audio processing operation mode of the DPCM analysis and synthesis circuit is automatically switched, so manual switching is not required when signals recorded in normal time mode and long time mode are stored in the same semiconductor memory circuit. This has the advantage that the reproducing operation can be performed easily.

[Brief explanation of drawings]

The illustrated circuit is one embodiment of the invention. Explanation of main drawing numbers (1)... Microphone, <2)... Recording amplifier circuit, (4)... 10th pass filter (5
)...20th-pass filter, ri8>...AD
PCM analysis and synthesis circuit, (12)...electronic volume,
(13)...Reproduction amplifier circuit, (14)...Speaker R15>...Control unit, R16)...
Data I10 buffer γ circuit, (17)...Audio processing circuit, (18)...RAM, (19)...Atlas control circuit, (20)...Control circuit, (21)...
)... Recording operation switch, (22)... Playback operation switch, <23>... Stop operation switch,
(25)...Memory time selection switch.

Claims (1)

[Claims] (1) Convert the recording signal obtained from the microphone into a digital signal and store it in a semiconductor memory circuit, and during playback operation, read out the signal stored in the semiconductor memory circuit, convert it into an analog signal, and emit it through a speaker. In a voice recording and playback device configured to produce sound, an ADPCM analysis and synthesis circuit that performs voice analysis and voice synthesis using an ADPCM method during recording and playback operations;
a control circuit for controlling a writing operation of a digital signal outputted from an analysis/synthesis circuit to the semiconductor memory circuit and a reading operation of a signal stored in the semiconductor memory circuit; a recording operation switch that is switched during a recording operation and starts the operation of writing a signal to the semiconductor memory circuit; When a recording operation is started by switching the recording operation switch, storage mode data based on the storage time changeover switch is written in the semiconductor memory circuit, and the storage mode data is written in the semiconductor memory circuit during the reproduction operation. An audio recording and reproducing apparatus characterized in that the audio processing operation mode of the ADPCM analysis and synthesis circuit is switched based on mode data.