JPH0279298A - Sound recording/reproducing device - Google Patents

Abstract

PURPOSE:To execute a sound recording operation at a high quality over a long time by switching the sample frequencies of a sound signal to be digital- signal-processed, and switching the interrupting frequencies of a low pass filter. CONSTITUTION:Low pass filters 3 and 4 inserted and connected between a microphone 1 and an ADPCM analyzing/synthesizing circuit 6, a control circuit 16 to control the write operation of a digital signal outputted from the ADPCM analyzing/synthesizing circuit 6 to a semiconductor memory circuit 14 and the read operation of the signal stored into the semiconductor memory circuit 14, and a storage time change-over switch 20 to which a storage time to the semiconductor memory circuit 14 by switching the sampling frequencies constitute the title device. That is, the sampling frequencies of the sound signal to be digital-signal-processed are switched, the storage operation over a long time is attained, and the interrupting frequencies of the low pass filters 3 and 4 can be switched according to the sampling frequencies. Thus, the sound recording quality can be improved.

Description

[Detailed description of the invention] (a) Industrial application field The present invention converts a recording signal obtained from a microphone into a digital signal and stores it in a semiconductor memory circuit, and also stores it in the semiconductor memory circuit during playback operation. The present invention relates to an audio recording and reproducing device that reads out a signal, converts it into an analog signal, and emits the sound through a speaker.

(B) Conventional Technology Cassette tape recorders, which use magnetic tape called cassette tape, have become popular as devices for recording and playing back audio. Devices such as cassette tape recorders that use magnetic tape as a means of recording audio signals have the advantage of being able to perform long recording operations, but they are difficult to miniaturize. Since it requires a mechanism to drive the magnetic tape, there is a problem in that the failure rate is high. A device that improves on these points converts audio signals into digital signals and stores them in a semiconductor memory circuit, and during playback, reads out the signals stored in the semiconductor memory circuit, converts them into analog signals, and emits them through a speaker. Techniques have been developed to make sounds, and examples of such technology include, for example, the
There is one disclosed in Japanese Patent No. 2-22800.

(c) Problems to be Solved by the Invention The technology disclosed in the above-mentioned publication uses a semiconductor memory circuit as a means for recording audio signals, so a drive mechanism like a tape recorder is required, and the device It has the advantage of being able to downsize and reduce the failure rate. However, such technology has a problem in that it is not possible to perform long recording operations. The present invention aims to provide a device that improves this point.

B) Means for Solving the Problems The present invention provides an ADPCM analysis and synthesis circuit that performs voice analysis and voice synthesis using the ADPCM method during recording and playback operations;
a low-pass filter inserted and connected between a microphone and the ADPCM analysis and synthesis circuit;
A control circuit that controls the writing operation of digital signals output from the CM analysis and synthesis circuit to the semiconductor memory circuit and the reading operation of the signals stored in the simple conductive memory circuit, and the control circuit that controls the writing operation of the digital signal output from the CM analysis and synthesis circuit to the semiconductor memory circuit and the read operation of the signal stored in the simple conductive memory circuit, and It is composed of a memory time changeover switch that changes the memory time.

(*) Function The present invention enables long-term memory operation by switching the sampling frequency of the audio signal subjected to digital signal processing, and also switches the cut-off frequency of the low-pass filter in accordance with the sampling frequency. be.

(F) Example The illustrated circuit is an example of the present invention, in which (1) is a microphone that converts an acoustic signal into an electrical signal, and (2) is a recording that is converted into an electrical signal by the microphone (1). A recording amplifier circuit (3) is a recording amplifier circuit that amplifies the signal as it is inputted.The recording amplifier circuit (3) is a recording amplifier circuit that inputs the recording signal amplified by the recording amplifier circuit (2) and cuts off unnecessary high-frequency signals. - Bass filter (4) is a 20th pass filter to which the signal passed through the 10th bass filter (3) is applied, and its cutoff frequency is lower than the cutoff frequency of the 10th bass filter (3). (5) is the 10th bus filter (
3> and the 20th bus filter (4), an A-D converter that converts the analog signal passed through the bus filter (4) into a digital signal.
6) is an ADPCM analysis and synthesis circuit that performs digital processing using a method called adaptive differential pulse code modulation, and (7) is an ADPCM analysis and synthesis circuit that converts the digital signal processed by the ADPCM analysis and synthesis circuit (6) into an analog signal.
- A converter (8) is a low-pass filter into which the reproduced signal converted into an analog signal by the D-A converter (7) is input, and cuts off unnecessary high-frequency signals; (9) is the low-pass filter; (8) A reproduction amplification circuit that receives the reproduction signal that has passed through and amplifies the signal; (10)
) is a speaker to which a signal amplified by the reproduction amplifier circuit (9) is applied and which emits the signal.

(11) is a control unit that controls the analysis operation and synthesis operation of the ADPCM analysis and synthesis circuit (6), and (12) is a control unit that controls the analysis operation and synthesis operation of the ADPCM analysis and synthesis circuit (6). Data I1 that controls signal input/output operations
0 buffer circuit.

In such a circuit, an A-D converter (5), ADPCM
Analysis and synthesis circuit (6), D-A converter (7), control unit (1
1) and the data I10 buffer circuit (12) constitute an audio processing circuit (13), and such a circuit is, for example, LS I 'MSM6258 manufactured by Oki Electric Industry Co., Ltd.
etc., and the details are omitted.

(14) is data I constituting the audio processing circuit (long)
10 buffer circuit (12) is a semiconductor memory that stores digital signals output from the buffer circuit (12), (15) is an address control circuit that controls the write operation and read operation of the signal to the RAM (14), (16) is This is a control circuit that controls the operations of the audio processing circuit (13), RAM (14), address control circuit (15), etc.

(17) is a recording operation switch that is pressed and closed when the audio signal is stored in the RAM (14), and (18) is pressed when the signal stored in the RAM (14) is read out and played back. Regeneration operation switch to be closed (19)
is a stop operation switch that is pressed and closed during stop operation, (2
Reference numeral 0) is a storage time changeover switch that changes the storage time in the RAM (14) by changing the sampling frequency, and is configured to be closed when performing a long-time storage operation. (21) is the control circuit (
16), which is a switching signal output terminal provided in
It is configured to output a (high) level signal and also to output an L (low) level signal when the changeover switch (20) is closed. (22) is connected to bypass the 20th bus filter (4), and is in a closed state when an H level signal is applied to the control terminal (23), so that the 20th bus filter (4) is closed. (4) is an electronic switch circuit that bypasses
The control terminal (23) is the switching signal output terminal (21)
It is connected to the. (24) is a transistor whose emitter and left end are connected to the power supply and power supply terminal (25) in order to control the power supply to the 20th bus filter (4), and its base is connected to the resistor (26).
(via the switching signal output terminal (2) of the control circuit (16)
1).

The present invention is constructed as described above, and the operation will be explained next.0 The sampling frequency in the audio processing circuit (S) when performing a normal storage operation, that is, when the storage time changeover switch (20) is in an open state. 8 KHz
If the number of quantization bits is 4, the bit rate is 32 bits/second, and if the capacity of the RAM (14) is 2 Mbits, data can be stored for about 64 seconds. Further, if the sampling frequency is 4 KHz and the number of quantization bits is 4 when the storage time changeover switch (20) is in the closed state, the bit rate is 16 bits/second, and the R
AM (14) can store information for about 128 seconds. When the sampling frequency is set to such a frequency, the cutoff frequency of the 10th bus filter (3) is set to 4 KHz, and the cutoff frequency of the 20th bus filter (4) is set to 2 KHz. be done. Also,
The analysis and synthesis processing by the ADPCM analysis and synthesis circuit (6) and the write operation to the RAM (14) accompanying the processing are performed in 1
This is done in seconds. That is, the analysis and synthesis operation by the ADPCM analysis and synthesis circuit (6) is started by a start signal output from the control unit (11) incorporated in the audio processing circuit (S), and one second later, the control unit (11) starts the analysis and synthesis operation. The analysis and synthesis operation is stopped by the output stop signal.

When a signal is written to the RAM (14), that is, during a recording operation, the signal analyzed and processed by the ADPCM analysis and synthesis circuit (6) for one second is transferred to the RAM (14) through the data I10 buffer circuit (12). At the same time as being outputted, the data is written into the RAM (14) with an address specified by the control operation of the address control circuit (15). In addition, when reading out signals from the RAM (14), that is, during playback operations, the signals synthesized by the ADPCM analysis and synthesis circuit (6) in one second are transferred to the D-A converter (7).
) and converted to an analog signal. The control operation of the RAM (14) is performed by the audio processing circuit (13) and the address control circuit (15) in this way.Next, each operation in this embodiment will be explained.

First, a description will be given of the case when the storage time changeover switch (20) is in the open state, that is, the normal recording operation.

When a recording operation is performed in such a state, power is supplied to each circuit, the recording operation switch (17) is pressed and closed, and the control circuit (16) performs a control operation for recording. In such a state, the electronic switch circuit (22) is in a state where an H level signal is output to the switching signal output terminal (21) provided in the control circuit (16).
) is in a closed state and bypasses the 20th bus filter (4).

Further, the transistor (24) is reverse biased and is in a non-conductive state, so that power is not supplied to the 20th bus filter (4). The recording signal converted into an electric signal by the microphone (1) is input to the recording amplifier circuit (2), amplified, and then input to the tenth bass filter (3). The recording signal input to the tenth pass filter (3) is passed through an electronic switch circuit (22) to an audio processing circuit (13) after removing unnecessary high-frequency signals, that is, signals with frequencies higher than 4 KHz.
is input. The recording signal input to the audio processing circuit (S) is converted into a digital signal by the A-to-digital converter (5), and the ADPCM analysis and synthesis circuit (6) analyzes the signal for one second at a time, as described above. It will be done. Further, the signal analyzed and processed by the ADPCM analysis and synthesis circuit (6) is output to the RAM (14) through the data I10 buffer circuit (12), and the signal is output to the RAM (14) through the data I10 buffer circuit (12).
5) is written into the RAM (14).

Then, while the recording operation is being performed, the above-mentioned ADPC
Analysis operation by the M analysis and synthesis circuit (6) and RAM (14)
) until a stop operation is performed or RA
This process will be repeated until the capacity of M(14) is exhausted. Although the normal recording operation is performed in this way, next we will explain the long-time recording operation when the storage time changeover switch (20) is in the closed state. When the storage time changeover switch (20) is in a closed state, a changeover signal output terminal (21) provided in the control circuit (16)
Since an L level signal is output to the electronic switch circuit (
22) is opened, and the transistor (24) becomes conductive so that power is supplied to the 20th pass filter (4).In this state, the recording amplifier circuit (24) is turned on.
) is input to a 10th-pass filter (3) to remove signals with frequencies higher than 4 KHz, and then input to a 20th-pass filter (4). The recording signal input to the 20th bass filter (4) is input to the audio processing circuit (S) after removing unnecessary high-frequency signals, that is, signals with frequencies higher than 2 KHz during long-term recording operation. . The recording signal input to the audio processing circuit (S) is stored in the RAM (1) by the operation described above.
4), but the sampling frequency is 8 KHz
Since the frequency is switched to 4 KHz, the RAM (14
) will be twice as long as in normal recording mode.

Although the recording operation is performed as described above, the reproduction operation will be explained next. When the playback operation is performed, the playback amplifier circuit (9)
When power is supplied to the playback operation switch (18)
is pressed closed, and the control circuit (16) performs a control operation for regeneration. The signals stored in the RAM (14) are read out by the control operation by the address control circuit (15) and are also read out by the data I10 buffer circuit (15).
2) is input to the ADPCM analysis and synthesis circuit (6). The digital signals input to the ADPCM analysis and synthesis circuit (6) are synthesized by the ADPCM analysis and synthesis circuit (6) for one second each, and then applied to the DA converter (7) and converted into analog signals. Ru. The signal converted into an analog signal by the D-A converter (7) is passed through a low-pass filter (8>) to a reproduction amplifier circuit (9).
The sound is input to the speaker (10), amplified, and then emitted by the speaker (10). While the reproduction operation is being performed, the read operation from the RAM (14) and the synthesis operation by the ADPCM analysis and synthesis circuit (6) are continued until a stop operation is performed or the signal written in the RAM (14) is This will be repeated until it runs out. Although the playback operation is performed in this way, the signal processing by the audio processing circuit (long) is performed based on the signal obtained from the RAM (14), so the opening/closing operation of the storage time selector switch (20) is different from the playback operation. They do not have the same effect.

Incidentally, by increasing the capacity of the RAM (14), the recording and playback time can be increased. In addition, RAM (14) is
An IC card or RA is installed in a container called a card.
If M (14) is made replaceable, it can be used as a recording means in place of a tape recorder even if the capacity of RAM (14) is small.

(G) Effects of the Invention The audio recording/playback device of the present invention not only enables long-term storage operation by switching the sampling frequency of the audio signal subjected to digital signal processing, but also enables long-term storage operation. Since the cut-off frequency of the low-pass filter is changed over, it has the advantage that recording operation with good characteristics can be performed.

[Brief explanation of the drawing]

The illustrated circuit is one embodiment of the invention. Explanation of main drawing numbers 2)...Recording amplifier circuit, (3)...No. 10-
Bus filter, (4)... 20th-pass filter, (6)... ADPCM analysis and synthesis circuit, (9)...
・Reproduction amplifier circuit, (su)...sound processing circuit, (
14)...RAM, (15)...address control circuit, (16)...control circuit, (20)...memory time changeover switch, (22)...electronic switch circuit.

Claims (1)

[Claims] (1) Convert the recording signal obtained from the microphone into a digital signal and store it in a semiconductor memory circuit, and during playback operation, read out the signal stored in the semiconductor memory circuit, convert it into an analog signal, and emit it through a speaker. In a voice recording and playback device configured to produce sound, an ADPCM analysis and synthesis circuit that performs voice analysis and voice synthesis using the ADPCM method during recording and playback operations, and an ADPCM analysis and synthesis circuit that is inserted and connected between a microphone and the ADPCM analysis and synthesis circuit. a low-pass filter that controls a sampling frequency; a control circuit that controls a writing operation of a digital signal output from the ADPCM analysis and synthesis circuit to the semiconductor memory circuit; and a control circuit that controls a reading operation of the signal stored in the semiconductor memory circuit; A voice recording/playback device comprising: a storage time changeover switch for changing the storage time in a semiconductor memory circuit; and a cutoff frequency of the low-pass filter is changed by switching the storage time changeover switch.