JPH0293796U - - Google Patents
Info
- Publication number
- JPH0293796U JPH0293796U JP165389U JP165389U JPH0293796U JP H0293796 U JPH0293796 U JP H0293796U JP 165389 U JP165389 U JP 165389U JP 165389 U JP165389 U JP 165389U JP H0293796 U JPH0293796 U JP H0293796U
- Authority
- JP
- Japan
- Prior art keywords
- pulse
- circuit
- output
- pulse generating
- drive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000000737 periodic effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Measurement Of Unknown Time Intervals (AREA)
Description
第1図は本考案に係る駆動装置の駆動時間測定
装置のブロツク回路図、第2図は実施例回路の各
部の信号波形を示す波形図、第3図はカウンタの
構成を示す説明図である。
尚図中1はモータ(駆動装置)、2はエンコー
ダ、3はモータ駆動制御回路、4はワンシヨツト
パルス発生回路、5はANDゲート、7はカウン
タ、8はプリセツト回路、9は駆動時間表示回路
である。
FIG. 1 is a block circuit diagram of a drive time measuring device for a drive device according to the present invention, FIG. 2 is a waveform diagram showing signal waveforms of each part of the embodiment circuit, and FIG. 3 is an explanatory diagram showing the configuration of a counter. . In the figure, 1 is a motor (drive device), 2 is an encoder, 3 is a motor drive control circuit, 4 is a one shot pulse generation circuit, 5 is an AND gate, 7 is a counter, 8 is a preset circuit, and 9 is a drive time display circuit. It is.
Claims (1)
する装置において、 前記エンコーダの出力する周期的信号を入力し
、各周期の信号波形に対応して前記周期よりも長
い時間のパルス幅を有するパルスを発生する第1
のパルス発生回路と、 基準パルスを発生する第2のパルス発生回路と
、 前記第1と第2のパルス発生回路の出力信号の
論理積をとる論理回路と、 あらかじめ前記パルス幅の時間分減算されてカ
ウント値がセツトされ、前記論理回路の出力信号
をカウントするカウント回路と、 前記カウント回路の出力するカウント情報を表
示する表示装置と、 からなることを特徴とする駆動装置の駆動時間
測定装置。[Claims for Utility Model Registration] A device for measuring the drive time of a drive device equipped with an encoder, which inputs a periodic signal output from the encoder and measures a period longer than the period corresponding to the signal waveform of each period. A first pulse generating a pulse having a pulse width of
a second pulse generating circuit that generates a reference pulse; a logic circuit that ANDs the output signals of the first and second pulse generating circuits; A drive time measuring device for a drive device, comprising: a count circuit for counting an output signal of the logic circuit, and a display device for displaying count information output from the count circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP165389U JPH0293796U (en) | 1989-01-10 | 1989-01-10 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP165389U JPH0293796U (en) | 1989-01-10 | 1989-01-10 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0293796U true JPH0293796U (en) | 1990-07-25 |
Family
ID=31201727
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP165389U Pending JPH0293796U (en) | 1989-01-10 | 1989-01-10 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0293796U (en) |
-
1989
- 1989-01-10 JP JP165389U patent/JPH0293796U/ja active Pending
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