JPH0292955U - - Google Patents

Info

Publication number
JPH0292955U
JPH0292955U JP1989001018U JP101889U JPH0292955U JP H0292955 U JPH0292955 U JP H0292955U JP 1989001018 U JP1989001018 U JP 1989001018U JP 101889 U JP101889 U JP 101889U JP H0292955 U JPH0292955 U JP H0292955U
Authority
JP
Japan
Prior art keywords
lead frame
led chip
reflector
display element
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1989001018U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0525257Y2 (US20090163788A1-20090625-C00002.png
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989001018U priority Critical patent/JPH0525257Y2/ja
Publication of JPH0292955U publication Critical patent/JPH0292955U/ja
Application granted granted Critical
Publication of JPH0525257Y2 publication Critical patent/JPH0525257Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires

Landscapes

  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
JP1989001018U 1989-01-09 1989-01-09 Expired - Lifetime JPH0525257Y2 (US20090163788A1-20090625-C00002.png)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989001018U JPH0525257Y2 (US20090163788A1-20090625-C00002.png) 1989-01-09 1989-01-09

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989001018U JPH0525257Y2 (US20090163788A1-20090625-C00002.png) 1989-01-09 1989-01-09

Publications (2)

Publication Number Publication Date
JPH0292955U true JPH0292955U (US20090163788A1-20090625-C00002.png) 1990-07-24
JPH0525257Y2 JPH0525257Y2 (US20090163788A1-20090625-C00002.png) 1993-06-25

Family

ID=31200539

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989001018U Expired - Lifetime JPH0525257Y2 (US20090163788A1-20090625-C00002.png) 1989-01-09 1989-01-09

Country Status (1)

Country Link
JP (1) JPH0525257Y2 (US20090163788A1-20090625-C00002.png)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005101662A (ja) * 2004-12-24 2005-04-14 Sanyo Electric Co Ltd 発光ダイオードランプ
JP2005101661A (ja) * 2004-12-24 2005-04-14 Sanyo Electric Co Ltd 発光ダイオードランプ
JP4703903B2 (ja) * 2001-07-17 2011-06-15 ローム株式会社 半導体装置の製造方法および半導体装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4703903B2 (ja) * 2001-07-17 2011-06-15 ローム株式会社 半導体装置の製造方法および半導体装置
JP2005101662A (ja) * 2004-12-24 2005-04-14 Sanyo Electric Co Ltd 発光ダイオードランプ
JP2005101661A (ja) * 2004-12-24 2005-04-14 Sanyo Electric Co Ltd 発光ダイオードランプ

Also Published As

Publication number Publication date
JPH0525257Y2 (US20090163788A1-20090625-C00002.png) 1993-06-25

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