JPH0290550A - Package for semiconductor device - Google Patents

Package for semiconductor device

Info

Publication number
JPH0290550A
JPH0290550A JP24279188A JP24279188A JPH0290550A JP H0290550 A JPH0290550 A JP H0290550A JP 24279188 A JP24279188 A JP 24279188A JP 24279188 A JP24279188 A JP 24279188A JP H0290550 A JPH0290550 A JP H0290550A
Authority
JP
Japan
Prior art keywords
glass material
glass
low
dielectric constant
leads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP24279188A
Other languages
Japanese (ja)
Other versions
JP2646700B2 (en
Inventor
Shigeru Kagiyama
鍵山 滋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP24279188A priority Critical patent/JP2646700B2/en
Publication of JPH0290550A publication Critical patent/JPH0290550A/en
Application granted granted Critical
Publication of JP2646700B2 publication Critical patent/JP2646700B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To make it possible to mount even an IC, which is requested a high speed and has a weak heat resistance, on a low-cost and highly reliable glass- sealed package by a method wherein a low-dielectric constant glass is used for a part related to IC characteristics and a low-melting point glass is used for sealing. CONSTITUTION:A package has a ceramic base, leads 2 arranged on the base 1, a low-dielectric constant glass material A formed along the outer periphery of the base 1 encircling the leads, an isolation frame 6 provided on the glass material A, a low-melting point glass material B formed on the isolation frame and a cap 5 sealed through the glass material B. For decreasing the capacities between the leads 2 at the time of pressure bonding of a lead frame of the base 1 to the leads 2, the low-dielectric constant glass material A3 is used even if the melting point of the glass material A3 is somewhat high. The glass material B4 is one for sealing the cap 5 in a case main body and has a melting point lower than that of the glass material A3. The base 1, the cap 5 and the isolation frame 6, whose material is identical with that of the cap 5, are comprised for preventing the material B4 from having an effect on the dielectric constant of the material A3.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はガラス封止による半導体装置のパッケージに関
し、特に超高速のメモリー、ロジックICを搭載するの
に適した半導体装置のパッケージに関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device package sealed with glass, and particularly to a semiconductor device package suitable for mounting an ultra-high speed memory or logic IC.

〔従来の技術〕[Conventional technology]

従来、この種の高速ECLメモリー用の汎用パッケージ
としては、機密性が高く、熱抵抗が低く、かつ多量に使
うため安価であることが要求されていることから、ガラ
ス封止によるセラミックパッケージが主流であった。こ
のようなパッケージでのスピード遅れ、信号波形のなま
り等を極力減らすため、リード間容置を減らす配慮がな
されており、より誘電率の低いガラス材が用いられてい
た。
Traditionally, ceramic packages with glass sealing have been the mainstream as general-purpose packages for this type of high-speed ECL memory, as they are required to be highly airtight, have low thermal resistance, and be inexpensive because they are used in large quantities. Met. In order to reduce speed delays and signal waveform distortion as much as possible in such packages, consideration has been given to reducing the spacing between the leads, and glass materials with lower dielectric constants have been used.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述したガラス封止のパッケージは、シームウェルドタ
イプのパッケージに比べ高温封止のため、極めて接合の
浅いトランジスタを有する超高速ICでは、アロイスパ
イクにより接合が破壊されるという欠点がある。
The above-mentioned glass-sealed package is sealed at a higher temperature than the seam-weld type package, and therefore has the disadvantage that alloy spikes can destroy the junction in ultra-high-speed ICs having transistors with extremely shallow junctions.

一方、融点の低いガラスを得るため、種々の添加剤を加
えていくと、誘電率は高くなりゃすく、リード間容量を
減らすための低誘電率のガラスで封止するには、封止温
度を一トげざるをえないという欠点がある。
On the other hand, adding various additives to obtain glass with a low melting point tends to increase the dielectric constant, and in order to seal with low dielectric constant glass to reduce the capacitance between leads, the sealing temperature must be lowered. The drawback is that you have no choice but to give up.

本発明の目的は、接合の浅いトランジスタを有する超高
速ICでも接合が破壊されることがなく、小さいリード
間容量で搭載できる安価で信頼性の高いガラス封止の半
導体装置のパッケージを提供することにある。
An object of the present invention is to provide an inexpensive and highly reliable glass-sealed semiconductor device package that can be mounted with a small lead-to-lead capacitance without destroying the junction even in an ultra-high-speed IC having a transistor with a shallow junction. It is in.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の半導体装置のパッケージは、セラミックベース
と、該セラミックベース上に配置されたリードと、該リ
ードを挟んで前記セラミックベースの外周に沿って形成
された低誘電率のガラス材と、該ガラス材上に設けられ
た分離枠と、該分離枠上に形成された低融点のガラス材
と該ガラス材を介して封止されたキャップとを有してい
る。
A semiconductor device package of the present invention includes a ceramic base, a lead disposed on the ceramic base, a low dielectric constant glass material formed along the outer periphery of the ceramic base with the lead sandwiched therebetween, and the glass material. It has a separation frame provided on a material, a low melting point glass material formed on the separation frame, and a cap sealed via the glass material.

〔実施例〕〔Example〕

次に、本発明の実施例について図面を参照して説明する
Next, embodiments of the present invention will be described with reference to the drawings.

第1図(a)、(b)は本発明の第1の実施例のDIP
タイプの平面図及び側面図である。
FIGS. 1(a) and 1(b) show the DIP of the first embodiment of the present invention.
FIG. 3 is a plan view and a side view of the type.

第1の実施例は、第1図(a)、(b)に示すように、
まず、パッケージ製造段階で、セラミック・ベース1ヘ
リードフレームのリード2の圧着が行なわれるが、ここ
では、リード2の間の容量を減らすために、多少の融点
は高くとも、低誘電率のガラス材A3が用いられている
。ガラス材B4は、キャップ5をケース本体へ封止する
ためのもので、ガラス材A3より低い融点をもつ。セラ
ミックベース1やキャップ5と、同じ材料である分離枠
6は、ガラス材B4がガラス材A3の誘電率に影響を与
えないために入れである。
The first embodiment, as shown in FIGS. 1(a) and (b),
First, in the package manufacturing stage, the leads 2 of the ceramic base 1 lead frame are crimped.In order to reduce the capacitance between the leads 2, we use a glass with a low dielectric constant, even though it has a slightly higher melting point. Material A3 is used. The glass material B4 is for sealing the cap 5 to the case body, and has a lower melting point than the glass material A3. The separation frame 6, which is made of the same material as the ceramic base 1 and the cap 5, is provided so that the glass material B4 does not affect the dielectric constant of the glass material A3.

第2図(a)、(b)は本発明の第2の実施例のフラッ
トパッケージの平面図及び側面図である。
FIGS. 2(a) and 2(b) are a plan view and a side view of a flat package according to a second embodiment of the present invention.

第2の実施例は、第2図(a)、(b)に示すように、
フラットパッケージは、リード12が四辺に出ているた
め、もともとDIRに比ベリード12の間の容量は小さ
いが、実施例を用いたことでリード12の間隔を狭くす
ることができ、パッケージの小形化に役立った。
The second embodiment, as shown in FIGS. 2(a) and (b),
In a flat package, the leads 12 are exposed on all four sides, so the capacitance between the leads 12 is originally small compared to the DIR, but by using the embodiment, the spacing between the leads 12 can be narrowed, making the package more compact. It was useful.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、IC特性に関係してくる
部分には、低誘電率のガラスを用い、封止には低融点の
ガラスを用いるため、高速を要求される耐熱性の弱いI
Cでも安価で信頼性の高いガラス封止パッケージに搭載
することができるという効果がある。
As explained above, in the present invention, low dielectric constant glass is used for parts related to IC characteristics, and low melting point glass is used for sealing.
Even with C, there is an advantage that it can be mounted in an inexpensive and highly reliable glass sealed package.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)、(b)は本発明の第1の実施例のDIP
タイプの平面図及び側面図、第2図(a)、(b)は本
発明の第2の実施例のフラットパッケージの平面図及び
側面図である。 1.11・・・セラミックベース、2,12・・・リー
ド、3,13・・・ガラス材A、4,14・・・ガラス
材B、5.15・・・キャップ、6.16・・・分離枠
。 (b) 烹[側
FIGS. 1(a) and 1(b) show the DIP of the first embodiment of the present invention.
FIGS. 2(a) and 2(b) are a plan view and a side view of a flat package according to a second embodiment of the present invention. 1.11...Ceramic base, 2,12...Lead, 3,13...Glass material A, 4,14...Glass material B, 5.15...Cap, 6.16... - Separation frame. (b) The side

Claims (1)

【特許請求の範囲】[Claims] セラミックベースと、該セラミックベース上に配置され
たリードと、該リードを挟んで前記セラミックベースの
外周に沿って形成された低誘電率のガラス材と、該ガラ
ス材上に設けられた分離枠と、該分離枠上に形成された
低融点のガラス材と該ガラス材を介して封止されたキャ
ップとを有することを特徴とする半導体装置のパッケー
ジ。
A ceramic base, a lead placed on the ceramic base, a low dielectric constant glass material formed along the outer periphery of the ceramic base with the lead in between, and a separation frame provided on the glass material. A package for a semiconductor device, comprising: a low melting point glass material formed on the separation frame; and a cap sealed via the glass material.
JP24279188A 1988-09-27 1988-09-27 Semiconductor device package Expired - Lifetime JP2646700B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24279188A JP2646700B2 (en) 1988-09-27 1988-09-27 Semiconductor device package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24279188A JP2646700B2 (en) 1988-09-27 1988-09-27 Semiconductor device package

Publications (2)

Publication Number Publication Date
JPH0290550A true JPH0290550A (en) 1990-03-30
JP2646700B2 JP2646700B2 (en) 1997-08-27

Family

ID=17094346

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24279188A Expired - Lifetime JP2646700B2 (en) 1988-09-27 1988-09-27 Semiconductor device package

Country Status (1)

Country Link
JP (1) JP2646700B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04254356A (en) * 1991-02-06 1992-09-09 Nec Corp Package for glass sealed ic

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04254356A (en) * 1991-02-06 1992-09-09 Nec Corp Package for glass sealed ic

Also Published As

Publication number Publication date
JP2646700B2 (en) 1997-08-27

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