JPH0290540A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH0290540A
JPH0290540A JP63243105A JP24310588A JPH0290540A JP H0290540 A JPH0290540 A JP H0290540A JP 63243105 A JP63243105 A JP 63243105A JP 24310588 A JP24310588 A JP 24310588A JP H0290540 A JPH0290540 A JP H0290540A
Authority
JP
Japan
Prior art keywords
frame
semiconductor substrate
heat sink
fixed
terminals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63243105A
Other languages
Japanese (ja)
Inventor
Yoshiaki Yamada
義明 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP63243105A priority Critical patent/JPH0290540A/en
Publication of JPH0290540A publication Critical patent/JPH0290540A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48699—Principal constituent of the connecting portion of the wire connector being Aluminium (Al)
    • H01L2224/487—Principal constituent of the connecting portion of the wire connector being Aluminium (Al) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/48717—Principal constituent of the connecting portion of the wire connector being Aluminium (Al) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950 °C
    • H01L2224/48724—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852—Applying energy for connecting
    • H01L2224/85201—Compression bonding
    • H01L2224/85205—Ultrasonic bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85417—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/85424—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]

Abstract

PURPOSE:To facilitate the automatization of work for the connection between frame terminals and the electrodes of a semiconductor substrate and to contrive a reduction in the cost of a product by a method wherein a frame body is provided with supporting parts to support stably and closely parts of the frame terminals which are extruded to the inside of the frame body. CONSTITUTION:A semiconductor substrate 2 is fixed on a heat sink 1 with a bonding agent and moreover, a frame body 3 is fixed on the sink 1 with a bonding agent in such a way as to surround the side surfaces of the substrate 2. Then, parts, on which an Al plating 5 is applied, of frame terminals 4 and Al pads 6 on electrodes of the substrate 2 are connected to each other with Al wires 7 by ultrasonic wire bonding. Lastly, a cap body 8 is fixed on the upper side of the frame body 3 with a bonding agent to seal the substrate 2 in a hallow state. In such a way, as the frame body 3 is provided with supporting parts 3a to support stably and closely the terminals 4 in such a way as to protrude on its inside, the connection between the terminals 4 and the electrodes of the substrate 2 can be executed by ultrasonic wire bonding and is easy to automatize. Moreover, a flux cleaning process results in being able to omit and the cost of a product can be reduced.

Description

【発明の詳細な説明】 ［産業上の利用分野］ 本発明は、半導体基板を、ヒートシンク、枠体および蓋
体によって中空封止する半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device in which a semiconductor substrate is hollow-sealed with a heat sink, a frame, and a lid.

［従来の技術］ 第３図は、この種の半導体装置の一部を断面にして示す
斜視図であり、第４図は、第３図の切断面線Ｂ−Ｂから
見た断面図である。これらの図において、ｌはアルミニ
ウム製のヒートシンク、２はこのヒートシンク！上に接
着剤により固着されたセラミック製の半導体基板、３ｏ
はエポキシ樹脂製の矩形枠状の枠体であり、この枠体３
゜の側壁には、黄銅製の一対のフレーム端子４が、その
内側から外側に亘って貫設されている。１０は枠体３゜
の内側に延出したフレーム端子４と半導体基板２の電極
とを接続するリード線であり、このリード線１０は、半
田付は接続されている。８は枠体３゜のヒートシンク１
と対向する側に接着剤により固着されるエポキシ樹脂製
の流体である。[Prior Art] FIG. 3 is a perspective view showing a part of this type of semiconductor device in cross section, and FIG. 4 is a sectional view taken from the section line BB in FIG. 3. . In these figures, l is an aluminum heat sink, and 2 is this heat sink! Ceramic semiconductor substrate fixed with adhesive on top, 3o
is a rectangular frame made of epoxy resin, and this frame 3
A pair of frame terminals 4 made of brass are penetrated through the side wall of the frame from the inside to the outside. Reference numeral 10 denotes a lead wire that connects the frame terminal 4 extending inside the frame 3° and the electrode of the semiconductor substrate 2, and this lead wire 10 is connected by soldering. 8 is a heat sink 1 with a 3° frame
It is a fluid made of epoxy resin that is fixed with adhesive on the opposite side.

かかる構造の半導体装置の製造は、次のような手順によ
って行われる。A semiconductor device having such a structure is manufactured by the following procedure.

先ず、ヒートシンクｌ上に、接着剤によって半導体基板
２を固着し、さらに、この半導体基板２の側面を外囲す
るように枠体３゜を固着する。First, the semiconductor substrate 2 is fixed onto the heat sink 1 with an adhesive, and then the frame 3° is fixed so as to surround the side surface of the semiconductor substrate 2.

次に、リード線１０の両端を、枠体３゜のフレーム端子
４と半導体基板２の電極とにそれぞれ半田付し、その後
、半田付の際に、半田の流れを良くするために塗布され
たフラックスを洗浄し、最後に、蓋体８を、枠体３゜に
接着剤で固定して半導体基板２を中空封止する。Next, both ends of the lead wire 10 are soldered to the frame terminal 4 of the frame body 3° and the electrode of the semiconductor substrate 2, respectively. The flux is washed away, and finally, the lid body 8 is fixed to the frame body 3° with an adhesive to seal the semiconductor substrate 2 hollow.

［発明が解決しようとする課題］ このように従来の半導体装置では、フレーム端子４と半
導体基板２の電極との間の接続は、リード線１０の半田
付により行われるが、このようなリード線の半田付は作
業は、自動化が困難であり、さらに、フラックスの洗浄
工程が必要となり、工程数が多いことなどから製品のコ
ストが高くつくという難点がある。[Problems to be Solved by the Invention] As described above, in the conventional semiconductor device, the connection between the frame terminal 4 and the electrode of the semiconductor substrate 2 is performed by soldering the lead wire 10. Soldering is difficult to automate, and it also requires a flux cleaning process, which increases the cost of the product due to the large number of steps.

本発明は、上述の点に鑑みて為されたものであって、フ
レーム端子と半導体基板の電極との接続作業の自動化を
容易にし、コストの低減を図ることを目的とする。The present invention has been made in view of the above-mentioned points, and an object of the present invention is to facilitate automation of the connection work between frame terminals and electrodes of a semiconductor substrate, and to reduce costs.

［課題を解決するための手段］ 本発明では、上述の目的を達成するために、板状のヒー
トシンク上に、半導体基板が止着され、前記ヒートシン
クの端縁に沿う枠形状で、かつ、その枠の内側から外側
に亘って貫設されたフレーム端子を有する枠体が、前記
ヒートシンク上に前記半導体基板を外囲するように止着
され、前記半導体基板の電極と前記フレーム端子の前記
枠体の内側に延出した部分とがリード線を介して接続さ
れ、前記枠体の前記ヒートシンクに対向する側に、板状
の蓋体が止着されることにより、前記半導体基板を中空
封止してなる半導体装置において、前記枠体には、前記
内側に延出したフレーム端子の前記リード線との接続部
以外の部分に密接して前記内側に延出したフレーム端子
を安定的に支持する支持部が突設されている。[Means for Solving the Problems] In order to achieve the above-mentioned object, in the present invention, a semiconductor substrate is fixed on a plate-shaped heat sink, and the semiconductor substrate is formed in a frame shape along the edge of the heat sink. A frame body having a frame terminal penetrating from the inside to the outside of the frame is fixed on the heat sink so as to surround the semiconductor substrate, and the electrode of the semiconductor substrate and the frame body of the frame terminal are fixed to the heat sink so as to surround the semiconductor substrate. A plate-like lid body is attached to the side of the frame body facing the heat sink, whereby the semiconductor substrate is hollow-sealed. In the semiconductor device, the frame includes a support that stably supports the inwardly extending frame terminal in close contact with a portion of the inwardly extending frame terminal other than the connection portion with the lead wire. A protruding section is provided.

［作用］ 上記構成によれば、枠体には、該枠体の内側に延出した
フレーム端子の部分を安定的に密着支持する支持部を設
けているので、該フレーム端子と半導体基板の電極との
接続に超音波ワイヤボンディングを行っても超音波エネ
ルギーがフレーム端子から逃げてしまうことがなくなり
、したがって、前記フレーム端子と半導体基板の電極と
の接続に超音波ワイヤボンディングを適用することが可
能となり、接続作業の自動化が容易となる。[Function] According to the above configuration, the frame is provided with a support portion that stably and closely supports the portion of the frame terminal extending inside the frame, so that the frame terminal and the electrode of the semiconductor substrate are connected to each other. Even if ultrasonic wire bonding is performed for connection with the frame terminal, ultrasonic energy will not escape from the frame terminal, and therefore, ultrasonic wire bonding can be applied to the connection between the frame terminal and the electrode of the semiconductor substrate. This makes it easy to automate the connection work.

［実施例］ 以下、図面によって本発明の実施例について、詳細に説
明する。[Examples] Examples of the present invention will be described in detail below with reference to the drawings.

第１図は、本発明の一実施例の半導体装置の一部を断面
にして示す斜視図であり、第２図は第１図の切断面線Ａ
−Ａから見た断面図である。FIG. 1 is a perspective view showing a part of a semiconductor device according to an embodiment of the present invention in cross section, and FIG. 2 is a cross-sectional view showing a section line A in FIG.
- It is a sectional view seen from A.

これらの図において、ｌは板状のアルミニウム製のヒー
トシンクであり、このヒートシンク１上には、セラミッ
ク製の半導体基板２が接着剤によって固着される。さら
に、ヒートシンク！の端縁に沿う矩形枠状のエポキシ樹
脂製の枠体３が、半導体基板２の前後左右の各側面を外
囲するようにヒートシンク１に接着剤によって固着され
る。この枠体３の一側壁には、黄銅製の一対のフレーム
端子４が、枠体３の内側から外側に亘って貫設されてい
る。In these figures, l is a plate-shaped aluminum heat sink, and a ceramic semiconductor substrate 2 is fixed onto this heat sink 1 with an adhesive. Plus, a heatsink! A rectangular frame 3 made of epoxy resin along the edge of the semiconductor substrate 2 is fixed to the heat sink 1 with an adhesive so as to surround the front, rear, left, and right sides of the semiconductor substrate 2 . A pair of frame terminals 4 made of brass are penetrated through one side wall of the frame 3 from the inside to the outside of the frame 3.

この実施例では、枠体３の内側に延出したフレーム端子
４と半導体基板２の電極との接続を、従来のリード線の
半田付は接続ではなく、超音波ワイヤボンディングによ
り行えるようにするために、次のように構成している。In this embodiment, the connection between the frame terminal 4 extending inside the frame body 3 and the electrode of the semiconductor substrate 2 is made by ultrasonic wire bonding instead of the conventional soldering of lead wires. It is configured as follows.

すなイつち、超音波ワイヤボンディングの際に、フレー
ム端子４が振動して超音波エネルギーが、フレーム端子
４から逃げてしまうことがないように、枠体３には、該
枠体３の内側に延出したフレーム端子の下面側に密接し
て該フレーム端子４を安定的に支持する直方体状の支持
部３ａが突設されている。In other words, in order to prevent ultrasonic energy from escaping from the frame terminal 4 due to vibration of the frame terminal 4 during ultrasonic wire bonding, the frame 3 has a A rectangular parallelepiped-shaped support portion 3a that stably supports the frame terminal 4 in close contact with the lower surface of the frame terminal extending inward is protruded.

また、この実施例では、フレーム端子４と半導体基板２
の電極とが同種金属同士の接合になるように、フレーム
端子４の超音波ワイヤボンディングされる部分には、ア
ルミニウムメツキ５が施される一方、半導体基板２の電
極上には、アルミニウムパッド６が形成されている。Further, in this embodiment, the frame terminal 4 and the semiconductor substrate 2
The part of the frame terminal 4 to which ultrasonic wire bonding is to be performed is coated with aluminum plating 5 so that the electrodes on the semiconductor substrate 2 are bonded with the same type of metal, while the aluminum pad 6 is placed on the electrode of the semiconductor substrate 2. It is formed.

７は、その両端がフレーム端子４と半導体基板２のアル
ミニウムパッド６とに超音波ボンディングされるアルミ
ニウムワイヤであり、８は枠体３のヒートシンクｌに対
向する側、すなわち、上側に接着剤によって固着される
エポキシ樹脂製の板状の蓋体である。7 is an aluminum wire whose both ends are ultrasonically bonded to the frame terminal 4 and the aluminum pad 6 of the semiconductor substrate 2, and 8 is fixed with adhesive to the side of the frame 3 facing the heat sink l, that is, the upper side. It is a plate-shaped lid made of epoxy resin.

以上の構成を有する半導体装置の製造は、次のような手
順によって行われる。The semiconductor device having the above configuration is manufactured by the following procedure.

先ず、ヒートシンクｌ上に、接着剤によって半導体基板
２を固着し、さらに、ヒートシンクｌに前記半導体基板
２の側面を外囲するように枠体３を接着剤によって固着
する。First, the semiconductor substrate 2 is fixed onto the heat sink 1 with an adhesive, and then the frame 3 is fixed onto the heat sink 1 with an adhesive so as to surround the side surface of the semiconductor substrate 2.

次に、超音波ワイヤボンディングにより、フレーム端子
４のアルミニウムメツキ５が施された部分と、半導体基
板２の電極上のアルミニウムパッド６との間をアルミニ
ウムワイヤ７で接続する。Next, by ultrasonic wire bonding, the aluminum wire 7 is used to connect the portion of the frame terminal 4 to which the aluminum plating 5 is applied and the aluminum pad 6 on the electrode of the semiconductor substrate 2.

最後に、蓋体８を、枠体３の上側に接着剤で固定して半
導体基板２を中空封止する。Finally, the lid 8 is fixed to the upper side of the frame 3 with an adhesive to seal the semiconductor substrate 2 hollow.

このように枠体３に、フレーム端子４を安定的に密着支
持する支持部３ａを突設したので、フレーム端子４と半
導体基板２の電極との接続を超音波ワイヤボンディング
により行うことができ、従来のリード線の半田付けによ
る接続方法に比較して自動化しやすく、かつ、フラヅク
ス洗浄工程を省略できることになり、製品のコストを低
減することが可能となる。In this way, since the frame body 3 is provided with the supporting part 3a that stably and closely supports the frame terminal 4, the frame terminal 4 and the electrode of the semiconductor substrate 2 can be connected by ultrasonic wire bonding. This method is easier to automate than the conventional method of connecting lead wires by soldering, and the flux cleaning process can be omitted, making it possible to reduce product costs.

しかも、この実施例では、フレーム端子４の接続部には
、アルミニウムメツキ５を施し、半導体基板２の電極上
には、アルミニウムパッド６を形成してアルミニウムワ
イヤ７で接続するというように同種金属同士の接合とな
っており、従来例の異種金属同士の接合に比べて接続の
信頼性が向上することになる。Furthermore, in this embodiment, the connecting portions of the frame terminals 4 are plated with aluminum 5, aluminum pads 6 are formed on the electrodes of the semiconductor substrate 2, and the aluminum wires 7 are used to connect the same metals. The reliability of the connection is improved compared to the conventional bonding of dissimilar metals.

上述の実施例では、フレーム端子４と半導体基板２の電
極とを接続するワイヤとしてアルミニウムワイヤ７を用
いるとともに、フレーム端子４にアルミニウムメツキ５
を施したけれども、本発明の他の実施例として、前記ワ
イヤとして金ワイヤあるいは銅ワイヤを用い、フレーム
端子４に金メツキあるいは銀メツキを施すようにしても
よい。In the above embodiment, the aluminum wire 7 is used as the wire connecting the frame terminal 4 and the electrode of the semiconductor substrate 2, and the frame terminal 4 is coated with aluminum plating 5.
However, in another embodiment of the present invention, a gold wire or a copper wire may be used as the wire, and the frame terminal 4 may be plated with gold or silver.

［発明の効果］ 以上のように本発明によれば、枠体には、該枠体の内側
に延出したフレーム端子の部分を密着支持する支持部を
設けているので、該フレーム端子と半導体基板の電極と
の接続に超音波ワイヤボノディノグを適用することが可
能となり、これによって、接続作業の自動化を図ること
ができ、コストの低減を図ることが可能となる。[Effects of the Invention] As described above, according to the present invention, the frame is provided with a support portion that tightly supports the portion of the frame terminal extending inside the frame, so that the frame terminal and the semiconductor It becomes possible to apply ultrasonic wire bonding to the connection with the electrode of the substrate, thereby making it possible to automate the connection work and reduce costs.

【図面の簡単な説明】 第１図は本発明の一実施例の半導体装置の一部を断面に
して示す斜視図、第２図は第１図の切断面線Ａ−Ａから
見た断面図、第３図は従来例の半導体装置の一部を断面
にして示す斜視図、第４図は第３図の切断面線Ｂ−Ｂか
ら見た断面図である。 １・・ヒートシンク、２・・・半導体基板、３　・枠体
、３ａ・・支持部、４・・・フレーム端子、８・・・蓋
体。[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a perspective view showing a part of a semiconductor device according to an embodiment of the present invention in cross section, and FIG. 2 is a sectional view taken along the section line A-A in FIG. 1. 3 is a perspective view showing a part of a conventional semiconductor device in cross section, and FIG. 4 is a sectional view taken along the section line BB in FIG. 3. DESCRIPTION OF SYMBOLS 1... Heat sink, 2... Semiconductor board, 3... Frame body, 3a... Support part, 4... Frame terminal, 8... Lid body.

Claims (1)

【特許請求の範囲】[Claims] （１）板状のヒートシンク上に、半導体基板が止着され
、前記ヒートシンクの端縁に沿う枠形状で、かつ、その
枠の内側から外側に亘って貫設されたフレーム端子を有
する枠体が、前記ヒートシンク上に前記半導体基板を外
囲するように止着され、前記半導体基板の電極と前記フ
レーム端子の前記枠体の内側に延出した部分とがリード
線を介して接続され、前記枠体の前記ヒートシンクに対
向する側に、板状の蓋体が止着されることにより、前記
半導体基板を中空封止してなる半導体装置において、 前記枠体には、前記内側に延出したフレーム端子の前記
リード線との接続部以外の部分に密接して前記内側に延
出したフレーム端子を安定的に支持する支持部が突設さ
れることを特徴とする半導体装置。(1) A semiconductor substrate is fixed on a plate-shaped heat sink, and a frame body has a frame shape along the edge of the heat sink and has a frame terminal penetrating from the inside to the outside of the frame. , the semiconductor substrate is fixed on the heat sink so as to surround the semiconductor substrate, the electrodes of the semiconductor substrate and the portions of the frame terminals extending inside the frame are connected via lead wires, and the frame In the semiconductor device in which the semiconductor substrate is sealed in a hollow manner by fixing a plate-shaped lid body to a side of the body facing the heat sink, the frame body includes the frame extending inwardly. A semiconductor device characterized in that a support portion protruding from a portion of the terminal other than the connection portion with the lead wire and stably supporting the frame terminal extending inwardly in close contact with the portion thereof.
JP63243105A 1988-09-27 1988-09-27 Semiconductor device Pending JPH0290540A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63243105A JPH0290540A (en) 1988-09-27 1988-09-27 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63243105A JPH0290540A (en) 1988-09-27 1988-09-27 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH0290540A true JPH0290540A (en) 1990-03-30

Family

ID=17098873

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63243105A Pending JPH0290540A (en) 1988-09-27 1988-09-27 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0290540A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04127444A (en) * 1990-09-18 1992-04-28 Nec Corp Glass-sealed semiconductor device
EP1300881A2 (en) * 2001-10-05 2003-04-09 NEC Compound Semiconductor Devices, Ltd. Method of manufacturing semiconductor packaging
JP2014033119A (en) * 2012-08-06 2014-02-20 Mitsubishi Electric Corp Semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04127444A (en) * 1990-09-18 1992-04-28 Nec Corp Glass-sealed semiconductor device
EP1300881A2 (en) * 2001-10-05 2003-04-09 NEC Compound Semiconductor Devices, Ltd. Method of manufacturing semiconductor packaging
EP1300881A3 (en) * 2001-10-05 2006-11-29 Nec Electronics Corp Method of manufacturing semiconductor packaging
JP2014033119A (en) * 2012-08-06 2014-02-20 Mitsubishi Electric Corp Semiconductor device

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