JPH0289557U - - Google Patents
Info
- Publication number
- JPH0289557U JPH0289557U JP16987588U JP16987588U JPH0289557U JP H0289557 U JPH0289557 U JP H0289557U JP 16987588 U JP16987588 U JP 16987588U JP 16987588 U JP16987588 U JP 16987588U JP H0289557 U JPH0289557 U JP H0289557U
- Authority
- JP
- Japan
- Prior art keywords
- address
- microcomputer
- pull
- prom
- memory cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Microcomputers (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16987588U JPH0289557U (cs) | 1988-12-27 | 1988-12-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16987588U JPH0289557U (cs) | 1988-12-27 | 1988-12-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0289557U true JPH0289557U (cs) | 1990-07-16 |
Family
ID=31460320
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16987588U Pending JPH0289557U (cs) | 1988-12-27 | 1988-12-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0289557U (cs) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61190635A (ja) * | 1985-02-19 | 1986-08-25 | Sanyo Electric Co Ltd | マイクロコンピユ−タ |
-
1988
- 1988-12-27 JP JP16987588U patent/JPH0289557U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61190635A (ja) * | 1985-02-19 | 1986-08-25 | Sanyo Electric Co Ltd | マイクロコンピユ−タ |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0365023A3 (en) | Address control circuit for data memory employed in signal delay circuit | |
| JPH0289557U (cs) | ||
| JPH022751U (cs) | ||
| JPS6214536U (cs) | ||
| JPH01174929U (cs) | ||
| JPH0361699U (cs) | ||
| JPH0255753U (cs) | ||
| JPS60140105U (ja) | 増設ベ−スのアドレス設定回路 | |
| JPH05241946A (ja) | Rom内蔵ランダムアクセスメモリ装置 | |
| JPH0214143U (cs) | ||
| JPH0280399U (cs) | ||
| JPH03111013U (cs) | ||
| JPS6335147U (cs) | ||
| JPS6087050U (ja) | デ−タ転送制御装置 | |
| JPS60158254U (ja) | デ−タ記憶機能付小型電子機器 | |
| JPH0354057U (cs) | ||
| JPH0313504U (cs) | ||
| JPS6074300U (ja) | 電気的に消去可能なプログラマブル読出し専用メモリ | |
| JPH0161745U (cs) | ||
| JPH01172155U (cs) | ||
| JPS5921769U (ja) | 信号選択回路 | |
| JPH02110098U (cs) | ||
| JPH01133646U (cs) | ||
| JPH0394698U (cs) | ||
| JPS6324747U (cs) |