JPH0289322A - Manufacture of semiconductor device having epitaxial layer - Google Patents

Abstract

PURPOSE:To have stable electrical characteristics at all times by a method wherein, after a first conductivity type first buried layer is formed, a second conductivity type first epitaxial layer is formed over the whole surface, a second conductivity type second buried layer is formed thereon, and further a second conductivity type second epitaxial layer is formed. CONSTITUTION:BCl3 is diffused into a desired area of the surface of a p<-> type semiconductor substrate 1 and a p<+> type first buried layer 2 having a higher density than the substrate 1 is formed. Then, an n<-> type first epitaxial layer 3 is formed on the semiconductor substrate 1 including the first buried layer 2. Next, an n<-> type second buried layer 4 is formed on the surface of the first epitaxial layer 3 by introducing an n<+> type impurity from the first epitaxial layer 3 in a high density. Then, an n<-> type second epitaxial layer 5 is formed on the first epitaxial layer 3 including the second buried layer 4. A p-type impurity is introduced onto the area just above the first buried layer 2 and connected to the layer 2, forming an insulation diffusion area 6. Thereafter, using the second epitaxial layer 5 as an active area, desired devices such as npn transistors and lateral pnp transistors are formed.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device having an epitaxial layer such as a bipolar semiconductor device, and in particular to a method for manufacturing a semiconductor device having an epitaxial layer such as a bipolar semiconductor device. The present invention relates to a method of manufacturing a semiconductor device having the present invention.

[Prior art] Conventionally, in bipolar semiconductor integrated circuit devices, N
There are PN transistors and PNP) transistors.
Among the P) transistors, the horizontal PNP) transistor shown in FIG. 4 is often used.

As shown in FIG. 4, in this lateral PNP transistor, an N+ type second buried layer 24 is formed by selectively doping N type impurities at a high concentration onto a P− type semiconductor substrate 21. Similarly, P-type impurities are introduced at a high concentration to make P-type impurities.
A type 1 first buried layer 22 is formed. A semiconductor substrate 21 including this first buried layer 22 and second buried layer 24
An N-type epitaxial layer 29 is formed thereon.

An insulating diffusion region 26 is formed in this epitaxial layer 29 by introducing P-type impurities so as to reach the first buried 122 .

In this way, the first buried layer 22 and the insulating diffusion region 26
Regions such as the emitter/collector 17 and the base 18 of a desired transistor are formed on each element forming region isolated by the above steps.

In the bipolar semiconductor device formed as described above, the first buried layer 22 and the insulating diffusion region 26 insulate and isolate each element forming region by the PN junction surface with the epitaxial layer 29. Further, the second buried layer 24 is formed to lower the collector DC resistance of the PNP transistor formed on this element formation region.

This lateral PNP transistor has the advantage that it can be formed in the same manufacturing process as an NPN transistor without adding any additional steps, and is therefore widely used. Therefore, in order to improve the breakdown voltage characteristics of the semiconductor integrated circuit device formed on the substrate, the specific resistance (ρ
epi) needs to be increased.

[Problems to be Solved by the Invention] However, in the method for manufacturing a semiconductor device described above, when the specific resistance (ρepi) of the epitaxial layer 29 is increased, the impurity element (for example, boron) introduced into the first buried layer 22 is Autodoping and epitaxial layer 2
9 may be invaded. In this way, the first buried layer 22
The impurity profile when the impurity introduced into the epitaxial layer 29 enters the epitaxial layer 29 through autodoping will be described below.

Figure 5 is a graph showing the impurity profile of the cross section shown by ■-■ in Figure 4, with the horizontal axis representing the distance from the substrate surface toward the inside, and the vertical axis representing the carrier concentration, showing the relationship between the two. It is a diagram. The P-type carrier concentration is high in the emitter-collector region 17 of the lateral PNP transistor, while the carrier concentration is extremely low at the interface with the epitaxial layer 29 because a PN junction is formed. In the epitaxial layer 29 region, the carrier concentration is constant at a low value, but near the interface with the second buried layer 24, the P-type impurity auto-doped from the first buried layer 22 increases the N-type impurity. The concentration decreases because the carrier is neutralized. In the region of the second buried layer 24, the carrier concentration is high due to N-type impurities, and at the junction surface of the P-type semiconductor substrate 21, the carrier concentration is extremely reduced due to the PN junction, and within the semiconductor substrate 21, the carrier concentration remains at a constant value. becomes.

As is clear from FIG. 5, when the impurity in the first buried layer 22 enters the epitaxial layer 29 by autodoping, the carrier concentration on the epitaxial layer side at the interface between the epitaxial layer 29 and the second buried Ji 124 increases. It gets lower. For this reason, the specific resistance (ρepi) of this region becomes high, so that the value of the apparent specific resistance of the second buried layer 24 becomes high. This causes the disadvantage that the collector saturation voltage (VCE(SAT)) of the NPN transistor increases.

Furthermore, the amount of holes injected from the emitter of the lateral PNP transistor into the semiconductor substrate 1 increases, and the recombination current in the base region increases, so the base current increases.
Therefore, there is a problem that the current amplification factor (h FE) of the transistor decreases.

The present invention has been made in view of such problems, and includes:
Even if impurities in the first buried layer autodope and invade the epitaxial layer, it will not affect the characteristics of the transistor formed on the substrate surface, making it possible to manufacture semiconductor devices that always have stable electrical characteristics. It is an object of the present invention to provide a method for manufacturing a semiconductor device having an epitaxial layer that can be manufactured.

[Means for Solving the Problems] A method for manufacturing a semiconductor device having an epitaxial layer according to the present invention includes selectively introducing first conductivity type impurities into the surface of a first conductivity type semiconductor substrate at a higher concentration than that of the substrate. a step of forming a first buried layer; a step of depositing a first epitaxial layer of a second conductivity type on the entire surface; and a step of selectively applying impurities of a second conductivity type to the surface of the first epitaxial layer. The method is characterized by comprising the steps of: forming a second buried layer by introducing a second buried layer at a higher concentration than the second epitaxial layer; and depositing a second epitaxial layer of the second conductivity type on the entire surface.

[Function] The method for manufacturing a semiconductor device having an epitaxial layer according to the present invention includes forming a first buried layer of a first conductivity type on a semiconductor substrate of a first conductivity type, and then depositing a first epitaxial layer of a second conductivity type on the entire surface. form. Then, a second buried layer of the second conductivity type is formed on the first epitaxial layer, and a second epitaxial layer of the second conductivity type is further formed on the entire surface. This results in
Even if the impurities in the first buried layer autodope and invade the first epitaxial layer, the electrical characteristics of the transistor do not change because this region is outside the active region of the transistor formed on the surface of the semiconductor substrate.

[Example] Next, an example of the present invention will be described with reference to the accompanying drawings.

FIGS. 1(a) to 1(d) are sectional views showing the first embodiment of the present invention in the order of steps.

First, as shown in Figure 1(a), the specific resistance (ρepi)
A P+ type first buried layer 2 having a concentration higher than that of the substrate 1 is formed by diffusing BCl3 into a desired region of the surface of a P- type semiconductor substrate 1 having a resistance of 1 to 40 Ω·cm. Then, on the semiconductor substrate 1 including the first buried layer 2, an N-type first epitaxial layer 3 is formed with a layer thickness (Tepi) of 3 to 5 μm and a specific resistance (
ρepi) is 5 to 10 Ω·cm. At this time, the impurities introduced into the first buried layer 2 auto-dope the first epitaxial layer 3, but as will be described later, this does not change the characteristics of the transistor.

Next, as shown in FIG. 1(b), N-type impurities are added to the surface of the first epitaxial layer 3.
The N-type second buried layer 4 is formed by introducing at a higher concentration.

Next, as shown in FIG. 1(C), this second buried layer 4
The N-type second epitaxial layer 5 is formed on the first epitaxial layer 3 containing
, so that the specific resistance (ρepi) is 5 to 10 Ω·cm, which is the same as that of the first epitaxial layer 5.

Then, as shown in FIG. 1(d), a P-type impurity is introduced into a region directly above the first buried layer 2 and connected to the first buried layer 2 to form an insulating diffusion region 6. Thereafter, using the second epitaxial layer 5 as an active region, desired elements such as an NPN transistor and a lateral PNP transistor are formed using the same steps as in the conventional method. Note that numerals 17 and 18 schematically represent the emitter, collector, and base, respectively, of lateral PNP transistors, and the second epitaxial layer 5 separated by the insulating diffusion region 16 becomes the active region of these transistors.

In this embodiment, when the first epitaxial layer 3 is formed on the semiconductor substrate 1 as described above, boron atoms, which are impurities in the first buried layer 2, are added to the first epitaxial layer 3.
However, since this first epitaxial layer 3 is outside the active region of the transistor formed on the surface of the second epitaxial layer 5, it does not affect the characteristics of the transistor. FIG. 3 is a graph diagram showing the relationship between the distance in the inward direction (horizontal axis) and the carrier concentration (vertical axis) starting from the substrate surface in the cross section indicated by (1)-(2). Horizontal PNP
In the emitter/collector region 17 of the transistor, the carrier concentration is high due to P-type impurities, and at the interface with the second epitaxial layer 5, the carrier concentration is extremely low due to the PN junction. In the region of the second epitaxial layer 5, the carrier concentration is constant at a low value, and the second buried layer 4
In the region, the carrier concentration becomes high due to the N-type impurity.

The carrier concentration in the region of the first epitaxial layer 3 on the second buried layer 4 side is the same as that of the region of the second epitaxial layer 5, but in a slightly deeper region, the carrier concentration is auto-doped from the first buried layer 2. The carrier concentration decreases due to the P-type impurity that has entered. At the junction surface between the first epitaxial layer 3 and the semiconductor substrate 1, the carrier concentration becomes extremely low due to the PN junction. Furthermore, the carrier concentration within the semiconductor substrate 1 is constant.

In this embodiment, although the first epitaxial layer 3 is affected by autodoping from the first buried layer 2, the second epitaxial layer 5, which becomes the active region on the second buried layer 4, is affected by this autodoping. No autodoping effects. Therefore, the carrier concentration does not decrease at the interface between the second epitaxial layer 5 and the second buried layer 4. Therefore, the electrical characteristics of the transistor formed on the second epitaxial layer 5 are different from those of the first buried N2 impurity. changes due to autodoping are avoided.

Next, a second embodiment of the present invention will be described.

In this example, the layer thickness (T
This embodiment differs from the first embodiment in that the resistivity (ρepi) is set to 3 to 5 μm and the specific resistance (ρepi) is set to 1 to 2 Ω·cm. Since all other conditions are formed in the same manner as in the first embodiment, detailed explanation thereof will be omitted. Further, the formed semiconductor device has the structure shown in FIG. 1(d), similar to the first embodiment.

FIG. 3 is a graph showing the relationship between the distance directed inward from the substrate surface and the carrier concentration in this example.

The carrier concentration in each region from the emitter or collector region 17 on the substrate surface to the second buried layer 4 is the same as in the first embodiment. Since the impurity concentration in the region of the first epitaxial layer 3 is higher than that in the first embodiment, the carrier concentration is also higher. At the interface with the semiconductor substrate 1, the carrier concentration is extremely reduced due to the PN junction, and within the semiconductor substrate 1, the carrier concentration remains constant.

In this embodiment, since the resistivity of the first epitaxial layer 3 is low, that is, the impurity concentration is high, the autodoping phenomenon of impurities in the first buried layer 2 does not occur. In this way, by maintaining the specific resistance of the epitaxial layer 5 in the active region of the transistor high and increasing the impurity concentration of the epitaxial layer 5 outside the active region of the transistor, auto-doping of impurities in the first buried layer 2 can be achieved. Deterioration of electrical characteristics can be prevented.

[Effects of the Invention] As described above, according to the present invention, it is possible to avoid autodoping and intrusion of impurities in the first buried layer into the epitaxial layer that is the active region of the transistor. This makes it possible to prevent the collector saturation voltage (Vcε(SAT)) of the transistor formed on the surface of the epitaxial layer from increasing, and also to prevent the current amplification factor (Vcε(SAT)) of the lateral transistor from increasing.
hpE) can be prevented and a semiconductor device having an epitaxial layer with stable electrical characteristics can be manufactured at a high yield.

[Brief explanation of drawings]

FIGS. 1(a) to (d) are cross-sectional views showing the first embodiment of the present invention in the order of steps, FIG. 2 is a graph showing the carrier concentration distribution, and FIG. FIG. 4 is a graph showing the carrier concentration distribution of the embodiment, FIG. 4 is a graph showing a conventional method for manufacturing a bipolar semiconductor device, and FIG. 5 is a graph showing the carrier concentration distribution. 1.21; semiconductor substrate, 2, 22. First buried layer, 3: Epitaxial layer, 4, 24; Second buried layer, 5; Second epitaxial layer, 6, 26; Insulating diffusion region, 17; Lateral P
Collector-emitter of NP transistor, 18; horizontal P
NP) base of transistor, 29; epitaxial layer

Claims (1)

[Claims] (1) Forming a first buried layer by selectively introducing first conductivity type impurities into the surface of the first conductivity type semiconductor substrate at a higher concentration than the substrate; a step of depositing an epitaxial layer; a step of selectively introducing impurities of a second conductivity type into the surface of the first epitaxial layer at a higher concentration than the first epitaxial layer to form a second buried layer; 1. A method for manufacturing a semiconductor device having an epitaxial layer, comprising the step of depositing a second epitaxial layer of a second conductivity type.