JPH0288319U - - Google Patents
Info
- Publication number
- JPH0288319U JPH0288319U JP16848388U JP16848388U JPH0288319U JP H0288319 U JPH0288319 U JP H0288319U JP 16848388 U JP16848388 U JP 16848388U JP 16848388 U JP16848388 U JP 16848388U JP H0288319 U JPH0288319 U JP H0288319U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- variable
- variable gain
- gain
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000006835 compression Effects 0.000 claims description 6
- 238000007906 compression Methods 0.000 claims description 6
- 238000009499 grossing Methods 0.000 claims description 5
- 230000003321 amplification Effects 0.000 claims 1
- 238000003199 nucleic acid amplification method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
Description
第１図は、本考案の基準点可変型の圧縮回路に
係る実施例を示すブロツク図、第２図は、本考案
の基準点可変型の圧縮回路に係る一具体例を示す
回路図、第３図は、従来の圧縮回路を示す為の回
路図、第４図は、本考案の基準点可変型の圧縮回
路の入出力特性を説明する為の図である。
３：演算増幅回路、４：可変利得回路、５：整
流平滑回路、６：スイツチ、７，８：可変電流源
回路、９，１０：基準電圧源、１２，１３：電流
ミラー回路、Ｒ１乃至Ｒ９：抵抗、Ｑ１乃至Ｑ１
８：トランジスタ、Ａ１：反転増幅器。
FIG. 1 is a block diagram showing an embodiment of the variable reference point type compression circuit of the present invention, and FIG. 2 is a circuit diagram showing a specific example of the variable reference point type compression circuit of the present invention. FIG. 3 is a circuit diagram showing a conventional compression circuit, and FIG. 4 is a diagram illustrating input/output characteristics of the variable reference point type compression circuit of the present invention. 3: operational amplifier circuit, 4: variable gain circuit, 5: rectifier smoothing circuit, 6: switch, 7, 8: variable current source circuit, 9, 10: reference voltage source, 12, 13: current mirror circuit, R1 to R9 :Resistance, Q1 to Q1
8: Transistor, A1: Inverting amplifier.
Claims (1)
路と、該演算増幅回路からの出力信号成分が夫々
第１と第２の抵抗を介して供給される可変利得回
路と整流平滑回路とを具え、該整流平滑回路の出
力である利得制御電流により該可変利得回路の利
得が制御され、且つ該可変利得回路の出力が該演
算増幅回路の反転入力端子に接続されてなる圧縮
回路に於いて、該整流平滑回路と該可変利得回路
との間に切り換え用のスイツチが設けられ、該ス
イツチの共通電極が該可変利得回路の利得制御段
に接続され、該スイツチの一方の第１の電極が該
整流平滑回路の出力端子に接続され、該スイツチ
の他方の電極が第１の可変電流源に接続され、且
つ該可変利得回路のバイアス電流を設定する為の
第２の可変電流源回路を具えたことを特徴とする
基準点可変型の圧縮回路。 comprising an inverting amplification type operational amplifier circuit to which an input signal is input; a variable gain circuit and a rectifying and smoothing circuit to which output signal components from the operational amplifier circuit are supplied via first and second resistors, respectively; In the compression circuit, the gain of the variable gain circuit is controlled by the gain control current that is the output of the rectifying and smoothing circuit, and the output of the variable gain circuit is connected to the inverting input terminal of the operational amplifier circuit. A switching switch is provided between the rectifying and smoothing circuit and the variable gain circuit, a common electrode of the switch is connected to a gain control stage of the variable gain circuit, and a first electrode of one side of the switch is connected to the gain control stage of the variable gain circuit. A second variable current source circuit connected to the output terminal of the smoothing circuit, the other electrode of the switch connected to the first variable current source, and for setting the bias current of the variable gain circuit. A variable reference point type compression circuit featuring:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16848388U JPH0648983Y2 (en) | 1988-12-27 | 1988-12-27 | Variable reference point compression circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16848388U JPH0648983Y2 (en) | 1988-12-27 | 1988-12-27 | Variable reference point compression circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0288319U true JPH0288319U (en) | 1990-07-12 |
| JPH0648983Y2 JPH0648983Y2 (en) | 1994-12-12 |
Family
ID=31457700
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16848388U Expired - Fee Related JPH0648983Y2 (en) | 1988-12-27 | 1988-12-27 | Variable reference point compression circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0648983Y2 (en) |
-
1988
- 1988-12-27 JP JP16848388U patent/JPH0648983Y2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0648983Y2 (en) | 1994-12-12 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |