JPH0287885A - Video signal circuit - Google Patents

Video signal circuit

Info

Publication number
JPH0287885A
JPH0287885A JP24144688A JP24144688A JPH0287885A JP H0287885 A JPH0287885 A JP H0287885A JP 24144688 A JP24144688 A JP 24144688A JP 24144688 A JP24144688 A JP 24144688A JP H0287885 A JPH0287885 A JP H0287885A
Authority
JP
Japan
Prior art keywords
signal
circuit
burst
level
screen
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24144688A
Other languages
Japanese (ja)
Inventor
Maki Ikeda
眞樹 池田
Shinji Oda
伸二 小田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP24144688A priority Critical patent/JPH0287885A/en
Publication of JPH0287885A publication Critical patent/JPH0287885A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To reproduce a stable sub-screen even if a video input level of a main screen is fluctuated by inserting a burst signal synchronized with a burst signal of a main screen video signal into a sub-screen chrominance signal, and executing a control so that it amplitude becomes equal to amplitude of the burst signal of the main screen video signal. CONSTITUTION:The title circuit is provided with a first level detector 20 for detecting a burst signal level of a first chrominance signal, and a burst inserting circuit 16 for inserting a burst signal synchronized with a burst signal of a first chrominance signal into a second chrominance signal. Also, said circuit is provided with a second level detector 18 for detecting an output burst signal level of an ACC circuit 17, and a level comparator 19 for comparing said signal level with an output of a first level detector 20 and controlling the gain of the ACC circuit 17 so that the burst signal level of the output of the ACC circuit 17 becomes the same as the burst signal level of a first chrominance signal. In such a way, even if amplitude of a main screen video signal is varied, it does not occur that a color of a sub-screen becomes too dark and the screen becomes unnatural relatively, and a stable reproducing image is obtained.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は映像信号回路に関し、特に2画面合成回路を有
する映像信号回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a video signal circuit, and more particularly to a video signal circuit having a two-screen synthesis circuit.

〔従来の技術〕[Conventional technology]

VTR等に内蔵されている二画面合成(以下P−I N
−Pと記す)回路は、主画面用ビデオ信号(例えばチュ
ーナ出力)の特定領域に副画面用ビデオ信号を挿入する
機能を有しており、P−INP回路出力をVTRからT
V受像機に入力すれば、主画面の中に副画面が挿入され
た画像を再生できる。
Dual screen composition (hereinafter referred to as P-I N) built into VTRs, etc.
The P-INP circuit has the function of inserting a sub-screen video signal into a specific area of the main-screen video signal (for example, tuner output), and transfers the P-INP circuit output from the VTR to the T-INP circuit.
If input to a V receiver, an image with a sub-screen inserted into the main screen can be played back.

第3図は従来の映像信号回路を説明するためのブロック
図である。
FIG. 3 is a block diagram for explaining a conventional video signal circuit.

第3図に示すように、主画面用ビデオ信号は切換器13
に入力されるとともに、帯域フィルタ1に入力される。
As shown in FIG. 3, the main screen video signal is transferred to the switch 13
and is also input to the bandpass filter 1.

帯域フィルタ1により分離された搬送色信号はA CC
(automatic  chromacontrol
 )回路2に入力され、その出力はレベル検出器3で振
幅が一定になるようにループを形成している。ACC回
路2の出力はさらにAPC(automatic ph
ase  control )回路4に入力され、低域
フィルタ5を通って直流に変換され、4×f、。Vco
回路7に入力される(但しrscは副搬送波周波数)、
4XfscVC○回路7の出力は1/4分周器6でfs
cに分周されてAPC回路4に入力され、4 X f 
5cVc O回路7が正確な発振を行なうようにループ
を形成している。4×f scv CO回路7の出力は
メモリ処理回路8にクロック形成信号として入力される
。一方、副画面用ビデオ信号は、クロマデコーダ9で色
差信号R−Y、色差信号B−Y、輝度信号Y、水平同期
信号HD、および垂直同期信号VDが取り出され、それ
ぞれメモリ処理回路8へ入力される。メモリ処理回路8
で色差信号R−Y、色差信号B−Yおよび輝度信号Yは
A−D変換されて書きこまれ、読み出しは主画面用ビデ
オ信号に同期したタイミングで行なわれる。この場合、
読み出しを書きこみの場合の3倍のクロックで行なえば
、副画面の時間軸は1/3に圧縮される。メモリ処理回
路8からはエンコードされた搬送色信号と輝度信号Yが
出力され、それぞれ帯域フィルタ10.低域フィルタ1
1を通って加算器12に入力される。切換器13の入力
の他方には主画面用ビデオ信号が入力されており、切換
信号によって主画面用ビデオ信号と加算器12の出力の
副画面用圧縮ビデオ信号とを切換える。この場合、副画
面用圧縮ビデオ信号の搬送色信号は主画面用ビデオ信号
のバースト信号を基準にした位相になっている。
The carrier color signal separated by bandpass filter 1 is A CC
(automatic chromacontrol
) is input to a circuit 2, and its output forms a loop with a level detector 3 so that the amplitude is constant. The output of the ACC circuit 2 is further converted into an APC (automatic ph
control) is input to the circuit 4, passed through the low-pass filter 5, and converted to direct current, 4×f. Vco
input to circuit 7 (where rsc is the subcarrier frequency),
The output of the 4XfscVC○ circuit 7 is fs by the 1/4 frequency divider 6.
The frequency is divided into 4 x f and input to the APC circuit 4.
A loop is formed so that the 5cVc O circuit 7 performs accurate oscillation. The output of the 4×f scv CO circuit 7 is input to the memory processing circuit 8 as a clock forming signal. On the other hand, the chroma decoder 9 extracts a color difference signal R-Y, a color difference signal B-Y, a luminance signal Y, a horizontal synchronization signal HD, and a vertical synchronization signal VD from the sub-screen video signal, and inputs each to the memory processing circuit 8. be done. Memory processing circuit 8
The color difference signal R-Y, the color difference signal B-Y, and the luminance signal Y are A-to-D converted and written, and reading is performed at a timing synchronized with the main screen video signal. in this case,
If reading is performed at three times as many clocks as writing, the time axis of the sub-screen will be compressed to 1/3. The encoded carrier chrominance signal and luminance signal Y are output from the memory processing circuit 8, and are passed through a bandpass filter 10. Low pass filter 1
1 and is input to the adder 12. The main screen video signal is input to the other input of the switch 13, and the switching signal switches between the main screen video signal and the sub-screen compressed video signal output from the adder 12. In this case, the carrier color signal of the sub-screen compressed video signal has a phase based on the burst signal of the main-screen video signal.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の映像信号回路は、出力されたビデオ信号
をTV受像機で再生する場合、主画面用ビデオ信号の色
副搬送波の振幅が変化すると、副画面の色の濃淡も変化
してしまうという欠点があった。つまり、TV受像機で
は入力されたビデオ信号のバースト信号が一定値になる
ようにACC回路が働くため、例えば主画面用ビデオ信
号のバースト信号の振幅が小さいときには、主画面はA
CC回路のために正常の色信号に補正されて再生できる
が、副画面用圧縮ビデオ信号の振幅が正常であるのにA
CC回路の補正のために副画面の色が濃くなってしまい
、見苦しい画面になるという問題点がある。
In the conventional video signal circuit described above, when the output video signal is played back on a TV receiver, if the amplitude of the color subcarrier of the main screen video signal changes, the color density of the sub screen will also change. There were drawbacks. In other words, in a TV receiver, the ACC circuit works so that the burst signal of the input video signal has a constant value, so for example, when the amplitude of the burst signal of the main screen video signal is small, the main screen is
Due to the CC circuit, the color signal is corrected to normal and can be reproduced, but even though the amplitude of the compressed video signal for the sub screen is normal,
There is a problem in that the color of the sub-screen becomes darker due to the correction of the CC circuit, resulting in an unsightly screen.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の映像信号回路は、第1の搬送色信号のバースト
信号の位相に同期させた第2の搬送色信号により二つの
映像画面を合成する映像信号回路において、第1の搬送
色信号のバースト信号レベルを検出する第1のレベル検
出器と、前記第1の搬送色信号のバースト信号に同期し
たバースト信号を第2の搬送色信号に挿入するバースト
挿入回路と、前記バースト挿入回路の出力のパース信号
の振幅を調整するACC回路と、前記ACC回路出力の
バースト信号レベルを検出する第2のレベル検出器と、
前記第1のレベル検出器と前記第2のレベル検出器との
出力を比較して前記ACC回路出力のバースト信号レベ
ルが前記第1の搬送色信号のバースト信号レベルと同一
になるように前記ACC回路の利得を制御するレベル比
較器とを有して構成される。
The video signal circuit of the present invention is a video signal circuit that synthesizes two video screens using a second carrier color signal synchronized with the phase of a burst signal of a first carrier color signal. a first level detector for detecting a signal level; a burst insertion circuit for inserting a burst signal synchronized with a burst signal of the first carrier color signal into a second carrier color signal; and an output of the burst insertion circuit. an ACC circuit that adjusts the amplitude of the parsed signal; a second level detector that detects the burst signal level of the ACC circuit output;
The outputs of the first level detector and the second level detector are compared so that the burst signal level of the ACC circuit output becomes the same as the burst signal level of the first carrier color signal. and a level comparator that controls the gain of the circuit.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の第1の実施例を説明するためのブロッ
ク図である。
FIG. 1 is a block diagram for explaining a first embodiment of the present invention.

第1図の破線で囲んだ部分が本発明によるもので、破線
部分以外は従来例と同一構成を有している。主画面用ビ
デオ信号は帯域フィルタ1を通って第1の搬送色信号1
4が取り出され、第1のレベル検出器20に入力される
。第1のレベル検出器では第1の搬送色信号14のバー
スト信号の振幅を検出してレベル比較器19に入力され
る。副画面用搬送色信号である第2の搬送色信号は、バ
ースト挿入回路16でバースト信号が挿入される。バー
スト挿入回路16は、1/4分周器6の出力(fsc)
が入力され、パーストゲートパルス期間のみ第2の搬送
色信号にバースト信号を挿入し、その出力はACC回路
17に入力される。
The portion surrounded by the broken line in FIG. 1 is according to the present invention, and the structure other than the broken line portion is the same as that of the conventional example. The main screen video signal passes through a bandpass filter 1 to a first carrier color signal 1.
4 is taken out and input to the first level detector 20. The first level detector detects the amplitude of the burst signal of the first carrier color signal 14 and inputs it to the level comparator 19 . A burst signal is inserted into the second carrier color signal, which is the sub-screen carrier color signal, by a burst insertion circuit 16 . The burst insertion circuit 16 outputs the output (fsc) of the 1/4 frequency divider 6.
is input, a burst signal is inserted into the second carrier color signal only during the burst gate pulse period, and its output is input to the ACC circuit 17.

ACC回路17の利得は、レベル比較器19の出力で制
御され、ACC回路17の出力は第2のレベル検出器1
8でバースト信号の振幅を検出して、レベル比較器19
に入力される。レベル比較器19では、主画面用搬送色
信号のバースト信号の振幅と副画面用搬送色信号のバー
スト信号の振幅を比較して、それらの振幅が等しくなる
ようにACC回路17の利得を制御する。よって、AC
C回路17の出力の搬送色信号の振幅は、主画面用ビデ
オ信号のバースト信号の振幅の変化と同様の変化をする
ため、第1図の回路構成によるビデオ出力をTV受像機
で再生すれば、主画面用ビデオ信号の振幅が変化しても
、副画面の色が濃くなり過ぎたり、相対的に不自然な画
面になることはなく、安定な再生画像が得られる。
The gain of the ACC circuit 17 is controlled by the output of the level comparator 19, and the output of the ACC circuit 17 is controlled by the output of the second level detector 1.
8 detects the amplitude of the burst signal, and the level comparator 19 detects the amplitude of the burst signal.
is input. The level comparator 19 compares the amplitude of the burst signal of the carrier color signal for the main screen with the amplitude of the burst signal of the carrier color signal for the sub-screen, and controls the gain of the ACC circuit 17 so that the amplitudes are equal. . Therefore, A.C.
Since the amplitude of the carrier color signal output from the C circuit 17 changes in the same way as the amplitude of the burst signal of the main screen video signal, if the video output from the circuit configuration shown in FIG. 1 is played back on a TV receiver, Even if the amplitude of the main screen video signal changes, the color of the sub screen will not become too dark or the screen will look relatively unnatural, and a stable reproduced image can be obtained.

第2図は本発明の第2の実施例を説明するためのブロッ
ク図である。振幅制御信号21がバースト挿入回路16
に入力される以外は第1の実施例と同じ構成を有してお
り、第2の搬送色信号に挿入するバースト信号の振幅を
任意に設定できる。
FIG. 2 is a block diagram for explaining a second embodiment of the present invention. The amplitude control signal 21 is transmitted to the burst insertion circuit 16
It has the same configuration as the first embodiment except that it is input to the second carrier color signal, and the amplitude of the burst signal to be inserted into the second carrier color signal can be arbitrarily set.

第2の実施例では、第1の実施例の場合と同様に、切換
器13のビデオ出力をTV受像機で再生すれば、主画面
用ビデオ信号の振幅の影響を受けることのない、安定な
副画面を再生できるとともに、副画面の色の濃淡を主画
面と独立して任意に調整することが可能になるという効
果を有する。
In the second embodiment, as in the case of the first embodiment, if the video output of the switching device 13 is played back on the TV receiver, a stable signal that is not affected by the amplitude of the main screen video signal can be obtained. This has the effect of not only being able to reproduce the sub-screen, but also allowing the color shading of the sub-screen to be arbitrarily adjusted independently of the main screen.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、副画面用搬送色信号に主
画面用ビデオ信号のバースト信号に同期したバースト信
号を挿入して、副画面用搬送色信号のバースト信号の振
幅が主画面用ビデオ信号のバースト信号の振幅と等しく
なるように、副画面用搬送色信号をACC回路で制御す
ることにより、主画面のビデオ入力レベルが変動しても
、安定な副画面を再生できるという効果がある。
As explained above, the present invention inserts a burst signal synchronized with the burst signal of the main screen video signal into the sub-screen carrier color signal, so that the amplitude of the burst signal of the sub-screen carrier color signal is equal to the main screen video signal. By controlling the sub-screen carrier color signal using the ACC circuit so that it is equal to the amplitude of the burst signal, the sub-screen can be reproduced stably even if the main screen video input level fluctuates. .

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の第1の実施例を説明するためのブロッ
ク図、第2図は本発明の第2の実施例を説明するための
ブロック図、第3図は従来の映像信号回路を説明するた
めのブロック図である。 1・・・帯域フィルタ、2・・・ACC回路、3・・・
レベル検出器、4・・・APC回路、5・・・低域フィ
ルタ、6−1 / 4分周器、7−4 X f scV
 C0回路、8・・・メモリ処理回路、9・・・クロマ
デコーダ、10・・・帯域フィルタ、11・・・低域フ
ィルタ、12・・・加算器、13・・・切換器、14・
・・第1の搬送色信号、15・・・第2の搬送色信号、
16・・・バースト挿入回路、]7・・・ACC回路、
18・・・第2のレベル検出器、1つ・・・レベル比較
器、20・・・第1のレベル検出器、21・・・振幅制
御信号。 し7浄化号
FIG. 1 is a block diagram for explaining a first embodiment of the present invention, FIG. 2 is a block diagram for explaining a second embodiment of the present invention, and FIG. 3 is a block diagram for explaining a conventional video signal circuit. FIG. 2 is a block diagram for explanation. 1...Band filter, 2...ACC circuit, 3...
Level detector, 4...APC circuit, 5...Low pass filter, 6-1/4 frequency divider, 7-4 X f scV
C0 circuit, 8...Memory processing circuit, 9...Chroma decoder, 10...Band filter, 11...Low pass filter, 12...Adder, 13...Switcher, 14...
...first carrier color signal, 15...second carrier color signal,
16... Burst insertion circuit, ]7... ACC circuit,
18... Second level detector, one... Level comparator, 20... First level detector, 21... Amplitude control signal. Shi7 purification issue

Claims (1)

【特許請求の範囲】[Claims] 第1の搬送色信号のバースト信号の位相に同期させた第
2の搬送色信号により二つの映像画面を合成する映像信
号回路において、第1の搬送色信号のバースト信号レベ
ルを検出する第1のレベル検出器と、前記第1の搬送色
信号のバースト信号に同期したバースト信号を第2の搬
送色信号に挿入するバースト挿入回路と、前記バースト
挿入回路の出力のバースト信号の振幅を調整するACC
回路と、前記ACC回路出力のバースト信号レベルを検
出する第2のレベル検出器と、前記第1のレベル検出器
と前記第2のレベル検出器との出力を比較して前記AC
C回路出力のバースト信号レベルが前記第1の搬送色信
号のバースト信号レベルと同一になるように前記ACC
回路の利得を制御するレベル比較器とを有することを特
徴とする映像信号回路。
In a video signal circuit that synthesizes two video screens using a second carrier color signal that is synchronized with the phase of a burst signal of the first carrier color signal, a first carrier color signal that detects the burst signal level of the first carrier color signal is provided. a level detector; a burst insertion circuit that inserts a burst signal synchronized with the burst signal of the first carrier color signal into a second carrier color signal; and an ACC that adjusts the amplitude of the burst signal output from the burst insertion circuit.
a second level detector that detects the burst signal level of the ACC circuit output, and a second level detector that compares the outputs of the first level detector and the second level detector to detect the burst signal level of the ACC circuit;
the ACC so that the burst signal level of the C circuit output is the same as the burst signal level of the first carrier color signal;
A video signal circuit comprising: a level comparator for controlling the gain of the circuit.
JP24144688A 1988-09-26 1988-09-26 Video signal circuit Pending JPH0287885A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24144688A JPH0287885A (en) 1988-09-26 1988-09-26 Video signal circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24144688A JPH0287885A (en) 1988-09-26 1988-09-26 Video signal circuit

Publications (1)

Publication Number Publication Date
JPH0287885A true JPH0287885A (en) 1990-03-28

Family

ID=17074428

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24144688A Pending JPH0287885A (en) 1988-09-26 1988-09-26 Video signal circuit

Country Status (1)

Country Link
JP (1) JPH0287885A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998011733A1 (en) * 1996-09-10 1998-03-19 Thomson Consumer Electronics, Inc. Television system for displaying main and auxiliary images with color error correction provisions

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60157390A (en) * 1984-01-26 1985-08-17 Sony Corp Digital color television receiving set
JPS6374388A (en) * 1986-09-18 1988-04-04 Sanyo Electric Co Ltd Video signal processing device
JPS63178688A (en) * 1987-01-20 1988-07-22 Hitachi Ltd Picture synthesizer
JPS645190A (en) * 1987-06-26 1989-01-10 Mitsubishi Electric Corp Video signal composing device
JPS6451887A (en) * 1987-08-24 1989-02-28 Sony Corp Video signal processor
JPH01132288A (en) * 1987-11-18 1989-05-24 Matsushita Electric Ind Co Ltd Video signal processor
JPH01238396A (en) * 1988-03-18 1989-09-22 Sanyo Electric Co Ltd Video signal processing circuit

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60157390A (en) * 1984-01-26 1985-08-17 Sony Corp Digital color television receiving set
JPS6374388A (en) * 1986-09-18 1988-04-04 Sanyo Electric Co Ltd Video signal processing device
JPS63178688A (en) * 1987-01-20 1988-07-22 Hitachi Ltd Picture synthesizer
JPS645190A (en) * 1987-06-26 1989-01-10 Mitsubishi Electric Corp Video signal composing device
JPS6451887A (en) * 1987-08-24 1989-02-28 Sony Corp Video signal processor
JPH01132288A (en) * 1987-11-18 1989-05-24 Matsushita Electric Ind Co Ltd Video signal processor
JPH01238396A (en) * 1988-03-18 1989-09-22 Sanyo Electric Co Ltd Video signal processing circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998011733A1 (en) * 1996-09-10 1998-03-19 Thomson Consumer Electronics, Inc. Television system for displaying main and auxiliary images with color error correction provisions
US5907369A (en) * 1996-09-10 1999-05-25 Thomson Consumer Electronics, Inc. Television system for displaying main and auxiliary images with color error correction provisions

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