JPH0282594A - Manufacture of hybrid integrated circuit device - Google Patents
Manufacture of hybrid integrated circuit deviceInfo
- Publication number
- JPH0282594A JPH0282594A JP23550788A JP23550788A JPH0282594A JP H0282594 A JPH0282594 A JP H0282594A JP 23550788 A JP23550788 A JP 23550788A JP 23550788 A JP23550788 A JP 23550788A JP H0282594 A JPH0282594 A JP H0282594A
- Authority
- JP
- Japan
- Prior art keywords
- board
- printed wiring
- integrated circuit
- hybrid integrated
- circuit device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 238000000034 method Methods 0.000 claims abstract description 6
- 239000002985 plastic film Substances 0.000 claims abstract description 6
- 229920006255 plastic film Polymers 0.000 claims abstract description 6
- 239000000758 substrate Substances 0.000 claims description 13
- 238000005520 cutting process Methods 0.000 abstract description 12
- 238000010397 one-hybrid screening Methods 0.000 abstract description 2
- 239000000523 sample Substances 0.000 abstract description 2
- 238000007689 inspection Methods 0.000 description 3
- 238000003825 pressing Methods 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 241001655798 Taku Species 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Landscapes
- Structure Of Printed Boards (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は混成集積回路装置の製造方法に関し、特にプリ
ント配線基板を装置の基板とする混成集積回路装置の製
造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a hybrid integrated circuit device, and more particularly to a method of manufacturing a hybrid integrated circuit device using a printed wiring board as a substrate of the device.
従来、この種の混成集積回路装置の製造方法は、例えば
第2図に示すように、プリント配線基板母体50を金型
にてプレス加工して、電解メツキ線51を切断した基板
状態で装置の組立(素子または部品の搭載)及び検査を
行なった後に更に、装置となるべき部分を母体基板から
金型にてプレス加工して切り離す方法が用いられていた
。Conventionally, in the manufacturing method of this type of hybrid integrated circuit device, for example, as shown in FIG. After assembly (mounting of elements or parts) and inspection, a method has been used in which the portion to become the device is further separated from the base substrate by press working with a mold.
上述した従来の混成集積回路装置の製造方法は、金型な
用いた基板とプレス加工工程を2工程有する。即ち、装
置組立前のメツキ線51の切断工程と装置の組立、検査
後に装置部分を母体のプリント配線基板50から切り離
す工程である。よって金型な2種類準備する必要がある
ため金型の投資金額が大であるという欠点がある。更に
従来の製造方法においては、装置の組立、即ち、素子を
搭載した後に金型によるプレス加工にて装置を母体のプ
リント配線基板から切り離す工程があるため、切断時に
装置に機械的ストレスが加わり、装置を破壊するポテン
シャルがかなり高いという欠点がある。The above-described conventional method for manufacturing a hybrid integrated circuit device includes two steps: a substrate using a mold and a press working step. That is, there is a step of cutting the plating wire 51 before assembling the device, and a step of separating the device portion from the mother printed wiring board 50 after assembling and inspecting the device. Therefore, since it is necessary to prepare two types of molds, there is a drawback that the investment amount for the molds is large. Furthermore, in conventional manufacturing methods, after assembling the device, that is, mounting the device, there is a step of separating the device from the motherboard printed wiring board by press working with a mold, so mechanical stress is applied to the device at the time of cutting. The drawback is that the potential for destroying equipment is quite high.
本発明の混成集積回路装置の製造方法は、装置の基板と
なるべき部分を母体から金型によるプレス加工により切
り離した後、プレスバックして母体の切り出し位置に戻
したプリント配線基板母体と、装置の素子または部品非
搭載面に該当するプリント配線基板母体の面にプラスチ
ックフィルムを貼り付ける工程とを含む。The method for manufacturing a hybrid integrated circuit device of the present invention involves separating a portion to become a substrate of the device from a base body by press working with a mold, and then pressing back the base body and returning it to the cutting position of the base body, and a printed wiring board base body and the device. The step of attaching a plastic film to the surface of the printed wiring board base corresponding to the surface on which no elements or components are mounted is included.
したがって本発明では、母体のプリント配線基板から装
置となるべき部分の基板を切り離す工程は、−工程だけ
であるため、必要なプレス加工用の切断金型は一種だけ
である。更に、金型によるプレス加工切断工程は装置の
組立前即ち、素子または部品の搭載前に行なっている。Therefore, in the present invention, since the step of separating the board of the part to become the device from the mother printed wiring board is only the - step, only one type of cutting die for press working is required. Furthermore, the press cutting process using a mold is performed before the device is assembled, that is, before the elements or parts are mounted.
次に、本発明の実施例について図面を参照して説明する
。Next, embodiments of the present invention will be described with reference to the drawings.
第1図(A)ないしくH)は本発明の一実施例の主要工
程の平面図及び断面図である。第1図(A)は、プリン
ト配線基板母体4の平面図であり、電解メツキ線1,2
を有している。第1図(B)は前記基板母体の断面図で
ある。第1図(C)はプリント配線基板4の切断工程の
断面であり、切断金型のポンチ6により混成集積回路装
置1ケ相当の基板部5を切り離しており、第1図(D)
は、プレスバックポンチ8により、切断した基板5を元
の切断位置に戻している。第1図(E)は、切断及びプ
レスバックの完了したプリント配線基板の素子または部
品の非搭載面にプラスチックフィルム1゜を貼り付けで
ある。この実施例においては基板厚0.25mm、フィ
ルムは厚さ75μmのポリイミドベースフィルムを採用
した。第1図(F)は、半導体素子11を搭載して組立
完了した装置の断面図である。FIGS. 1(A) to 1(H) are a plan view and a sectional view of the main steps of an embodiment of the present invention. FIG. 1(A) is a plan view of the printed wiring board base 4, in which electrolytically plated wires 1, 2
have. FIG. 1(B) is a sectional view of the substrate base. FIG. 1(C) is a cross-sectional view of the printed wiring board 4 in the cutting process, in which the board portion 5 equivalent to one hybrid integrated circuit device is cut off by the punch 6 of the cutting die, and FIG. 1(D)
The cut substrate 5 is returned to its original cutting position by a pressback punch 8. FIG. 1(E) shows that a plastic film of 1° is pasted on the surface of the printed wiring board which has been cut and pressed back, and where no elements or components are mounted. In this example, the substrate thickness was 0.25 mm, and the film was a polyimide base film with a thickness of 75 μm. FIG. 1(F) is a cross-sectional view of the assembled device with the semiconductor element 11 mounted thereon.
第1図(G)は、装置の特性検査工程の断面図であり、
この実施例のプリント配線基板4,5は電解メッキ品で
あるため、母体基板4と装置基板5の電解メツキ配線の
接触をさけるため装置基板を100μm程度突上ポンチ
13によりブツシュアップしてからテスト探針15でプ
ロービングして検査している。第1図(H)は、特性検
査を完了した装置5を押さえ治具17,18で押さえて
装置5を母体配線基板に戻している。FIG. 1(G) is a cross-sectional view of the device characteristic inspection process,
Since the printed wiring boards 4 and 5 of this embodiment are electrolytically plated products, in order to avoid contact between the electrolytically plated wiring on the base board 4 and the device board 5, the device board is punched up by about 100 μm using a punch 13. Inspection is performed by probing with a test probe 15. In FIG. 1(H), the device 5, which has undergone the characteristic test, is held down by the holding jigs 17 and 18, and the device 5 is returned to the mother wiring board.
以上説明したように本発明は、プリント配線基板母体か
ら混成集積回路装置の基板となるべき部分を金型による
プレス加工で切り離した後プレスバックして該基板を母
体基板の切り出し位置に戻し、後、装置の素子または部
品の非搭載面に該当するプリント配線基板母体の面にプ
ラスチックフィルムを貼り付けた状態で、装置の組立及
び検査を行なうことにより、基板のプレス加工金型を一
種類ですませることができる。即ち、金型の投資金額を
少なくできる効果がある。更に基板の切断は装置の組立
前即ち、素子及び部品を搭載する前に一回行なうだけで
あるため切断時に生じる機械的ストレスによる装置の破
壊を防止できるという効果がある。As explained above, the present invention involves separating the portion that will become the substrate of the hybrid integrated circuit device from the printed wiring board mother body by press working with a mold, pressing it back to return the substrate to the cutting position of the mother substrate, and then By assembling and inspecting the device with a plastic film affixed to the surface of the printed wiring board base corresponding to the surface on which no device elements or components are mounted, only one type of press mold is required for the board. be able to. That is, there is an effect that the investment amount for the mold can be reduced. Furthermore, since the substrate is only cut once before assembling the device, that is, before mounting elements and components, it is possible to prevent destruction of the device due to mechanical stress generated during cutting.
第1図(A)ないしくH)は本発明の一実施例を工程順
に示す平面ないしは縦断面図、第2図は従来例の平面図
である。
代理人 弁理士 内 原 晋
(A)
CH)
オフ図
CD)
(F)
拓1
図
第2図1(A) to 1(H) are plan views or longitudinal sectional views showing an embodiment of the present invention in the order of steps, and FIG. 2 is a plan view of a conventional example. Agent Patent Attorney Susumu Uchihara (A) CH) Off-line CD) (F) Taku 1 Figure 2
Claims (1)
方法において、パターン形成加工を行なったプリント配
線基板の母体から装置の基板となるべき部分を金型にて
プレス加工で切り出し、更にプレスバックして、母体の
切り出し位置に戻した後、装置の素子または部品の非搭
載面に該当するプリント配線基板母体の面にプラスチッ
クフィルムを貼り付けた状態で、装置の組立、検査を行
なうことを特徴とする混成集積回路装置の製造方法。In a method of manufacturing a hybrid integrated circuit device using a printed wiring board as a substrate, the part that will become the device substrate is cut out from the patterned printed wiring board base using a mold, and then pressed back. After returning the mother body to the cut-out position, the device is assembled and inspected while a plastic film is pasted on the surface of the printed wiring board mother body corresponding to the surface on which no device elements or parts are mounted. A method for manufacturing a hybrid integrated circuit device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23550788A JPH0282594A (en) | 1988-09-19 | 1988-09-19 | Manufacture of hybrid integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23550788A JPH0282594A (en) | 1988-09-19 | 1988-09-19 | Manufacture of hybrid integrated circuit device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0282594A true JPH0282594A (en) | 1990-03-23 |
Family
ID=16987029
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP23550788A Pending JPH0282594A (en) | 1988-09-19 | 1988-09-19 | Manufacture of hybrid integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0282594A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04106959A (en) * | 1990-08-27 | 1992-04-08 | Kokusai Electric Co Ltd | Chip carrier substrate fitted with multiplane |
-
1988
- 1988-09-19 JP JP23550788A patent/JPH0282594A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04106959A (en) * | 1990-08-27 | 1992-04-08 | Kokusai Electric Co Ltd | Chip carrier substrate fitted with multiplane |
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