JPH0282072U - - Google Patents
Info
- Publication number
- JPH0282072U JPH0282072U JP16190988U JP16190988U JPH0282072U JP H0282072 U JPH0282072 U JP H0282072U JP 16190988 U JP16190988 U JP 16190988U JP 16190988 U JP16190988 U JP 16190988U JP H0282072 U JPH0282072 U JP H0282072U
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- printed circuit
- multilayer printed
- insertion recess
- electrical contact
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000003780 insertion Methods 0.000 claims description 3
- 230000037431 insertion Effects 0.000 claims description 3
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
Description
第１図は本考案の一実施例を示す多層プリント
基板の要部斜視図、第２図は本考案の多層プリン
ト基板に適用するコネクタの断面図、第３図はこ
の多層プリント基板をコネクタに挿入した場合の
断面図、第４図は本考案の多層プリント基板の変
形例を示す斜視図、第５図は本考案の多層プリン
ト基板の別の変形例を示す断面図、第６図は従来
の多層プリント基板にコネクタを固定した場合を
示す斜視図である。
１〜６……電気接点、７，８……挿入凹部、１
０……多層プリント基板、１０１〜１０５……第
１〜第５の基板、２０……コネクタ。
Figure 1 is a perspective view of essential parts of a multilayer printed circuit board showing an embodiment of the present invention, Figure 2 is a sectional view of a connector applied to the multilayer printed circuit board of the present invention, and Figure 3 is a connector for this multilayer printed circuit board. 4 is a perspective view showing a modification of the multilayer printed circuit board of the present invention, FIG. 5 is a sectional view of another modification of the multilayer printed circuit board of the present invention, and FIG. 6 is a conventional one. FIG. 3 is a perspective view showing a case where the connector is fixed to the multilayer printed circuit board of FIG. 1 to 6... Electrical contact, 7, 8... Insertion recess, 1
0...Multilayer printed circuit board, 101 to 105 ...First to fifth boards, 20...Connector.
Claims (1)
と、 この挿入用凹部壁面に設けられた電気接点 とを具備したことを特徴とする多層プリント基
板。[Scope of Claim for Utility Model Registration] A multilayer printed circuit board characterized by having an insertion recess provided from a side face toward the back, and an electrical contact provided on a wall surface of the insertion recess.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16190988U JPH0282072U (en) | 1988-12-15 | 1988-12-15 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16190988U JPH0282072U (en) | 1988-12-15 | 1988-12-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0282072U true JPH0282072U (en) | 1990-06-25 |
Family
ID=31445260
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16190988U Pending JPH0282072U (en) | 1988-12-15 | 1988-12-15 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0282072U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005051169A (en) * | 2003-07-31 | 2005-02-24 | Denso Corp | Multilayer substrate with connector |
-
1988
- 1988-12-15 JP JP16190988U patent/JPH0282072U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005051169A (en) * | 2003-07-31 | 2005-02-24 | Denso Corp | Multilayer substrate with connector |
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