JPH028077U - - Google Patents
Info
- Publication number
- JPH028077U JPH028077U JP8372288U JP8372288U JPH028077U JP H028077 U JPH028077 U JP H028077U JP 8372288 U JP8372288 U JP 8372288U JP 8372288 U JP8372288 U JP 8372288U JP H028077 U JPH028077 U JP H028077U
- Authority
- JP
- Japan
- Prior art keywords
- agent
- hybrid
- electronic components
- printed circuit
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011248 coating agent Substances 0.000 claims description 8
- 239000000872 buffer Substances 0.000 claims description 7
- 239000003795 chemical substances by application Substances 0.000 claims description 5
- 239000006087 Silane Coupling Agent Substances 0.000 claims description 3
- 230000001681 protective effect Effects 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 6
- 239000000919 ceramic Substances 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 239000006172 buffering agent Substances 0.000 description 1
- 239000007822 coupling agent Substances 0.000 description 1
Description
第1図は本考案によるハイブリツドICの実施
例を示す構成図、第2図は従来のハイブリツドI
Cの実施例を示す構成図である。
1……アルミナ基板、2……プリント配線、3
……ガラス被膜、4……電子部品、5……バツフ
アコート剤、6……オーバーコート剤、7……シ
ランカツプリング剤。
Figure 1 is a block diagram showing an embodiment of a hybrid IC according to the present invention, and Figure 2 is a diagram showing a conventional hybrid IC.
It is a block diagram which shows the Example of C. 1...Alumina board, 2...Printed wiring, 3
...Glass coating, 4...Electronic parts, 5...Buffer coating agent, 6...Overcoating agent, 7...Silan coupling agent.
補正 昭63.9.5
考案の名称を次のように補正する。
考案の名称 ハイブリツドIC
実用新案登録請求の範囲、図面の簡単な説明を
次のように補正する。Amendment September 5, 1983 The name of the invention is amended as follows. Title of the invention: Hybrid IC Utility model registration Claims and brief description of the drawings are amended as follows.
【実用新案登録請求の範囲】
印刷配線を設けたセラミツクス基板上に電子部
品を装着し、セラミツクス基板の装着面及び電子
部品等に緩衝剤としてのバツフアコート剤を介し
て保護被膜としてのオーバーコート剤を塗布した
ハイブリツドICにおいて、
セラミツクス基板の装着面及び電子部品等とバ
ツフアコート剤との間にぬれ性を改善するシラン
カツプリング剤を介在させたことを特徴とするハ
イブリツドIC。[Claim for Utility Model Registration] Electronic components are mounted on a ceramic substrate provided with printed wiring, and an overcoat agent as a protective film is applied to the mounting surface of the ceramic substrate and the electronic components via a buffer coating agent as a buffering agent. A hybrid IC characterized in that a silane coupling agent for improving wettability is interposed between a mounting surface of a ceramic substrate, an electronic component, etc., and a buffer coating agent in the coated hybrid IC.
【図面の簡単な説明】
第1図は本考案によるハイブリツドICの実施
例を示す構成図、第2図は従来のハイブリツドI
Cの実施例を示す構成図である。
1……アルミナセラミツクス基板、2……厚膜
印刷回路、3……ガラス被膜、4……電子部品、
5……バツフアコート剤、6……オーバーコート
剤、7……シランカツプリング剤。[Brief Description of the Drawings] Fig. 1 is a block diagram showing an embodiment of a hybrid IC according to the present invention, and Fig. 2 is a block diagram showing a conventional hybrid IC.
It is a block diagram which shows the Example of C. 1...Alumina ceramics substrate, 2...Thick film printed circuit, 3...Glass coating, 4...Electronic component,
5... Buffer coating agent, 6... Overcoat agent, 7... Silane coupling agent.
Claims (1)
装着し、プリント基板の装着面及び電子部品等に
緩衝剤としてのバツフアコート剤を介して保護被
膜としてのオーバーコート剤を塗布したハイブリ
ツドICにおいて、 プリント基板の装着面及び電子部品等とバツフ
アコート剤との間にぬれ性を改善するシランカツ
プリング剤を介在させたことを特徴とするハイブ
リツドIC。[Claim for Utility Model Registration] Electronic components are mounted on a printed circuit board on which printed wiring is provided, and an overcoat agent is applied as a protective film to the mounting surface of the printed circuit board and the electronic components through a buffer coating agent as a buffer agent. A hybrid IC characterized in that a silane coupling agent for improving wettability is interposed between a mounting surface of a printed circuit board, electronic components, etc., and a buffer coating agent in the coated hybrid IC.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8372288U JPH028077U (en) | 1988-06-24 | 1988-06-24 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8372288U JPH028077U (en) | 1988-06-24 | 1988-06-24 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH028077U true JPH028077U (en) | 1990-01-18 |
Family
ID=31308433
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8372288U Pending JPH028077U (en) | 1988-06-24 | 1988-06-24 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH028077U (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS522266A (en) * | 1975-06-24 | 1977-01-08 | Hitachi Ltd | Mos push-pull circuit |
JPS6027441B2 (en) * | 1977-01-21 | 1985-06-28 | 日本電気株式会社 | amplitude equalizer |
JPS61113242A (en) * | 1984-11-07 | 1986-05-31 | Mitsubishi Electric Corp | Sealing process of electronic part |
-
1988
- 1988-06-24 JP JP8372288U patent/JPH028077U/ja active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS522266A (en) * | 1975-06-24 | 1977-01-08 | Hitachi Ltd | Mos push-pull circuit |
JPS6027441B2 (en) * | 1977-01-21 | 1985-06-28 | 日本電気株式会社 | amplitude equalizer |
JPS61113242A (en) * | 1984-11-07 | 1986-05-31 | Mitsubishi Electric Corp | Sealing process of electronic part |
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