JPH0278243A - Continuous processing system for semiconductor substrate - Google Patents
Continuous processing system for semiconductor substrateInfo
- Publication number
- JPH0278243A JPH0278243A JP63230578A JP23057888A JPH0278243A JP H0278243 A JPH0278243 A JP H0278243A JP 63230578 A JP63230578 A JP 63230578A JP 23057888 A JP23057888 A JP 23057888A JP H0278243 A JPH0278243 A JP H0278243A
- Authority
- JP
- Japan
- Prior art keywords
- product
- section
- processing
- wafer
- product processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims description 18
- 239000000758 substrate Substances 0.000 title claims description 14
- 238000000034 method Methods 0.000 claims abstract description 47
- 230000007246 mechanism Effects 0.000 claims abstract description 23
- 238000007689 inspection Methods 0.000 claims abstract description 19
- 230000007723 transport mechanism Effects 0.000 claims description 38
- 239000000872 buffer Substances 0.000 claims description 10
- 238000010586 diagram Methods 0.000 abstract description 14
- 238000004519 manufacturing process Methods 0.000 abstract description 8
- 230000002950 deficient Effects 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 36
- 238000010894 electron beam technology Methods 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- 239000000463 material Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000003491 array Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000010410 layer Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000003908 quality control method Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 229920003002 synthetic resin Polymers 0.000 description 1
- 239000000057 synthetic resin Substances 0.000 description 1
Landscapes
- Multi-Process Working Machines And Systems (AREA)
- General Factory Administration (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
【発明の詳細な説明】
［概要］
本発明は搬送機構とそれに結合する加工部とにより効率
良く処理する半導体基板の連続処理システムに関し、
連続処理システムの効率を向上させるため同一工程を複
数の部門で並列的に行わせて、搬送装置と結合するなど
の構成を採用し、少量多品種生産に適したシステムを提
供することを目的とし、製品プロセス加工部の製品を搬
送機構により搬送する半導体基板の連続処理システムに
おいて、複数の製品プロセス加工部の更に多数組を具備
しそれぞれインタフェース部を介して搬送機構と結合さ
れ、且つ該搬送機構と結合されるストッカと検査装置と
、該搬送機構の搬送を制御する搬送制御部とを具備し、
該搬送制御部において予め定義された製品の工程経路に
基づき、或る製品プロセス加工部で加工したものが検査
装置／ストッカを経由して再び何れかの製品プロセス加
工部での加工を可能とするように搬送機構により搬送さ
せることで構成する。[Detailed Description of the Invention] [Summary] The present invention relates to a continuous processing system for semiconductor substrates that efficiently processes semiconductor substrates using a transport mechanism and a processing section connected thereto. The aim is to provide a system suitable for low-volume, high-mix production by using a configuration in which semiconductor substrates are processed in parallel and combined with a transport device, and products in the product processing department are transported by a transport mechanism. A continuous processing system comprising a plurality of product processing units, each of which is connected to a transport mechanism via an interface unit, a stocker and an inspection device connected to the transport mechanism, and a transport system of the transport mechanism. and a conveyance control unit that controls the
Based on the product process route defined in advance in the transport control section, a product processed in a certain product processing section can be processed again in any product processing section via an inspection device/stocker. It is constructed by transporting the image using a transport mechanism as shown in FIG.
［産業上の利用分野］
本発明は搬送機構とそれに結合する加工部とにより効率
良く処理する半導体基板の連続処理システムに関する。[Industrial Field of Application] The present invention relates to a continuous processing system for semiconductor substrates that efficiently processes semiconductor substrates using a transport mechanism and a processing section coupled thereto.
従来、コンベア式の搬送機構により少量多品種の半導体
製品を生産するとき、製造工程毎に割当てた装置である
ため、小さな故障により停止することがあると、全生産
ラインを停止させる必要があり、誠に非能率であった。Conventionally, when producing a wide variety of semiconductor products in small quantities using a conveyor-type transport mechanism, the equipment was assigned to each manufacturing process, so if a small failure caused a stoppage, the entire production line had to be stopped. It was truly inefficient.
そのため搬送装置を使用しながら出来るだけ能率良く半
導体製品を生、 産する処理システムを開発すること
が要望された。Therefore, there was a need to develop a processing system that could produce and produce semiconductor products as efficiently as possible while using transport equipment.
［従来の技術］
半導体製品は従来のダイナミック・ランダムアクセス型
メモリの場合におけるような汎用品の大量生産からＡＳ
ＩＣ（特殊応用型集積回路）のゲートアレイなどユーザ
指向の少量多品種生産になりつつある。ＡＳＩＣを生産
する上で最も重要な点は、ユーザから要求された製品を
出来るだけ短時間で納入することである。[Conventional technology] Semiconductor products have changed from mass production of general-purpose products, such as in the case of conventional dynamic random access memory, to AS
User-oriented low-volume, high-mix production of IC (Special Application Integrated Circuit) gate arrays and the like is becoming more common. The most important point in producing ASICs is to deliver products requested by users in the shortest possible time.
従来技術の例として特公昭５９−３１２１１号公報記載
の処理装置を挙げることができる。第７図は同公報に記
載されている装置の概略平面図を示す。第７図において
、ＩＡ〜ＩＦは各独立した処理部門２は左右往復動作を
行い、途中で製品を授受するための中央輸送装置を示す
。半導体ウェハは処理部門ＩＡの「入力」と示した所か
らローダ３により、最初のセクタとしての浄化、酸化物
の成長、ホトレジスト膜の付着などを行う。処理部門Ｉ
Ａは初期酸化セクタという。ここが終わると、ＩＢと示
すソース及びドレイン付着セクタへ中央輸送装置２によ
り移動する。ＩＣはゲート酸化セクタＩＤはレジスト露
光セクタ、ＩＥは金属化セクタＩＦは焼結セクタという
。そして製品はＩＦのアンロード装置１０４から出力さ
れる。As an example of the prior art, a processing apparatus described in Japanese Patent Publication No. 59-31211 can be mentioned. FIG. 7 shows a schematic plan view of the device described in the publication. In FIG. 7, IA to IF indicate a central transport device in which the independent processing departments 2 perform left and right reciprocating operations and deliver and receive products along the way. The semiconductor wafer is processed by a loader 3 from a location indicated as "input" of the processing department IA, where cleaning as a first sector, growth of an oxide, deposition of a photoresist film, etc. are performed. Processing department I
A is called an initial oxidation sector. Once this is completed, the central transport device 2 moves to the source and drain attachment sector designated IB. IC is called a gate oxidation sector, ID is called a resist exposure sector, IE is called a metallized sector, and IF is called a sintered sector. The product is then output from the IF unloading device 104.
［発明が解決しようとする課題〕
第７図においては、各工程部門が個別に搬送機構と結合
しているから工程部門の一つに若し故障が発生したのみ
で、全工程部門の処理が出来ずに工場が全停止となる。[Problem to be solved by the invention] In Fig. 7, each process department is individually connected to a conveyance mechanism, so even if a failure occurs in one of the process departments, processing in all process departments can be completed. Unable to do so, the factory was completely shut down.
また各工程の単位処理に最も時間を要するもの（最も能
率の悪いもの）を基準として、各工程についての要処理
時間を定めるから、工場全体として見るとき極めて能率
が悪く、 なった。In addition, since the required processing time for each process was determined based on the process that required the longest unit processing time (the least efficient process), the efficiency of the factory as a whole was extremely low.
本発明の目的は前述の欠点を改善し、連続処理システム
の効率を向上させるため、同一工程を複数の部門で並列
的に行わせて搬送機構と結合するなどの構成を採用し、
少量多品種生産に適したシステムを提供することにある
。The purpose of the present invention is to improve the above-mentioned drawbacks and improve the efficiency of a continuous processing system by adopting a configuration in which the same process is performed in parallel in multiple departments and combined with a conveyance mechanism,
Our goal is to provide a system suitable for low-volume, high-mix production.
［課題を解決するための手段］
第１図は本発明の原理構成を示す図である。第、 １
図において、２は搬送機構、４−１１．４−１２・・・
・、４−２１、 ・・・・、４−３１・・・・は製品
プロセス加工部、５−１１−．５−２１−はインタフェ
ース部で各製品プロセス加工部と対応するもの、６はス
トッカ、７は検査装置、８は搬送制御部を示す。[Means for Solving the Problems] FIG. 1 is a diagram showing the basic configuration of the present invention. No. 1
In the figure, 2 is a transport mechanism, 4-11, 4-12...
・, 4-21, ..., 4-31... are the product process processing department, 5-11-. Reference numeral 5-21- indicates an interface section corresponding to each product processing section, 6 a stocker, 7 an inspection device, and 8 a transport control section.
製品プロセス加工部４の製品を搬送機構２により搬送す
る半導体基板の連続処理システムにおいて、本発明は下
記の構成としている。即ち、複数の同種の製品プロセス
加工部４−１１．４−１２ −の複数組４−２１−、４
〜３１−を具備し、それぞれインタフェース部５−１１
．５−２１− を介して搬送機構２と結合され、且つ
該搬送機構２と結合されるストッカ６と検査装置７、該
搬送機構２の搬送を制御する搬送制御部８とを具備し、
該搬送制御部８において予め定義された製品の工程経路
に基づき、或る製品プロセス加工部４で加工したものが
検査装置７／ストツカ６を経由して再び何れかの製品プ
ロセス加工部４での加工を可能とするように搬送機構２
により搬送させることである。The present invention has the following configuration in a continuous processing system for semiconductor substrates in which the products of the product processing section 4 are transported by the transport mechanism 2. That is, a plurality of sets 4-21-, 4 of a plurality of similar product processing units 4-11, 4-12-
~31-, each having an interface section 5-11.
．． 5-21-, and includes a stocker 6 and an inspection device 7, which are connected to the transport mechanism 2 via the transport mechanism 2, and a transport control section 8 that controls transport of the transport mechanism 2,
Based on the product process route defined in advance in the transport control section 8, a product processed in a certain product processing section 4 is transferred to another product processing section 4 via the inspection device 7/stocker 6. Transport mechanism 2 to enable processing
The method is to convey the material by means of transportation.
［作用］
製品プロセス加工部４−１１．４−１２− と、４−２
１ 、４−２２゜と４−３１．４−３２・・・−はそれ
ぞれ同種の製品プロセス加工部を複数設けていることを
示し、それらは個別にインタフェース部を介して搬送機
構２と結合されている。図示しないウェーハは固有の番
号を付されて、搬送制御部８において所定の処理工程を
定義されてから、搬送機構２により製品プロセス加工部
４の或るものに移され当初の例えばアルミニウム・パタ
ーンニング加工を行う。次に搬送機構２により搬送され
て検査装置７に移動する。[Function] Product process processing department 4-11.4-12- and 4-2
1, 4-22° and 4-31, 4-32, . ing. Each wafer (not shown) is given a unique number, and after a predetermined processing step is defined in the transfer control section 8, the wafer is transferred to a certain part of the product processing section 4 by the transfer mechanism 2, and is then subjected to initial processing such as aluminum patterning. Perform processing. Next, it is transported by the transport mechanism 2 and moved to the inspection device 7.
ここで所定の検査がなされ良品のときは製品プロセス加
工部４へ行くことを予定して搬送機構２に移載される。Here, a predetermined inspection is performed, and if the product is good, it is transferred to the transport mechanism 2 with the intention of going to the product processing section 4.
ストッカ６においては製品加工プロセス加工部の状態に
より一時的に収納されたり、次の工程となる他種の製品
プロセス加工部へ搬送されることが搬送制御部８により
指示される。この時、次の製品プロセス加工部の何れに
搬送されるかについては、加工部における制御装置が適
宜処理する。そしてこのプロセス加工部における処理が
終了したときは、必要に応じて検査装置７を介して更に
次の加工部に到るように搬送機構により搬送されること
を繰り返す。このようにして搬送機構２を有効に使用し
てプロセス加工が能率的に行われる。In the stocker 6, depending on the state of the product processing section, the transport control section 8 instructs that the product be temporarily stored or transported to a different type of product processing section for the next process. At this time, the control device in the processing section appropriately processes which of the next product processing sections the product should be transported to. When the processing in this processing section is completed, the sheet is repeatedly transported by the transport mechanism to the next processing section via the inspection device 7 as necessary. In this way, the conveyance mechanism 2 is effectively used to efficiently carry out process processing.
［実施例コ
第２図は本発明の実施例として、製品プロセス加工部４
と検査装置７が同種のものを２〜３組具備していること
を示す図で、第１電子ビーム露光部４−１１、第２電子
ビーム露光部４−１２などを示している。各プロセス加
工部は２つのブロックで１組を構成しているが、３個以
上を並列的に設げることもある。搬送機構２として環状
のものを示していあるが、これは往復動作するものでも
良く、例えば台車にウェーハを載せて搬送させる。第２
図に示す構成では、検査装置７が３つの装置を並列的に
具備して、各検査装置と搬送機構２との間には後述する
インタフェース部と同様なインタフェース部７−１１．
７−１２．７−１３を設けてお（ことが望ましい。[Embodiment Figure 2 shows a product processing section 4 as an embodiment of the present invention.
This is a diagram showing that the inspection apparatus 7 is equipped with two to three sets of the same type, and shows a first electron beam exposure section 4-11, a second electron beam exposure section 4-12, etc. Each process processing section consists of one set of two blocks, but three or more blocks may be provided in parallel. Although a ring-shaped transport mechanism 2 is shown, it may be one that moves back and forth, for example, a wafer is placed on a trolley and transported. Second
In the configuration shown in the figure, the inspection device 7 includes three devices in parallel, and between each inspection device and the transport mechanism 2 there are interface sections 7-11.
7-12.7-13 (preferably).
ウェーハは当初において処理される工程経路を個別に後
述するように定義付けられている。そのため検査装置に
より検査が終了し、次の何の種類のプロセス加工部へ行
くかについては、工程が予た定義されている。そして複
数個のプロセス加工部の何れに入るかについては加工部
インタフェースにおけるバッファの一時的収納量の少な
い方、または加工部の稼動中の方へ搬送されて行く。The wafers are initially defined by the process paths through which they are processed, as will be described separately below. Therefore, after the inspection is completed by the inspection device, the process is predefined as to what type of processing section to go to next. As for which one of the plurality of process processing sections is to be entered, it is transported to the one with the smaller amount of buffer temporarily stored at the processing section interface, or to the one in which the processing section is in operation.
第３図は工程経路の定義を説明する図である。FIG. 3 is a diagram explaining the definition of a process route.
Ａ工程が電子ビームによる工程を示し、Ｂ工程が光線に
よる工程を示している。即ち、アルミニウム膜について
層間膜を介して二つの層にわたり、各層間のコンタクト
ホールを作る工程として、電子ビームと光線による別々
の工程を辿るときであっても、その途中のエツチング工
程を行うプロセス加工部に到るときは共用して行うこと
が示されている。このように搬送制御部８に対し製品の
工程経路を定義するとき、途中における共用或いは製品
種類に応じて工程中のスキップさせることなどに充分に
注意しながら行う必要がある。Process A indicates a process using an electron beam, and process B indicates a process using a light beam. In other words, even when separate processes using electron beams and light beams are used to create contact holes between two layers of an aluminum film via an interlayer film, an etching process is performed in the middle of the process. It is shown that when reaching the part, it is done in common. When defining the product process route for the transport control unit 8 in this manner, it is necessary to do so while paying sufficient attention to sharing the route along the way or skipping the process depending on the type of product.
次にインタフェース部５について具体例を第４図に示す
。第４図において、２は搬送機構、４−１１は製品プロ
セス加工部、５−１１１．５−１１２はインタフェース
部、１１−１．１１−２は移載機構で、搬送機構２から
製品プロセス加工部における小規模搬送機構へ移載させ
るもので、例えばエレベータとへルトコンヘアを使用す
る。１２−１．１２−２はウェーハ識別装置で例えばバ
ーコード読取器を使用する。１３−１゜１３−２はバッ
ファでウェーハを載置する棚を使用して一時的にウェー
ハを保管する。搬送機構２により図示しないウェーハ搬
送台に載ったウェーハが指定された製品プロセス加工部
のインタフェース部５−１１１に達したとき、搬送機構
２とプロセス加工部との位置的レベル差を解消するよう
に、後述するエレベータが動作する。次にバーコード読
取器１２−１でウェーハを識別し、このプロセス加工部
で処理すべき製品か否かを判断する。処理すべきウェー
バであるときは必要に応じバッファ１３−１に入れたり
、直ぐ処理を始める。バッファ１３−１．１３−２を設
けたため製品プロセス加工部における処理タクトを各加
工部で厳密に揃える必要性がない。またバッチ処理を行
うことが出来る。この製品プロセス加工部において所定
の処理が終了したウェーハはイン−タフエース部５−１
１２に搬送され、インタフェース部５−１１１の場合と
同様な動作により搬送機構２に移り、次のプロセス加工
部へ搬送される。Next, a specific example of the interface section 5 is shown in FIG. In Fig. 4, 2 is a transport mechanism, 4-11 is a product processing section, 5-111.5-112 is an interface section, and 11-1. For example, an elevator and a conveyor belt are used to transfer the material to a small-scale transport mechanism in the department. 12-1.12-2 is a wafer identification device that uses, for example, a bar code reader. 13-1 and 13-2 are buffers for temporarily storing wafers using shelves on which wafers are placed. When the wafer placed on a wafer carrier (not shown) reaches the interface section 5-111 of the designated product processing section by the transfer mechanism 2, the positional level difference between the transfer mechanism 2 and the process section is eliminated. , the elevator, which will be described later, operates. Next, the wafer is identified by the barcode reader 12-1, and it is determined whether the wafer is a product to be processed in this processing section. When the Weber is to be processed, it is placed in the buffer 13-1 as necessary, or processing is started immediately. Since the buffers 13-1 and 13-2 are provided, there is no need to strictly equalize the processing tact in each product processing section. It is also possible to perform batch processing. The wafers that have undergone predetermined processing in this product processing section are placed in the interface section 5-1.
12, and then transferred to the transport mechanism 2 through the same operation as in the case of the interface section 5-111, and then transported to the next processing section.
第４図におけるプロセス加工部制御装置ｌＯは以上の動
作を統括制御する。また制御装置１４−１．１４−２は
各インタフェース部５−１１１．５−１１２の動作を制
御する。更に制御装置１５は製品プロセス加工部４−１
１における動作を制御する。The process processing unit control device IO in FIG. 4 centrally controls the above operations. The control device 14-1.14-2 also controls the operation of each interface section 5-111.5-112. Further, the control device 15 is connected to the product process processing section 4-1.
1.
次に第５図は第４図に示すインタフェース部５−１１１
内の具体的構成を示す図である。第５図において１２−
１はバーコードリーダでウェーハ識別装置の例を示す。Next, FIG. 5 shows the interface section 5-111 shown in FIG.
FIG. In Figure 5, 12-
1 shows an example of a wafer identification device using a barcode reader.
１６はウェーハ台、１７−１はエレベータ、１７−２は
エレベータガイドを示す。例えば図の上方に設けられて
いる搬送機構２から所定のウェーハをエレベータガイド
１７−２によりガイドされたエレベータ１７−１がウェ
ーハ台１６と示すようにインタフェース台１９と同じレ
ベルまで降下する。次にハンドラ１８と示すロボット機
構によりウェーハ台１６からウェーハを取り出し、ウェ
ーハの向きを識別し必要な回転を行いバーコードリーダ
１２−１へ送る。16 is a wafer stand, 17-1 is an elevator, and 17-2 is an elevator guide. For example, an elevator 17-1 carries a predetermined wafer from a transport mechanism 2 provided at the upper side of the figure, guided by an elevator guide 17-2, and descends to the same level as the interface table 19, as shown by the wafer table 16. Next, a wafer is taken out from the wafer table 16 by a robot mechanism called a handler 18, the orientation of the wafer is identified, the wafer is rotated as necessary, and the wafer is sent to the barcode reader 12-1.
このときアルミニウムを使用して製作したバーコードが
ウェーハのオリフラ側に予め設けられているから、バー
コードリーダ１２−１において赤外線をバーコードに照
射しその反射光を例えばＣＯＤにより読取る。バーコー
ドにより読取られたデータはウェーハの戸籍に相当する
から、例えば図示しないプロセス加工部制御装置ＩＯに
より当該加工部において加工処理すべきウェーハである
か否かを判断できる。処理すべきウェーハであればそれ
が直く処理すべきものか・・・旦バッファに収納されて
一時待機するかがハンドラ１８に通知されて所望の動作
を行う。図においてインライン装置へと示す部分を介し
てウェーハは白矢印で示す方向に意図をさせられ、図示
しない処理部へ行く。At this time, since a barcode manufactured using aluminum is previously provided on the orientation flat side of the wafer, the barcode is irradiated with infrared rays in the barcode reader 12-1 and the reflected light is read by, for example, COD. Since the data read by the barcode corresponds to the family register of the wafer, it can be determined whether or not the wafer is to be processed in the processing section, for example, by the process processing section control device IO (not shown). If the wafer is to be processed, the handler 18 is notified as to whether the wafer should be processed immediately or temporarily stored in a buffer and placed on standby, and then performs the desired operation. The wafer is directed in the direction indicated by the white arrow through the section shown to the in-line device in the figure, and goes to a processing section (not shown).
バッファ１３−１は複数枚のウェーハを載置する合成樹
脂製のもので多数の棚を有している。そしてインタフェ
ース台１９上に置かれ、ハンドラ１８側からウェーハを
出し入れする。ウェーハの出し入れは搬送機構２からの
搬送処理が非稼動のときに製品ブーセス加工部への製品
の供給を行う。そしてこの第５図と同様なものが製品プ
ロセス加工部の加工済み製品出口に存在するから、その
ものは加工部からの製品を取り出して搬送機構２へ移動
するように処理される。The buffer 13-1 is made of synthetic resin and has many shelves on which a plurality of wafers are placed. The wafer is then placed on the interface table 19, and the wafer is taken in and taken out from the handler 18 side. Wafers are loaded and unloaded to the product processing section when the transport process from the transport mechanism 2 is not in operation. Since something similar to that shown in FIG. 5 exists at the processed product outlet of the product processing section, it is processed so that the product is taken out from the processing section and transferred to the transport mechanism 2.
若し、インタフェース部５−１１における搬送機構２か
らの移動機構が障害のため移動不能となったとき、作業
者がバッファ１３のみをインタフェース台から取り上げ
て、所定のプロセス加工部へ運び出すことを可能として
いる。そのため搬送機構との間の移動機構に軽微な障害
が発生することが起こっても全体の処理動作がダウンす
ることが防止できる。If the moving mechanism from the transport mechanism 2 in the interface section 5-11 becomes unable to move due to a failure, the operator can pick up only the buffer 13 from the interface table and carry it to a predetermined processing section. It is said that Therefore, even if a slight failure occurs in the movement mechanism between the transfer mechanism and the transport mechanism, it is possible to prevent the entire processing operation from going down.
第６図は製品プロセス加工部などで使用できる小規模搬
送機構についての構成を示す図である。FIG. 6 is a diagram showing the configuration of a small-scale conveyance mechanism that can be used in a product processing section or the like.
第６図において、２４は小規模搬送機構、例えばベルト
コンベアを、２５−１．２５−２・・・は各処理装置を
示す。２１と示す移載機構により搬送機構２により移動
されて来たウェーハを、小規模搬送機構２４に移載する
。そして処理装置２５−１などを適宜使用して処理する
。In FIG. 6, 24 indicates a small-scale conveyance mechanism, such as a belt conveyor, and 25-1, 25-2, . . . indicate processing devices. The wafer that has been moved by the transport mechanism 2 is transferred to the small-scale transport mechanism 24 by a transfer mechanism 21 . Then, processing is performed using the processing device 25-1 or the like as appropriate.
なお、第１図のストッカ６は搬送機構２、検査装置７の
処理時間により必要に応じ一時的に収納する構成として
いる。ストッカ６に収納したときそのウェーハについて
搬送機構２の搬送制御部８に通知して次の指示を待つ。Note that the stocker 6 shown in FIG. 1 is configured to temporarily store items as necessary depending on the processing time of the transport mechanism 2 and the inspection device 7. When the wafer is stored in the stocker 6, the transfer controller 8 of the transfer mechanism 2 is notified of the wafer and waits for the next instruction.
［発明の効果］
このようにして本発明によると、同種の製品プロセス加
工部を複数設けたため、半導体製品の品種が種々異なっ
ていても容易に対応して能率良く生産が出来る。多数の
処理を異なる処理時間により順次処理して行くことにつ
いても適宜の方の加工部を使用して加工処理できるから
である。またハツチ処理によって生産することが出来、
製品プロセス加工部の加工済みウェー八をその都度検査
しているから、各加工部対応の品質管理を行うことが可
能である。更に搬送機構に製品ストッカを結合させ、同
種の製品プロセス加工部を複数具備しているため、障害
発生に対し臨機応変に対処できて搬送効率が上がる効果
を有する。またプロセス加工部と搬送機構との間のイン
タフェース部にバッファを設けるときは、ストッカとの
強調動作を行うことが出来て、加工済み製品の流れが極
めて滑らかとなり、製品の仕上がり時間が短縮化される
。[Effects of the Invention] As described above, according to the present invention, since a plurality of processing units for the same type of product are provided, even if the types of semiconductor products are different, it can be easily handled and efficiently produced. This is because even when a large number of processes are sequentially performed using different processing times, the processing can be performed using an appropriate processing section. It can also be produced by hatch processing,
Since processed wafers in the product process processing department are inspected each time, it is possible to perform quality control for each processing department. Further, since a product stocker is coupled to the transport mechanism and a plurality of processing sections for the same type of products are provided, it is possible to flexibly deal with the occurrence of failures, thereby increasing transport efficiency. In addition, when a buffer is provided at the interface between the process processing section and the transport mechanism, it is possible to perform emphasized operation with the stocker, making the flow of processed products extremely smooth and reducing the time required to complete the product. Ru.
第１図は本発明の原理構成を示す図、
第２図は本発明の実施例として製品プロセス加工部など
の構成を示す図、
第３図は工程の定義を説明するための図、第４図はイン
タフェース部の構成を示すブロック図、
第５図はインタフェース部の具体的構成を示す図、第６
図は小規模搬送機構を例示する図、第７図は従来の半琢
体基板の連続処理システムの構成を示す図である。
２・・・搬送機構
４−１１．４−１２ ・・・製品プロセス加工部５−
１１．５−１２・・・・インタフェース部６−スドソカ
７・・・検査装置
８・・・−搬送制御部
特許出願人 富士通株式会社
代 理 人 弁理士 鈴木栄祐
２垂焚汽孤
ノ
本兄叩の原理禍へ習
第１図
芦たｖｒｊＬｒＩ構成図
第２図
Ａ工３８−８工脛
第３図
ゝ−５−１１２
第４図Fig. 1 is a diagram showing the principle configuration of the present invention, Fig. 2 is a diagram showing the configuration of a product process processing section, etc. as an embodiment of the invention, Fig. 3 is a diagram for explaining the definition of a process, and Fig. 4 The figure is a block diagram showing the configuration of the interface unit, Figure 5 is a diagram showing the specific configuration of the interface unit, and Figure 6 is a block diagram showing the configuration of the interface unit.
The figure is a diagram illustrating a small-scale transport mechanism, and FIG. 7 is a diagram illustrating the configuration of a conventional continuous processing system for semi-solid substrates. 2...Transportation mechanism 4-11.4-12...Product process processing section 5-
11.5-12...Interface section 6-Sudosoka 7...Inspection device 8...-Transport control section Patent applicant Fujitsu Limited Agent Patent attorney Eisuke Suzuki Figure 1 Ashita vrjLrI configuration diagram Figure 2
Claims (1)
）により搬送する半導体基板の連続処理システムにおい
て、 複数の同種の製品プロセス加工部（４−１１）（４−１
２）・・・の更に複数組（４−２１）・・・、（４−３
１）・・・を具備し、それぞれインタフェース部（５−
１１）・・・、（５−２１）・・・を介して搬送機構（
２）と結合され、 且つ該搬送機構（２）と結合されるストッカ（６）と検
査装置（７）と、 該搬送機構（２）の搬送を制御する搬送制御部（８）と
を具備し、 該搬送制御部（８）において予め定義された製品の工程
経路に基づき、或る製品プロセス加工部（４）で加工し
たものが検査装置（７）／ストッカ（６）を経由して再
び何れかの製品プロセス加工部（４）での加工を可能と
するように搬送機構（２）により搬送させること を特徴とする半導体基板の連続処理システム。 II、請求項第１項記載のインタフェース部は、各製品プ
ロセス加工部の小規模搬送機構に対する移載機構と、ウ
ェーハ識別部と、バッファ部とを具備することを特徴と
する半導体基板の連続処理システム。 III、請求項第１項記載のストッカは、製品プロセス加
工部が繁忙のとき一時的に収納するように制御された構
成とし、ストッカから搬送機構に移載するときは、繁忙
でない製品プロセス加工部を選択するように制御するこ
とを特徴とする半導体基板の連続処理システム。 IV、請求項第II項記載のバッファはウェーハ収納部で構
成され、インタフェース台に対し脱着可能な構造とし、
搬送処理が非稼動のときに製品プロセス加工部への製品
の供給及び製品プロセス加工部からの製品の取り出しを
可能とすることを特徴とする半導体基板の連続処理シス
テム。[Claims] I. The product in the product processing section (4) is transferred to the transport mechanism (2).
) In a continuous processing system for semiconductor substrates transported by
2) Multiple sets of... (4-21)..., (4-3
1)..., each with an interface section (5-
11)..., (5-21)...
2) and a stocker (6) and an inspection device (7) that are coupled to the transport mechanism (2), and a transport control section (8) that controls the transport of the transport mechanism (2). , Based on the product process route defined in advance in the transport control unit (8), a product processed in a certain product processing unit (4) is transported again via the inspection device (7)/stocker (6). A continuous processing system for semiconductor substrates, characterized in that the semiconductor substrates are transported by a transport mechanism (2) to enable processing in the product processing section (4). II. Continuous processing of semiconductor substrates, characterized in that the interface section according to claim 1 comprises a transfer mechanism for a small-scale transfer mechanism of each product processing section, a wafer identification section, and a buffer section. system. III. The stocker according to claim 1 has a controlled structure such that it is temporarily stored when the product processing section is busy, and when transferring from the stocker to the transport mechanism, it is stored in the product processing section that is not busy. A continuous processing system for semiconductor substrates, characterized in that the system is controlled to select. IV. The buffer according to claim II is composed of a wafer storage part and has a structure that can be attached to and detached from the interface table,
1. A continuous processing system for semiconductor substrates, characterized in that it is possible to supply products to a product processing section and to take products out of the product processing section when transport processing is not in operation.
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23057888A JPH07101706B2 (en) | 1988-09-14 | 1988-09-14 | Wafer continuous processing apparatus and continuous processing method |
| US07/403,355 US5024570A (en) | 1988-09-14 | 1989-09-06 | Continuous semiconductor substrate processing system |
| EP89309250A EP0359525B1 (en) | 1988-09-14 | 1989-09-12 | Continuous semiconductor substrate processing system |
| DE68921273T DE68921273T2 (en) | 1988-09-14 | 1989-09-12 | System for the continuous treatment of semiconductor substrates. |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23057888A JPH07101706B2 (en) | 1988-09-14 | 1988-09-14 | Wafer continuous processing apparatus and continuous processing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0278243A true JPH0278243A (en) | 1990-03-19 |
| JPH07101706B2 JPH07101706B2 (en) | 1995-11-01 |
Family
ID=16909940
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23057888A Expired - Fee Related JPH07101706B2 (en) | 1988-09-14 | 1988-09-14 | Wafer continuous processing apparatus and continuous processing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07101706B2 (en) |
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02135750A (en) * | 1988-11-16 | 1990-05-24 | Mitsubishi Electric Corp | Conveyor |
| JPH0786369A (en) * | 1993-09-10 | 1995-03-31 | Matsushita Electric Ind Co Ltd | Composite processing device equipped with plurality of processing means |
| WO1995017993A1 (en) * | 1993-12-27 | 1995-07-06 | Hitachi, Ltd. | Method and apparatus for continuously producing a multiplicity of types |
| US5928389A (en) * | 1996-10-21 | 1999-07-27 | Applied Materials, Inc. | Method and apparatus for priority based scheduling of wafer processing within a multiple chamber semiconductor wafer processing tool |
| US6328768B1 (en) * | 1996-10-28 | 2001-12-11 | Nec Corporation | Semiconductor device manufacturing line |
| JP2005175455A (en) * | 1993-07-15 | 2005-06-30 | Renesas Technology Corp | Manufacturing system and manufacturing method |
| US7032739B2 (en) | 2003-03-31 | 2006-04-25 | Seiko Epson Corporation | Intermediate product carrying apparatus, and intermediate product carrying method |
| KR100576814B1 (en) * | 1999-11-12 | 2006-05-10 | 삼성전자주식회사 | A system for carring wafer carriers |
| US7051863B2 (en) | 2003-03-12 | 2006-05-30 | Seiko Epson Corporation | Transferring apparatus, carrying apparatus, and transferring method |
| US7108121B2 (en) | 2003-03-12 | 2006-09-19 | Seiko Epson Corporation | Intermediate product transferring apparatus and carrying system having the intermediate product transferring apparatus |
| US7182201B2 (en) | 2003-03-12 | 2007-02-27 | Seiko Epson Corporation | Wafer carrying apparatus and wafer carrying method |
| US7261746B2 (en) | 2003-04-03 | 2007-08-28 | Seiko Epson Corporation | Intermediate product manufacturing apparatus, and manufacturing method |
| US7308757B2 (en) | 2003-03-10 | 2007-12-18 | Seiko Epson Corporation | Intermediate product manufacturing apparatus, and intermediate product manufacturing method |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4915033B2 (en) * | 2000-06-15 | 2012-04-11 | 株式会社ニコン | Exposure apparatus, substrate processing apparatus, lithography system, and device manufacturing method |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5619635A (en) * | 1979-07-27 | 1981-02-24 | Hitachi Ltd | Manufacturing apparatus |
| JPS56169343A (en) * | 1980-05-30 | 1981-12-26 | Fujitsu Ltd | Manufacture of semiconductor device |
-
1988
- 1988-09-14 JP JP23057888A patent/JPH07101706B2/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5619635A (en) * | 1979-07-27 | 1981-02-24 | Hitachi Ltd | Manufacturing apparatus |
| JPS56169343A (en) * | 1980-05-30 | 1981-12-26 | Fujitsu Ltd | Manufacture of semiconductor device |
Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07118500B2 (en) * | 1988-11-16 | 1995-12-18 | 三菱電機株式会社 | Carrier |
| JPH02135750A (en) * | 1988-11-16 | 1990-05-24 | Mitsubishi Electric Corp | Conveyor |
| JP2005175455A (en) * | 1993-07-15 | 2005-06-30 | Renesas Technology Corp | Manufacturing system and manufacturing method |
| JPH0786369A (en) * | 1993-09-10 | 1995-03-31 | Matsushita Electric Ind Co Ltd | Composite processing device equipped with plurality of processing means |
| WO1995017993A1 (en) * | 1993-12-27 | 1995-07-06 | Hitachi, Ltd. | Method and apparatus for continuously producing a multiplicity of types |
| US5928389A (en) * | 1996-10-21 | 1999-07-27 | Applied Materials, Inc. | Method and apparatus for priority based scheduling of wafer processing within a multiple chamber semiconductor wafer processing tool |
| US6328768B1 (en) * | 1996-10-28 | 2001-12-11 | Nec Corporation | Semiconductor device manufacturing line |
| KR100576814B1 (en) * | 1999-11-12 | 2006-05-10 | 삼성전자주식회사 | A system for carring wafer carriers |
| US7308757B2 (en) | 2003-03-10 | 2007-12-18 | Seiko Epson Corporation | Intermediate product manufacturing apparatus, and intermediate product manufacturing method |
| US7051863B2 (en) | 2003-03-12 | 2006-05-30 | Seiko Epson Corporation | Transferring apparatus, carrying apparatus, and transferring method |
| US7108121B2 (en) | 2003-03-12 | 2006-09-19 | Seiko Epson Corporation | Intermediate product transferring apparatus and carrying system having the intermediate product transferring apparatus |
| US7182201B2 (en) | 2003-03-12 | 2007-02-27 | Seiko Epson Corporation | Wafer carrying apparatus and wafer carrying method |
| US7222721B2 (en) | 2003-03-12 | 2007-05-29 | Seiko Epson Corporation | Transferring apparatus, carrying apparatus, and transferring method |
| US7032739B2 (en) | 2003-03-31 | 2006-04-25 | Seiko Epson Corporation | Intermediate product carrying apparatus, and intermediate product carrying method |
| US7261746B2 (en) | 2003-04-03 | 2007-08-28 | Seiko Epson Corporation | Intermediate product manufacturing apparatus, and manufacturing method |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH07101706B2 (en) | 1995-11-01 |
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