JP2719524B2 - Semiconductor manufacturing equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to a semiconductor manufacturing apparatus.

(Prior Art) Conventionally, in a semiconductor manufacturing process, an object to be processed, for example, a semiconductor wafer, undergoes various processes in a plurality of processing steps. In recent years, with the high integration of the semiconductor wafer, the above-described processing steps have been increasingly performed. Increasingly complex.

On the other hand, in the environment of semiconductor manufacturing, a higher degree of cleanliness is required in order to prevent defects of semiconductor elements due to adhesion of dust (dust) along with the miniaturization described above. There is a further need to reduce dust generation.

Therefore, a semiconductor manufacturing apparatus which can easily cope with complicated processing steps and can cope with high cleanliness, for example, a wafer loading / unloading mechanism and a plurality of processing mechanisms such as a resist coating mechanism, a developing mechanism as a resist processing apparatus. A heating mechanism and the like are arranged and connected, and a semiconductor wafer is automatically transferred to each processing mechanism by a wafer transfer mechanism according to a predetermined processing procedure to perform a series of processing.

The arrangement configuration of each processing mechanism in such a semiconductor manufacturing apparatus differs depending on the processing contents, installation conditions, and the like. For example, each processing mechanism is linearly arranged and connected, and the next processing mechanism is sequentially arranged from one end processing mechanism by a wafer transfer mechanism. And a configuration in which a plurality of processing mechanisms are arranged in parallel, a wafer transport mechanism is arranged in the center, and a semiconductor wafer is transported to each processing mechanism for processing. .

First, a wafer loading / unloading operation of the semiconductor manufacturing apparatus is performed by a wafer loading mechanism (hereinafter, referred to as a wafer loading mechanism) configured to be capable of vertically moving a wafer carrier in which a large number of semiconductor wafers are stacked and stored at predetermined intervals.
(Called a sender mechanism). The sender mechanism can be driven by, for example, a stepping motor or the like so as to move up and down, for example, at a wafer arrangement pitch interval, for example, a wafer carrier accommodating shelf pitch, and to move under a semiconductor wafer in a wafer carrier descending at a predetermined pitch. , A semiconductor wafer is mounted on the wafer transfer arm, and the semiconductor wafer is sequentially taken out from below the wafer carrier and transferred to the wafer transfer mechanism. Then, the processed semiconductor wafer that has been subjected to a series of process processing is transferred to a wafer unloading mechanism (hereinafter, referred to as a receiver mechanism) on which a wafer carrier that stores the processed wafer is mounted, and has the same configuration as the above-described sender mechanism. Are sequentially stored in the wafer carrier from above.

(Problems to be Solved by the Invention) By the way, in the present situation where the processing contents are further complicated as the integration degree of the semiconductor device progresses, lots cannot be set for each wafer carrier. In addition, this tendency has been further strengthened by recent multi-product low-volume reduction.

However, as described above, in the sender mechanism in the conventional semiconductor manufacturing apparatus, since the semiconductor wafers housed in the wafer carrier are sequentially taken out from the lower side and processed, the processing contents are stored in the housing container as described above. When multiple lots of semiconductor wafers with different
Processing must be advanced in batches for each small lot,
There is a problem that the loss time is increased and the production efficiency is greatly reduced. Even if different lot types are processed simultaneously, if the processing time in each processing mechanism is different, the loss time similarly increases, and the production efficiency decreases.

In addition, with the complexity of the processing contents, the processing steps after the semiconductor manufacturing apparatus may be different, and if the processed semiconductor wafers are simply accommodated sequentially from above the wafer carrier in the receiver mechanism, the transshipment is separately performed. There is a problem that work is required.

SUMMARY OF THE INVENTION The present invention has been made in order to address the problems of the related art, and has been made in consideration of a semiconductor manufacturing method capable of simultaneously processing semiconductor wafers having the same processing content regardless of the accommodation position of a wafer carrier. It is intended to provide a device.

[Structure of the Invention] (Means for Solving the Problems) That is, the present invention provides a semiconductor manufacturing apparatus having a transport mechanism for carrying out an object to be processed from an accommodation container accommodating a plurality of types of objects to be transported to a plurality of processing mechanisms. In the apparatus, means for specifying a processing order according to the processing content for the plurality of types of processing objects, means for unloading the processing objects according to the processing order and transporting the processing objects to the processing mechanism in a predetermined processing order; Are provided in one device.

The invention according to claim 2 is a semiconductor manufacturing apparatus having a transport mechanism for transporting an object to be processed from a storage container accommodating a plurality of types of objects to be transported to a plurality of processing mechanisms. Means for designating the processing order according to the processing content of each group of the processing target to perform the same processing in the processing; and carrying out the processing target for each group in accordance with the processing priority and a predetermined processing And means for transporting to the respective processing mechanisms in order are provided in one apparatus.

The invention according to claim 3 is a semiconductor manufacturing apparatus having a transport mechanism for transporting an object to be processed from a plurality of storage containers accommodating a plurality of types of objects to be transported to a plurality of processing mechanisms. Means for designating a processing order according to the processing content of each group of objects to be processed which perform the same processing among the plurality of types of objects to be processed stored in the storage container; Means for carrying out an object to be processed each time and transporting the object to each of the processing mechanisms in a predetermined processing order is provided in one apparatus.

In the semiconductor manufacturing apparatus of the present invention, the processing order is first determined by the processing order designating means according to the processing content of each workpiece. Then, in order to carry out the object to be processed from a desired position of the container according to the processing order, for example, even if an object to be processed having a different processing content is stored in an arbitrary position in the container, the same processing content is stored. Processing can be performed for each object to be processed.

(Embodiment) An embodiment in which the semiconductor manufacturing apparatus of the present invention is applied to a resist coating and developing apparatus will be described below with reference to the drawings.

In the vicinity of the center of the apparatus main body 1, a wafer holding mechanism 3 for holding an object to be processed, for example, a semiconductor wafer 2, for example, by suction is mounted, and a wafer for moving the wafer holding mechanism 3 in the XYZ direction and the θ direction. A transport mechanism 4 is provided. The wafer transfer mechanism 4 is moved and rotated by a rotation drive mechanism (not shown) such as a stepping motor and a ball screw connected thereto.

Then, one movement path of the wafer transfer mechanism 4, for example, X
On one side, for example, the upper side in the figure along the directional movement path 5, a plurality of wafer processing mechanisms, for example, an HMDS processing mechanism 6 for improving the adhesion between the semiconductor wafer 2 and the resist film,
A first pre-bake mechanism 7 for heating and evaporating the solvent remaining in the first-layer resist applied on the semiconductor wafer 2, and the semiconductor wafer 2 that has been heated by the first pre-bake mechanism 7 is cooled. A first cooling mechanism 8 is arranged in order in each case. On the other hand, on the side of the moving path 5 facing each of the wafer processing mechanisms 7, 8, 9, the semiconductor wafer 2 is disposed.
A first coating mechanism 9 for spin-coating the first-layer resist on the upper surface of the semiconductor wafer 2 and a second coating mechanism 10 for spin-coating the second-layer resist on the upper surface of the semiconductor wafer 2 are sequentially provided side by side. . Each of these wafer processing mechanisms 6, 7, 8, 9, 10
Constitute a first processing unit 11.

In the semiconductor manufacturing apparatus of this embodiment, another processing unit similar to the first processing unit 11 can be added in accordance with a processing step. A standby mechanism 13 having a mounting table 12 for temporarily holding the semiconductor wafer 2 on standby is provided on one side. A plurality of processing mechanisms, such as a second pre-bake mechanism 14, are provided in series with the standby mechanism 13 in accordance with the processing contents. A second cooling mechanism 15 for cooling the semiconductor wafer 2 heated by the second pre-bake mechanism 14, a surface coating layer coating mechanism 16 for coating a CEL film for preventing diffused light reflection on the resist, and a second wafer transfer. A second processing unit 18 including a mechanism 17 and the like is added.

On the other side of the first processing unit 11, a plurality of, for example, a sender mechanism 22 containing two wafer carriers 21a and 21b, each of which stores the semiconductor wafer 2 before processing, and a plurality of, for example, each of which stores the semiconductor wafer 2 after processing. Two wafer carriers
A receiver mechanism 24 on which the semiconductor wafer 2 is mounted;
Transfer arm 25 for unloading the wafer, and a transfer arm drive mechanism 26 for moving the wafer transfer arm 25 in the X, Y, Z, and θ directions.
A wafer loading / unloading mechanism 27 including such components is disposed. Then, the unprocessed semiconductor wafer 2 is taken out of the wafer carrier 21 by the wafer transfer arm 25, and
The semiconductor wafer 2 placed on the mounting table 28 and the processed semiconductor wafer 2 placed on the mounting table 28 is stored in the wafer carrier 23.

As shown in FIG. 2, the sender mechanism 22 includes a carrier mounting table 29 on which the wafer carrier 21 is mounted, an elevating mechanism for elevating and lowering the carrier mounting table 29, for example, a ball screw mechanism 30, and a predetermined pitch. And a driving mechanism, for example, a stepping motor 31. The receiver mechanism 24 has the same configuration.

During the wafer removal operation, after raising the wafer carrier 21, the wafer transfer arm 25 is inserted into the lower surface of the semiconductor wafer 2 to be processed, and the wafer carrier 21 is lowered to place the semiconductor wafer 2 on the wafer transfer arm 25. With. During the wafer storage operation, the wafer carrier 21 is lowered, the wafer transfer arm 25 on which the semiconductor wafer 2 is mounted is inserted into a predetermined position of the wafer carrier 21, and the wafer carrier 21 is raised to place it on a predetermined storage shelf 21. The semiconductor wafer 2 is mounted.

The driving operation of the sender mechanism 22 and the receiver mechanism 24 is performed based on a signal from the wafer loading / unloading position control system 40 together with the wafer loading / unloading mechanism control unit 51 together with the wafer transport arm 25 and the transport arm driving mechanism 26. Are controlled by a first processing unit control unit 52 and a second processing unit which control each processing mechanism and transfer mechanism in the first processing unit 11. 18
It is centrally controlled by a main control unit 54 together with a second processing unit control unit 53 for controlling each of the processing mechanisms and the transport mechanism therein.

The wafer loading / unloading position control system 40 is accommodated in each wafer carrier 21a, 21b to which the processing content input from the input unit 55 is transferred from the main control unit 54 based on the lot processing order in the same lot type unit. Referring to the processing content and position information of the semiconductor wafer 2 that has been
A loading / unloading position control unit 41 that determines a processing order based on the storage position of the storage unit, and an unloading position storage unit 42 that stores the determined processing order. When the storage position in the receiver mechanism 24 is not particularly specified, for example, the processed semiconductor wafer 2 is controlled by the loading / unloading position control unit 41 so that the processed semiconductor wafer 2 is stored in the position where the wafer carriers 21a and 21b are removed. Is done. Further, it is also possible to issue the input command of the removal order itself based on the accommodation position of each wafer carrier 21a, 21b.

When the storage position in the receiver mechanism 24 is designated, the loading / unloading position control unit 41 is similarly transferred from the main control unit 54 based on the storage position rank for each lot type input from the input unit 55. The storage position order is determined with reference to the processing content and position information of the semiconductor wafers 2 stored in the respective wafer carriers 21a and 21b or the processing order stored in the unloading position storage unit 42, and the storage position order is determined as the storage position. Storage unit 43
Is stored.

Next, the sender mechanism 22 and the receiver mechanism
A description will be given of a method of determining a take-out order, taking the sender mechanism 22 as an example.

First, the processing content and position information of each semiconductor wafer 2 stored in each wafer carrier 21a, 21b are sent from the main control unit 54 to the loading / unloading position control unit 41. This semiconductor wafer 2
Is, for example, as shown in FIG. 3 (A).
From the storage shelves 32a-1 of the wafer carrier 21a to the storage shelves 32a-
The semiconductor wafers 2 of the processing contents A (hereinafter, referred to as Lot A) are stored in the storage shelves 32a-6 to 32a-10, and the semiconductor wafers 2 of the processing contents B (hereinafter referred to as Lot B) are stored in the storage shelves. The semiconductor wafers 2 of the processing content C (hereinafter referred to as C lot) are stored from 32a-10 to the storage shelves 32a-n.
In addition, as shown in FIG.
Information that semiconductor wafers 2 in lot A are stored from storage shelves 32b-1 to 32b-10, and semiconductor wafers 2 in lot B are stored from storage shelves 32b-11 to 32b-n. It is. On the other hand, the processing order is input for each lot type having the same processing content, for example, a lot order such as A lot → B lot → C lot.

Then, the carry-in / carry-out position control unit 41 refers to the processing content and position information of each of the semiconductor wafers 2 stored based on the lot order, and describes the specific processing order, for example, on the storage shelf of the wafer carriers 21a and 21b. Then 32a-1 → 32a-2 →
… → 32a-5 → 32b-1 →… 32b-10 → 32a-6 →… → 32a
−10 → 32b−11 → 32b−12 →… → 32b−n → 32a−11 →… →
32a-n are determined, and the processing order is stored in the extraction position storage unit 42.

At the start of the processing, the processing order is transferred to the wafer loading / unloading mechanism control unit 51, and the wafer transfer arm 25 takes out each semiconductor wafer 2 based on the processing order.

Also, when the receiving position is set in the receiver mechanism 24, the receiving position is determined in a similar procedure.

In this manner, the semiconductor wafer 2 transferred in a predetermined order from the wafer loading / unloading mechanism 27 to the wafer holding mechanism 3 of the wafer transporting mechanism 4 performs the respective processing mechanisms in a predetermined order, for example, the HMDS processing mechanism 6 → the first coating. Mechanism 9 → first pre-bake mechanism 7
→ First cooling mechanism 8 → Conveyed to second coating mechanism 10 and subjected to respective processing.

Thereafter, if necessary, the wafer is transported to the second processing unit 34 and subjected to a predetermined process. Thereafter, the wafer is transported again by the wafer transport mechanism 4 to the wafer loading / transporting mechanism 27 and processed by the receiver mechanism 24. The semiconductor wafer 2 is accommodated in the same position or a designated position in the wafer carrier 23.

As described above, in the resist coating and developing apparatus of this embodiment, it is possible to take out a semiconductor wafer from a desired position on a wafer carrier in accordance with a designated processing order and transport it to each processing mechanism. Even if a plurality of lot types are accommodated in a carrier, processing can be performed for each semiconductor wafer having the same processing content. Therefore, it is possible to reduce a loss time due to a change in the processing content or a difference in the processing procedure, and it is possible to cope with a complicated processing content or a small variety of various kinds without significantly lowering the throughput. Further, it is possible to program the processing order so as to reduce the overall processing time.

Further, since semiconductor wafers of the same lot type among a plurality of wafer carriers can be processed collectively, loss time can be further reduced.

[Effects of the Invention] As described above, according to the semiconductor manufacturing apparatus of the present invention, high-throughput processing can be performed even when the processing content is complicated and the number of kinds of products is reduced.

[Brief description of the drawings]

FIG. 1 is a diagram showing the configuration of an embodiment in which the semiconductor manufacturing apparatus of the present invention is applied to a resist coating and developing apparatus. FIG. 2 is a diagram showing the configuration and control system of a sender mechanism of the resist coating and developing apparatus shown in FIG. FIGS. 3A and 3B are views for explaining processing contents and position information of a semiconductor wafer accommodated in a wafer carrier. DESCRIPTION OF SYMBOLS 1 ... Device main body, 2 ... Semiconductor wafer, 4 ... Wafer carrying mechanism, 6, 7, 8, 9, 10 ... Processing mechanism, 11 ... 1st
Processing equipment units, 21, 23 ... Wafer carrier, 22 ...
... Sender mechanism, 24 ... Receiver mechanism, 25 ... Wafer transfer arm, 27 ... Wafer loading / unloading mechanism, 29 ... Carrier mounting table, 30 ... Elevating mechanism, 31 ... Stepping motor, 32
... accommodation shelves, 40 ... carry-in / out position control system, 41 ... carry-in / out position control section, 42 ... take-out position storage section, 43 ... storage position storage section, 51 ... wafer carry-in / out mechanism control Part, 54 ...
... Main control unit.

Claims (3)

(57) [Claims] 1. A semiconductor manufacturing apparatus having a transport mechanism for carrying out an object to be processed from an accommodation container accommodating a plurality of types of objects to be transported to a plurality of processing mechanisms. A means for designating a processing order in accordance with the processing order and a means for carrying out an object to be processed in accordance with the processing order and transporting the object to the processing mechanism in a predetermined processing order are provided in one apparatus. Manufacturing equipment. 2. A semiconductor manufacturing apparatus having a transport mechanism for carrying out an object to be processed from an accommodation container accommodating a plurality of types of objects to be transported to a plurality of processing mechanisms, wherein: Means for designating the processing order in accordance with the processing content of each group of objects to be processed which perform the same processing, and carrying out the objects to be processed for each group in accordance with the processing order; And a means for transporting the wafer to the processing mechanism is provided in a single apparatus. 3. A semiconductor manufacturing apparatus having a transport mechanism for carrying out an object to be processed from a plurality of containers accommodating a plurality of types of objects to be transported to a plurality of processing mechanisms. Means for designating a processing order according to the processing content of each group of the processing object to perform the same processing among the plurality of types of the processing objects stored therein; Means for unloading an object and transporting the object to each of the processing mechanisms in a predetermined processing order in a single apparatus.