JPH0275991U - - Google Patents
Info
- Publication number
- JPH0275991U JPH0275991U JP15435788U JP15435788U JPH0275991U JP H0275991 U JPH0275991 U JP H0275991U JP 15435788 U JP15435788 U JP 15435788U JP 15435788 U JP15435788 U JP 15435788U JP H0275991 U JPH0275991 U JP H0275991U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- switching transistor
- power supply
- supply device
- detection section
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 claims description 5
- 238000004804 winding Methods 0.000 claims 3
- 238000010586 diagram Methods 0.000 description 10
Landscapes
- Dc-Dc Converters (AREA)
- Electronic Switches (AREA)
Description
第１図は本考案の第１実施例の回路図、第２図
はその主要部の信号の波形図、第３図および第４
図は、それぞれ本考案の第２、第３実施例の回路
図、第５図は本考案の第４実施例の回路図、第６
図はその主要部の信号の波形図、第７図は本考案
の第５実施例の回路図、第８図はその主要部の信
号の波形図、第９図は本考案の第６実施例の回路
図、第１０図は本考案の第７実施例の回路図、第
１１図は本考案の第８実施例の回路図である。
１……トランス、２……スイツチングトランジ
スタ（ＦＥＴ）、３，２０，３２……差動増幅器
、７……出力検出部、１１……ＦＥＴドライブ回
路、３１……バイポーラトランジスタ。
FIG. 1 is a circuit diagram of the first embodiment of the present invention, FIG. 2 is a waveform diagram of the main signals, and FIGS. 3 and 4.
The figures are circuit diagrams of the second and third embodiments of the present invention, FIG. 5 is a circuit diagram of the fourth embodiment of the present invention, and FIG. 6 is a circuit diagram of the fourth embodiment of the present invention.
The figure is a waveform diagram of the main part of the signal, Fig. 7 is a circuit diagram of the fifth embodiment of the present invention, Fig. 8 is a waveform diagram of the main part of the signal, and Fig. 9 is the sixth embodiment of the present invention. FIG. 10 is a circuit diagram of the seventh embodiment of the present invention, and FIG. 11 is a circuit diagram of the eighth embodiment of the present invention. 1...Transformer, 2...Switching transistor (FET), 3, 20, 32...Differential amplifier, 7...Output detection section, 11...FET drive circuit, 31...Bipolar transistor.
Claims (1)
ングトランジスタと、その二次巻線に接続された
整流回路と出力検出部とを有し、該出力検出部か
ら得られた検出信号を前記トランスの一次巻線側
に帰還させて負帰還制御させる電源装置において
、予め定められた基準信号と前記出力検出部から
の信号とを入力とし、前記スイツチングトランジ
スタを非飽和領域で動作させる大きさの制御信号
を出力する差動増幅器を具備し、該差動増幅器の
出力を該スイツチングトランジスタの制御信号と
したことを特徴とする電源装置。 (2) 前記基準信号を一定のデユーテイの方形波
パルス信号としたことを特徴とする前記実用新案
登録請求の範囲第１項記載の電源装置。[Claims for Utility Model Registration] (1) A switching transistor connected to the primary winding of the transformer, a rectifier circuit connected to the secondary winding of the switching transistor, and an output detection section, and from the output detection section In a power supply device that feeds back the obtained detection signal to the primary winding side of the transformer to perform negative feedback control, a predetermined reference signal and a signal from the output detection section are input, and the switching transistor is turned off. 1. A power supply device comprising: a differential amplifier that outputs a control signal having a magnitude for operating in a saturation region; and an output of the differential amplifier is used as a control signal for the switching transistor. (2) The power supply device according to claim 1, wherein the reference signal is a square wave pulse signal with a constant duty.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988154357U JPH0640471Y2 (en) | 1988-11-29 | 1988-11-29 | Power supply |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988154357U JPH0640471Y2 (en) | 1988-11-29 | 1988-11-29 | Power supply |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0275991U true JPH0275991U (en) | 1990-06-11 |
| JPH0640471Y2 JPH0640471Y2 (en) | 1994-10-19 |
Family
ID=31431016
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988154357U Expired - Fee Related JPH0640471Y2 (en) | 1988-11-29 | 1988-11-29 | Power supply |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0640471Y2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2015050841A (en) * | 2013-09-02 | 2015-03-16 | パナソニック株式会社 | Separate excitation power source |
| JP2020120562A (en) * | 2019-01-28 | 2020-08-06 | 株式会社リコー | Power supply device, image forming apparatus, and voltage control method |
-
1988
- 1988-11-29 JP JP1988154357U patent/JPH0640471Y2/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2015050841A (en) * | 2013-09-02 | 2015-03-16 | パナソニック株式会社 | Separate excitation power source |
| JP2020120562A (en) * | 2019-01-28 | 2020-08-06 | 株式会社リコー | Power supply device, image forming apparatus, and voltage control method |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0640471Y2 (en) | 1994-10-19 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |