JPH0273828U - - Google Patents
Info
- Publication number
- JPH0273828U JPH0273828U JP15385388U JP15385388U JPH0273828U JP H0273828 U JPH0273828 U JP H0273828U JP 15385388 U JP15385388 U JP 15385388U JP 15385388 U JP15385388 U JP 15385388U JP H0273828 U JPH0273828 U JP H0273828U
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- secondary winding
- whose
- diode
- cathode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004804 winding Methods 0.000 claims description 8
- 239000004065 semiconductor Substances 0.000 claims description 5
- 230000008878 coupling Effects 0.000 claims description 3
- 238000010168 coupling process Methods 0.000 claims description 3
- 238000005859 coupling reaction Methods 0.000 claims description 3
- 230000002265 prevention Effects 0.000 claims description 2
- 238000007599 discharging Methods 0.000 claims 2
- 239000004020 conductor Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Electronic Switches (AREA)
Description
第１図ないし第３図は本考案の絶縁ゲート型電
力用半導体素子の高周波駆動回路の実施例を示し
、第１図は１実施例の結線図、第２図は第１図の
ゲート電極の電圧波形図、第３図は他の実施例の
結線図、第４図、第５図はそれぞれ従来の絶縁ゲ
ート型電力用半導体素子の高周波駆動回路の結線
図、第６図ａ，ｂは第４図、第５図のゲート電極
の電圧、ＰＮＰ型トランジスタのベース電流の波
形図である。
３……パルストランス、３″……２次巻線、６
，６′……整流用のダイオード、７，７′……逆
流防止用のダイオード、８……電力用のＭＯＳ−
ＦＥＴ、９……結合用の抵抗、１０……電極間容
量、１２……ＰＮＰ型トランジスタ、１３……バ
イアス用の抵抗、１４，１４′……充電振動抑制
用の抵抗、ｇ……ゲート電極、ｓ……ソース電極
。
1 to 3 show an embodiment of a high-frequency drive circuit for an insulated gate type power semiconductor device of the present invention, FIG. 1 is a wiring diagram of one embodiment, and FIG. A voltage waveform diagram, FIG. 3 is a wiring diagram of another embodiment, FIGS. 4 and 5 are wiring diagrams of a high frequency drive circuit of a conventional insulated gate power semiconductor device, and FIGS. FIG. 5 is a waveform diagram of the voltage of the gate electrode and the base current of the PNP transistor in FIGS. 4 and 5; FIG. 3...Pulse transformer, 3''...Secondary winding, 6
, 6'... Diode for rectification, 7, 7'... Diode for backflow prevention, 8... MOS- for power
FET, 9... Resistor for coupling, 10... Capacitance between electrodes, 12... PNP transistor, 13... Resistor for bias, 14, 14'... Resistor for suppressing charge vibration, g... Gate electrode , s...source electrode.
Claims (1)
て駆動される絶縁用のパルストランスと、 アノードが前記トランスの２次巻線の一端に接
続された整流用のダイオードと、 一端が前記整流用のダイオードのカソードに接
続された充電振動抑制用の抵抗と、 アノードが前記抑制用の抵抗の他端に接続され
た逆流防止用のダイオードと、 ゲート電極が結合用の抵抗を介して前記逆流防
止用のダイオードのカソードに接続され、前記ゲ
ート電極と前記２次巻線の他端に接続された入出
力電極との電極間容量の充、放電で高周波スイツ
チングする絶縁ゲート型電力用導体素子と、 ベース、エミツタが前記両ダイオードのカソー
ドそれぞれに接続され、コレクタが前記２次巻線
の他端に接続された放電路用のＰＮＰ型トランジ
スタと、 前記トランジスタのベース、コレクタ間に設け
られたバイアス用の抵抗と を備えた絶縁ゲート型電力用半導体素子の高周
波駆動回路。 ２値レベルに高周波変化する制御信号によつ
て駆動されるパルストランスと、 一端が前記トランスの２次巻線の一端に接続さ
れた充電振動抑制用の抵抗と、 アノードが前記抑制用の抵抗の他端に接続され
た整流用のダイオードと、 ゲート電極が結合用の抵抗を介して前記整流用
のダイオードのカソードに接続され、前記ゲート
電極と前記２次巻線の他端に接続された入出力電
極との電極間容量の充、放電で高周波スイツチン
グする絶縁ゲート型電力用半導体素子と、 ベースが逆流防止用のダイオードのカソード、
アノードを介して前記２次巻線の一端に接続され
、エミツタ、コレクタが前記整流用のダイオード
のカソード、前記２次巻線の他端それぞれに接続
された放電路用のＰＮＰ型トランジスタと、 前記トランジスタのベース、コレクタ間に設け
られたバイアス用の抵抗と を備えた絶縁ゲート型電力用半導体素子の高周
波駆動回路。[Claims for Utility Model Registration] An insulating pulse transformer driven by a control signal that changes in high frequency to a binary level; a rectifier diode whose anode is connected to one end of the secondary winding of the transformer; , a resistor for suppressing charging vibration whose one end is connected to the cathode of the rectifying diode, a diode for preventing backflow whose anode is connected to the other end of the suppressing resistor, and a resistor whose gate electrode is for coupling. The insulated gate type is connected to the cathode of the reverse current prevention diode through the gate electrode, and performs high frequency switching by charging and discharging the interelectrode capacitance between the gate electrode and the input/output electrode connected to the other end of the secondary winding. a power conductor element; a PNP transistor for a discharge path whose base and emitter are connected to the cathodes of both diodes, and whose collector is connected to the other end of the secondary winding; and between the base and collector of the transistor. A high-frequency drive circuit for an insulated gate power semiconductor device, comprising a bias resistor and a bias resistor. a pulse transformer driven by a control signal that changes in high frequency to a binary level; a charging vibration suppressing resistor having one end connected to one end of a secondary winding of the transformer; and an anode of the suppressing resistor. a rectifying diode connected to the other end; a gate electrode connected to the cathode of the rectifying diode via a coupling resistor; and an input connected to the gate electrode and the other end of the secondary winding. An insulated gate type power semiconductor element that performs high frequency switching by charging and discharging the capacitance between the output electrode and the output electrode, and a diode cathode whose base is used to prevent backflow.
a discharge path PNP transistor connected to one end of the secondary winding via an anode, and having an emitter and a collector connected to the cathode of the rectifying diode and the other end of the secondary winding, respectively; A high-frequency drive circuit for an insulated gate power semiconductor device, comprising a bias resistor provided between the base and collector of a transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988153853U JPH0633714Y2 (en) | 1988-11-25 | 1988-11-25 | Insulated gate type power semiconductor device high frequency drive circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988153853U JPH0633714Y2 (en) | 1988-11-25 | 1988-11-25 | Insulated gate type power semiconductor device high frequency drive circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0273828U true JPH0273828U (en) | 1990-06-06 |
| JPH0633714Y2 JPH0633714Y2 (en) | 1994-08-31 |
Family
ID=31430060
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988153853U Expired - Fee Related JPH0633714Y2 (en) | 1988-11-25 | 1988-11-25 | Insulated gate type power semiconductor device high frequency drive circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0633714Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2018505411A (en) * | 2015-06-16 | 2018-02-22 | エルジー・ケム・リミテッド | Transformer relay and battery voltage measurement system using the same |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62185492U (en) * | 1986-05-19 | 1987-11-25 | ||
| JPS63139421A (en) * | 1986-12-01 | 1988-06-11 | Fuji Electric Co Ltd | Gate driving circuit for mosfet |
| JPH01300617A (en) * | 1988-05-30 | 1989-12-05 | Fuji Electric Co Ltd | Gate driving circuit |
-
1988
- 1988-11-25 JP JP1988153853U patent/JPH0633714Y2/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62185492U (en) * | 1986-05-19 | 1987-11-25 | ||
| JPS63139421A (en) * | 1986-12-01 | 1988-06-11 | Fuji Electric Co Ltd | Gate driving circuit for mosfet |
| JPH01300617A (en) * | 1988-05-30 | 1989-12-05 | Fuji Electric Co Ltd | Gate driving circuit |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2018505411A (en) * | 2015-06-16 | 2018-02-22 | エルジー・ケム・リミテッド | Transformer relay and battery voltage measurement system using the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0633714Y2 (en) | 1994-08-31 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |