JPH0267736A - Semiconductor device having via hole and manufacture thereof - Google Patents

Abstract

PURPOSE:To allow an element section of a monolithic microwave IC where large amount of heat is generated to have decreased heat resistance and decreased source inductance without increasing loss of the circuit by providing a via hole consisting of a small-diameter hole extended up to the rear face of an electrode and a large-diameter hole extended to the middle of the depth of a semiconductor substrate. CONSTITUTION:A pattern of a masking material for etching is formed in a region on a semiconductor substrate 11 corresponding to an element region where a large amount of heat is generated. The substrate 11 is etched selectively by chemical etching or reactive ion etching so as to form a large-diameter hole 14. A small-diameter hole 15 is formed by means of laser beams such that it is extended from the tip of the large-diameter hole 14 to the rear face of a source electrode 13. Thus, there is provided a via hole 16 consisting of the small- diameter hole 15 extended to the rear face of the source electrode 13 and the large-diameter hole 14 extended to the middle of the depth of the semiconductor substrate 11, whereby low heat resistance and low source inductance can be realized. Further, since a microstrip circuit 17 is provided on the thick semiconductor substrate 11, loss of the circuit can be decreased in the same time. Preferably, the distance between the surface of the semiconductor substrate 11 and the top plane of the large-diameter hole 14 is between 10mum and 50mum.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device having a via hole, which is suitable for high frequency and high output, and a method for manufacturing the same.

[Conventional technology]

Monolithic microwave IC (hereinafter referred to as MMIC) is an integrated circuit in the ultra-high frequency range that generally uses GaAsFET.
Most amplifiers (abbreviated as ) are constructed of a microwave circuit using an FET and a strip line on a semi-insulating GaAs substrate with a thickness of about 200 μm or more. Conventional GaAs MMIC amplifiers handle a relatively small signal level of 100 mW or less, and the heat sink of the FET has not been a particular problem even in the above configuration.

However, in order to obtain an amplifier with higher frequency and higher output, it is necessary to reduce the thickness of the semi-insulating GaAs substrate as much as possible in order to reduce thermal resistance and source inductance. Therefore, a hole was opened in the semi-insulating GaAs substrate to just below the source electrode.

A metallized via hole was provided from the back side of the substrate to establish electrical continuity with the source electrode and reduce source inductance.

Regarding reducing the thickness of the substrate, for example, 28G
For an FET with an output of 1 watt and Hz, an example in which the thickness of the semi-insulating substrate is 30 μm is given in the Journal of the Institute of Electronics and Communication Engineers entitled Quasi-millimeter-wave band power synthesis type GaAs high-output FETJ '85/12.
vol J68C, No, 12. p991-p99
It is reported in 7.

However, if the substrate is made thinner, the conductor width of the stripline must be reduced in design for impedance matching. This increases line loss. FIG. 2 shows the dependence of line loss on substrate thickness. The line loss increases as the circuit scale increases, and significantly reduces the output and efficiency of the amplifier.

[Problem to be solved by the invention]

The conventional technology described above has the disadvantage that when the thickness of the substrate is reduced, the line loss of the strip line increases as the circuit scale increases, significantly reducing the output and efficiency of the amplifier. Also, the thicker the substrate, the deeper the via hole.
There was a drawback that it was difficult to stably perform metallization on the source electrode from the back side.

An object of the present invention is to reduce the thermal resistance and source inductance of the element part in an MMIC that includes an element with a relatively large amount of heat, such as a high-output FET, without increasing circuit loss, so that it can be used at ultra-high frequencies. An object of the present invention is to obtain a semiconductor device having a via hole that has excellent output and efficiency and can be manufactured with good reproducibility, and a method for manufacturing the same.

[Means to solve the problem]

As shown in FIG. 1(Q), the above purpose is to form a via hole 16 consisting of a thin hole 15 reaching the back surface of the electrode 13 and a thick hole 14 opened to a depth halfway into the semiconductor substrate 11. This is achieved by forming a That is,
The entire MMIC is constructed of a semiconductor substrate 11 having a thickness of 100 μm or more, and via holes 16 are formed by selectively etching only the semiconductor substrate in the element portion, which causes an increase in thermal resistance and source inductance. Since the strip line is formed on a substrate with a thickness of 100 μm or more, the conductor width can be designed to be wide, and the circuit loss of the MMIC can be reduced. On the other hand, since the element section is made thin, the thermal resistance and source inductance of the element can be reduced.

[Effect]

A via hole according to the present invention will be explained using FIG.

First, a pattern of the etching mask material 12 is formed at a desired position on the semiconductor substrate 11. The above pattern is arranged at a position corresponding to an element portion that generates a large amount of heat.

13 is a source electrode, and 17 is a microstrip line. Next, the semiconductor substrate 11 is selectively etched using a mask material 12 to form a thick hole 14. For the above-mentioned etching, (a) chemical etching using an etching solution such as H2SO4:H2O2:H, or (b) reactive ion etching (RIE) using a parallel plate type plasma etching apparatus is used. Thereafter, a narrow hole 15 is formed from the top surface of the thick hole 14 to the back surface of the source electrode 13 by laser beam machining.

As described above, the via hole 16 consisting of the narrow hole 15 reaching the back surface of the source electrode 13 shown in FIG. As a result, low thermal resistance and low source inductance can be realized, and since the microstrip line 17 is formed on the thick semiconductor substrate 11, low circuit loss can be realized at the same time. Further, since the narrow hole 15 has a relatively shallow depth, a metal film can be easily deposited on the side wall, and metallization can be carried out stably.

Note that the distance a between the surface of the semiconductor substrate 11 and the top surface of the thick hole 14 is preferably about 10 μm to 50 μm.

If the thickness is less than 10 μm, there is a danger that the device may be easily destroyed from the viewpoint of crystal strength. On the other hand, if it is thicker than 50 μm, the thermal resistance of the element will increase, which is not preferable. Therefore, 20~
The thickness is most preferably about 30 μm, particularly from the above viewpoint.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 3 is an embodiment diagram showing a semiconductor device having a via hole according to the present invention and a manufacturing method thereof, in which (a) is a plan view;
(b) to (e) are cross-sectional views showing each process, FIG. 4 is a cross-sectional structure view showing another embodiment, and FIG. 5 is a diagram showing the relationship between characteristic impedance and transmission loss at 10 GHz. The embodiment shown in FIG. 3 is an MMIC using a high frequency/high output FET.

This is a wafer in which MESFETs are formed on a semi-insulating GaAs substrate 21, and the thickness is 100 μm. A source electrode 22, a drain electrode 23, and a gate electrode 24 are placed at desired positions.
A microstrip line 25 is formed using ordinary vapor deposition technology, lithography technology, or the like. code 3
0 indicates the active layer. A pattern of photoresist 26 is formed on the back side of the semi-insulating substrate 21 at a position corresponding to the element portion. A double-sided photomask aligner is used to align this pattern. Next, the photoresist 26
Using the pattern as a mask, H, So,: H2O,:
The semi-insulating GaAs substrate 21 was selectively etched using an etching solution of N and O=3:1:1 as shown in FIG. 3(C).

A thick hole 27' is drilled. As a result, the thickness of the substrate 21 at the etched portion is reduced to 30 μm.

In addition to using the above-mentioned etching solution, the thick hole 27' may be opened by RIE using ccQ2F2 gas or by XeCQ excimer laser beam processing. Next, as shown in FIG. 3(d), a thin hole 271 extends from the top surface of the thick hole 27' to the back surface of the source electrode 22.
A hole is drilled using a laser beam processing method. The XeCQ laser beam has a beam shape of 50 μm square and an energy density of io to 20 J/aj.

Pulses with a repetition frequency of 100 Hz were used. next.

As shown in FIG. 3(e), a via hole 27 is formed by depositing a base metal 28 for plating on the entire surface of the thick hole 27' and the thin hole 27', as shown in FIG. 3(e). A thick film conductor 29 is deposited on the back side of the semi-insulating GaAs substrate 21 by gold plating or the like so as to fill the area.

As a result of measuring the thermal resistance of the above element, Rth is as small as 3°C/W, and the source inductance is 0 per gate finger.
．． 1 pH or less. Also, the transmission line loss is 1d
We were able to reduce it to below B/G.

Next, another embodiment shown in FIG. 4 is a cross-sectional structure of a via hole used in another MMIC. Semi-insulating Ga
On the As substrate 41 (thickness: zooμm), GaAs is
A MESFET 44, a microstrip line 43, etc. are formed, and a via hole 46 is opened below the microstrip line 43. Also,
The semi-insulating substrate 41 in the region where the GaAs MESFET is formed is thinned to 50 μm, making it possible to reduce the thermal resistance of the device. In the figure, 45 is a base metal film for plating, and 42 is a thick film conductor formed by gold plating.

Figure 5 shows the characteristic impedance Zo(
Ω) and transmission loss (dB/a+1). As is clear from the figure, when the characteristic impedance is the same, the thicker the semi-insulating GaAs substrate, the better the transmission loss can be controlled. For example, the characteristic impedance Zo
= When a 50Ω strip line is formed on a semi-insulating GaAs substrate, a substrate thickness of 200 μm suppresses transmission loss by 0.5 dB or more per line length/aa compared to a substrate thickness of 50 μm. I can do things.

〔Effect of the invention〕

As described above, the present invention provides a semiconductor device having a via hole and a method for manufacturing the same. MM in the ultra-high frequency range
When an IC includes an element that generates a relatively large amount of heat, such as a high-output FET, by reducing the thickness of the semi-insulating substrate, the thermal resistance of the element part can be reduced without increasing the circuit loss of the strip line. MMI with excellent output and efficiency that can reduce
C can be realized with good reproducibility.

[Brief explanation of the drawing]

FIG. 1 is a diagram explaining the method of manufacturing a via hole according to the present invention, and (a) to (c) are cross-sectional views showing each process,
(d) is a plan view, Fig. 2 is a diagram showing the dependence of the transmission loss of a strip line on the thickness of a semi-insulating GaAs substrate, and Fig. 3
The figures show one embodiment of a semiconductor device having a via hole according to the present invention, (a) is a plan view, (b) to (e) are cross-sectional views showing each process, and FIG. 4 is a diagram showing another embodiment of the semiconductor device. FIG. 5, which is a diagram showing the cross-sectional structure, is a diagram showing the relationship between characteristic impedance and transmission loss at 10 GHz. 11, 21.41... Semiconductor substrate 13, 22... Electrode (source) 14, 27'... Thick hole 15, 27'... Thin hole 16, 27.46... Via hole 17, 25.43...Micro strip 30...Active element

Claims (1)

[Claims] 1. In a semiconductor device having a via hole for a microwave IC, the via hole is comprised of a narrow hole that reaches the back surface of the electrode and a thick hole that extends halfway into the semiconductor substrate. A semiconductor device with a characteristic via hole. 2. A semiconductor device having a via hole as set forth in claim 1, wherein the via hole is provided in a semi-insulating semiconductor substrate having a microstrip line and an active element. 3. The via hole is characterized in that the distance between the top of the thick hole and the surface of the semiconductor substrate is 10 μm or more and 50 μm or less.
A semiconductor device having a via hole described in Section 1. 4. In a method for manufacturing a semiconductor device having a via hole for a microwave IC, after opening a thick hole by selective etching to a depth halfway through the substrate of the semiconductor device,
A thin hole extending from the top surface of the thick hole to the surface of the substrate,
1. A method for manufacturing a semiconductor device having via holes, characterized in that the via holes are formed by connecting the holes to form a via hole. 5. The method for manufacturing a semiconductor device having a via hole as set forth in claim 4, wherein the narrow hole is formed by laser beam machining.