JPH0266996A - Method of mounting electronic component on circuit board - Google Patents
Method of mounting electronic component on circuit boardInfo
- Publication number
- JPH0266996A JPH0266996A JP21814388A JP21814388A JPH0266996A JP H0266996 A JPH0266996 A JP H0266996A JP 21814388 A JP21814388 A JP 21814388A JP 21814388 A JP21814388 A JP 21814388A JP H0266996 A JPH0266996 A JP H0266996A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- paint
- electronic component
- pattern
- metal powder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title description 13
- 239000003973 paint Substances 0.000 claims abstract description 21
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 16
- 239000000843 powder Substances 0.000 claims abstract description 14
- 239000002184 metal Substances 0.000 claims abstract description 13
- 229910052751 metal Inorganic materials 0.000 claims abstract description 13
- 239000012298 atmosphere Substances 0.000 claims abstract description 8
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 8
- 229920002803 thermoplastic polyurethane Polymers 0.000 claims abstract description 6
- 239000012299 nitrogen atmosphere Substances 0.000 claims description 4
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 abstract description 8
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 abstract description 4
- 229910021529 ammonia Inorganic materials 0.000 abstract description 4
- 230000005484 gravity Effects 0.000 abstract description 2
- 229910052759 nickel Inorganic materials 0.000 abstract description 2
- 150000001408 amides Chemical class 0.000 abstract 2
- 238000001704 evaporation Methods 0.000 abstract 1
- 239000011248 coating agent Substances 0.000 description 7
- 238000000576 coating method Methods 0.000 description 7
- 229910000679 solder Inorganic materials 0.000 description 6
- 238000010438 heat treatment Methods 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 150000001412 amines Chemical class 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
「産業上の利用分野」
本発明は回路基板への電子部品実装方法に関し、とくに
、常温下での実装を可能としたものである。DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" The present invention relates to a method for mounting electronic components on a circuit board, and in particular, to a method that enables mounting at room temperature.
「従来の技術」
従来の回路基板への電子部品の実装方法として、回路基
板の実装面側より、回路基板の対応するスルーホールに
電子部品のリードを挿入し、同電子部品を回路基板上に
搭載した状態で半田槽に浸漬して回路基板の実装に形成
したパターンランドとリードとを半田付けする方法及び
、回路基板に設けたパターンランド上にペースト状半田
を塗布すると共に、パターンランド間に接着剤を塗布し
、この接着剤によって電子部品をリードとパターンラン
ドが合致するように回路基板上に仮固定した状態で加熱
炉内に入れてペースト状半田を硬化させてパターンラン
ドとリードとを半III付けする方法が知られているが
、一般に半田は、その溶融温度が概ね摂氏180度以−
ヒであり、半田槽の半田の温度にしても加熱炉の温度に
しても実質的に摂氏240〜250度位に維持する必要
があり、これがために、回路基板に使用される材料及び
回路基板に実装される電子部品はこの温度に充分耐え得
るものに限定され汎用性に欠けるといった問題点を有づ
るばかりか、高温によって作業環境も悪化するといった
問題点を有していた。"Conventional technology" The conventional method for mounting electronic components on a circuit board is to insert the lead of the electronic component into the corresponding through hole of the circuit board from the mounting side of the circuit board, and then mount the electronic component on the circuit board. A method of soldering pattern lands and leads formed on a circuit board mounted by dipping the mounted state in a solder bath, and a method of applying paste solder on the pattern lands provided on the circuit board, and soldering between the pattern lands. An adhesive is applied, and the electronic component is temporarily fixed onto the circuit board using this adhesive so that the leads and pattern lands match.Then, the electronic component is placed in a heating furnace to harden the paste solder, and the pattern lands and leads are bonded together. A method of semi-solid bonding is known, but generally the melting temperature of solder is approximately 180 degrees Celsius or higher.
The temperature of the solder in the solder bath and the temperature of the heating furnace must be maintained at approximately 240 to 250 degrees Celsius.For this reason, the materials used for circuit boards and the circuit boards The electronic components mounted on the machine are limited to those that can sufficiently withstand this temperature, and not only do they lack versatility, but they also have the problem of deteriorating the working environment due to high temperatures.
[本発明が解決しようとする課題]
本発明は上記従来例の問題点に鑑みてなされたものであ
つ℃、常温下での実装を可能とし、汎用性を有し、且つ
、作業環境の悪化の伴わない回路基板への電子部品の実
装方法を提供することを目的とする。[Problems to be Solved by the Present Invention] The present invention has been made in view of the problems of the conventional example described above. The purpose of the present invention is to provide a method for mounting electronic components on a circuit board without the need for mounting electronic components on a circuit board.
「課題を解決づ゛るための手段」
上記目的を達成するため、本考案においては、回路基板
に設けlζパターンランド上に、導電性金属粉を混入し
たチッソ系雰囲気で硬化するウレタン樹脂系塗わ1を塗
布する工程と、前記パターンランドと電子部品のリード
或いは電極とを前記塗料を介して接続するために、同電
子部品を前記回路基板上に(6載する工程と、竹配電子
部品が前記回路基板上に搭載された状態で前記塗料をチ
ッソ系雰囲気中に置いて硬化させる工程とにより構成し
た。"Means for Solving the Problem" In order to achieve the above object, the present invention uses a urethane resin coating that is applied to the circuit board and cured in a nitrogen atmosphere mixed with conductive metal powder on the lζ pattern land. a process of coating the electronic component on the circuit board (6) in order to connect the pattern land and the lead or electrode of the electronic component via the paint; The paint was placed on the circuit board in a nitrogen-based atmosphere and cured.
「実施例」
以下、本発明の構成を図面を参照しながら説明する。第
1図乃至第4図に本発明の実施例に係る回路基板への電
子部品の実装方法の工程図を示す。"Example" Hereinafter, the configuration of the present invention will be described with reference to the drawings. 1 to 4 show process diagrams of a method for mounting electronic components on a circuit board according to an embodiment of the present invention.
第1図においで、回路基板1の実装面には電子部品5の
リード6に対応するパターンランド2が設けられている
。前記回路岳板1のパターンランド2上にはシルクスク
リーン或いはステンレススクリーン等によって第2図の
ようにニッケル系の導電性金属粉4を混入したアンモニ
ア、アミン等のチッソ系雰囲気で硬化するウレタン樹脂
系塗料3を塗布し、続いて第3図のように前記回路V板
1上に前記パターンランド2の所定位置にリード6が接
触するように前記電子部品5を搭載する。この段階では
前記塗料3は未硬化状態にあり前記金属粉4はけん局状
態となっている。前記電子部品5が前記回路基板1上に
搭載され、第4図のように電子部品5のリード6が前記
塗料3を介してパターンランド2と電気的に接続された
状態で、ユニット全体をアンモニア、アミン等のチッソ
系雰囲気中に置いて塗143を硬化させる。この塗料3
の硬化状態では第5図のように、混入された金属粉4は
ベヒクルとの比重差により沈下し、即ちパターンランド
2上に!1!積し、同パターンランド2とリード6との
導通性を確保し、同時に塗料3中の揮発分は揮発し、ベ
ヒクルの不揮発分は金属粉4上を覆い安定被膜7となる
。In FIG. 1, pattern lands 2 corresponding to leads 6 of electronic components 5 are provided on the mounting surface of a circuit board 1. As shown in FIG. On the pattern land 2 of the circuit board 1, a urethane resin that is cured in a nitrogen atmosphere such as ammonia or amine mixed with nickel-based conductive metal powder 4 is applied using a silk screen or a stainless steel screen as shown in FIG. A paint 3 is applied, and then the electronic component 5 is mounted on the circuit V board 1 so that the leads 6 are in contact with predetermined positions of the pattern lands 2, as shown in FIG. At this stage, the paint 3 is in an uncured state, and the metal powder 4 is in a fixed state. With the electronic component 5 mounted on the circuit board 1 and the lead 6 of the electronic component 5 electrically connected to the pattern land 2 via the paint 3 as shown in FIG. 4, the entire unit is heated with ammonia. The coating 143 is cured by placing it in a nitrogen-based atmosphere such as amine or the like. This paint 3
In the hardened state, as shown in FIG. 5, the mixed metal powder 4 sinks due to the difference in specific gravity with the vehicle, that is, onto the pattern land 2! 1! At the same time, the volatile content in the paint 3 evaporates, and the non-volatile content of the vehicle covers the metal powder 4 to form a stable film 7.
なお、上記実施例では電子部品5としてリード6を有す
るものについて説明したが、これに限定されるものでは
なく、例えば、電極を右するチップ部品であっても同様
に適用することができる。In the above embodiment, an electronic component 5 having a lead 6 has been described, but the present invention is not limited to this, and the present invention can be similarly applied to a chip component having electrodes, for example.
この場合、塗料の硬化状態においては、パターンランド
と電極とはl′FR性金属粉によって電気的に接続され
、両者の導電性が確保されると同時に、回路基板とチッ
プ部品とは同チップ部品の搭載によりパターンランドよ
り垂れたベクヒルの不揮発分による被膜によって接着さ
れる。In this case, in the cured state of the paint, the pattern land and the electrode are electrically connected by the l'FR metal powder, ensuring conductivity between the two, and at the same time, the circuit board and the chip component are connected to the same chip component. When the pattern land is mounted, it is bonded by a non-volatile coating of Bexhill that hangs down from the pattern land.
「効果」
以上のように、本発明に係る回路基板への電子部品実装
方法は、回路基板に設けたパターンランド上に、導電性
金属粉を混入したチッソ系雰囲気で硬化するウレタン樹
脂系塗料を塗布する工程と、前記パターンランドと電子
部品のリード或いは電極とを前記塗料を介して接続する
ために、同電子部品を前記回路基板上に搭載する工程と
、前記電子部品が前記回路基板上に搭載された状態で前
記塗料をチッソ系雰囲気中に置いて硬化させる工程とか
らなり、常温下での実装を可能としたものであるから、
従来のもののように高温の半円槽、高温の加熱炉を必要
とせず、従って、基板の8利や実装する電子部品が限定
されるようなこともなく、汎用性を有し、しかも、作業
環境を悪化さIるようなことのない実装方法を提供する
ことができる。"Effects" As described above, the method of mounting electronic components on a circuit board according to the present invention uses a urethane resin paint mixed with conductive metal powder and cured in a nitrogen atmosphere on the pattern land provided on the circuit board. a step of coating the electronic component on the circuit board in order to connect the pattern land and a lead or electrode of the electronic component via the paint; and a step of mounting the electronic component on the circuit board. It consists of a step of placing the paint in a nitrogen-based atmosphere while it is mounted and curing it, making it possible to implement it at room temperature.
It does not require a high-temperature semicircular tank or a high-temperature heating furnace like conventional ones, and therefore there are no limitations on the board size or the electronic components that can be mounted, making it versatile and easy to work with. It is possible to provide an implementation method that does not degrade the environment.
第1図乃至第4図は本発明による回路基、板への電子部
品の実装方法の工程を示すを説明図、第5図は実装状態
を示す断面図である。
同図中、1は回路基板、2はパターンランド、3は塗お
1.4は金属粉、5は電子部品、6はリード、7は被膜
である。1 to 4 are explanatory diagrams showing the steps of a method for mounting electronic components on a circuit board or board according to the present invention, and FIG. 5 is a sectional view showing the mounting state. In the figure, 1 is a circuit board, 2 is a pattern land, 3 is a coating 1.4 is a metal powder, 5 is an electronic component, 6 is a lead, and 7 is a coating.
Claims (1)
を混入したチッソ系雰囲気で硬化するウレタン樹脂系塗
料を塗布する工程と、前記パターンランドと電子部品の
リード或いは電極とを前記塗料を介して接続するために
、同電子部品を前記回路基板上に搭載する工程と、前記
電子部品が前記回路基板上に搭載された状態で前記塗料
をチッソ系雰囲気中に置いて硬化させる工程とからなる
回路基板への電子部品実装方法。A step of applying a urethane resin paint mixed with conductive metal powder and hardened in a nitrogen atmosphere on pattern lands provided on a circuit board, and connecting the pattern lands and leads or electrodes of electronic components via the paint. A circuit comprising the steps of: mounting the electronic component on the circuit board in order to connect the electronic component; and curing the paint by placing the paint in a nitrogen-based atmosphere while the electronic component is mounted on the circuit board. How to mount electronic components onto a board.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21814388A JPH0266996A (en) | 1988-08-31 | 1988-08-31 | Method of mounting electronic component on circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21814388A JPH0266996A (en) | 1988-08-31 | 1988-08-31 | Method of mounting electronic component on circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0266996A true JPH0266996A (en) | 1990-03-07 |
Family
ID=16715316
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP21814388A Pending JPH0266996A (en) | 1988-08-31 | 1988-08-31 | Method of mounting electronic component on circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0266996A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100404632C (en) * | 2004-10-26 | 2008-07-23 | 帕纳塞姆株式会社 | Conductive paint compositions and methods of forming conductive coatings on substrates |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5222770A (en) * | 1975-08-13 | 1977-02-21 | Seikosha Kk | Method of mounting circuit parts on circuit board |
-
1988
- 1988-08-31 JP JP21814388A patent/JPH0266996A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5222770A (en) * | 1975-08-13 | 1977-02-21 | Seikosha Kk | Method of mounting circuit parts on circuit board |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100404632C (en) * | 2004-10-26 | 2008-07-23 | 帕纳塞姆株式会社 | Conductive paint compositions and methods of forming conductive coatings on substrates |
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