JPH0266015U - - Google Patents

Info

Publication number
JPH0266015U
JPH0266015U JP14579288U JP14579288U JPH0266015U JP H0266015 U JPH0266015 U JP H0266015U JP 14579288 U JP14579288 U JP 14579288U JP 14579288 U JP14579288 U JP 14579288U JP H0266015 U JPH0266015 U JP H0266015U
Authority
JP
Japan
Prior art keywords
signal
circuit
mixer
local oscillation
attenuator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14579288U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14579288U priority Critical patent/JPH0266015U/ja
Publication of JPH0266015U publication Critical patent/JPH0266015U/ja
Pending legal-status Critical Current

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Landscapes

  • Superheterodyne Receivers (AREA)
  • Transmitters (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案による周波数変換回路の特性
補正回路をブロツクの形で示した概略構成図、第
2図および第3図はこの考案による周波数変換回
路の特性補正回路の動作を説明するための入力I
F信号、局部発振信号、出力信号およびスプリア
ス信号の関係を説明する図である。 1……IF入力端子、2……可変減衰器、3…
…ミキサー、4……局部発振回路、5……PLL
、6……フイルタ回路、8……信号出力端子。
FIG. 1 is a schematic block diagram showing the characteristic correction circuit of the frequency conversion circuit according to this invention in the form of a block, and FIGS. 2 and 3 are diagrams for explaining the operation of the characteristic correction circuit of the frequency conversion circuit according to this invention. Input I
FIG. 3 is a diagram illustrating the relationship among an F signal, a local oscillation signal, an output signal, and a spurious signal. 1...IF input terminal, 2...variable attenuator, 3...
...Mixer, 4...Local oscillation circuit, 5...PLL
, 6... Filter circuit, 8... Signal output terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] IF入力信号が供給されるIF入力端子とミキ
サーとの間に挿入された可変減衰器と、上記ミキ
サーと信号出力端子との間に挿入された所定周波
数の出力信号を選択的に通過させるフイルタ回路
と、上記ミキサーに局部発振信号を供給する局部
発振回路と、該局部発振回路の発振周波数を制御
するPLL回路とを具備し、該PLL回路の出力
制御電圧により、出力信号に影響を及ぼす可能性
のあるスプリアス信号が発生する上記出力信号が
生成される場合は上記減衰器の減衰度を大きくし
、然らざる場合は上記減衰器の減衰度を小さくす
るように制御することを特徴とする周波数変換回
路の特性補正回路。
A variable attenuator inserted between an IF input terminal to which an IF input signal is supplied and a mixer, and a filter circuit inserted between the mixer and a signal output terminal to selectively pass an output signal of a predetermined frequency. and a local oscillation circuit that supplies a local oscillation signal to the mixer, and a PLL circuit that controls the oscillation frequency of the local oscillation circuit, and the output control voltage of the PLL circuit may affect the output signal. If the output signal that generates a certain spurious signal is generated, the attenuation of the attenuator is increased; otherwise, the attenuation of the attenuator is decreased. Characteristic correction circuit for conversion circuit.
JP14579288U 1988-11-08 1988-11-08 Pending JPH0266015U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14579288U JPH0266015U (en) 1988-11-08 1988-11-08

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14579288U JPH0266015U (en) 1988-11-08 1988-11-08

Publications (1)

Publication Number Publication Date
JPH0266015U true JPH0266015U (en) 1990-05-18

Family

ID=31414694

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14579288U Pending JPH0266015U (en) 1988-11-08 1988-11-08

Country Status (1)

Country Link
JP (1) JPH0266015U (en)

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