JPH0264615A - Defect correcting method for active matrix panel - Google Patents

Abstract

PURPOSE:To easily fix a defect short circuit part and to correct a linear defect by lighting a panel and applying a constant-voltage whose MOS capacities are P type and an N type and above and below an inversion threshold voltage, respectively to a data line or a scanning line containing a short circuit part. CONSTITUTION:A constant-voltage whose MOS capacities are a P type and an N type and above and below an inversion threshold voltage, respectively is applied to a data line or a scanning line containing a short circuit part. That is, when a liquid crystal panel is lighted, a vertical line defect can be discriminated by a pin hole 14. When a horizontal line of the short circuit part is known, the short circuit part can be fixed. Therefore, the data line having a vertical line defect is, for instance, grounded. Since only a common line 7 having a short circuit part is drawn to a ground level, the MOS capacity made by the common line 7 becomes about 1/10 of its original capacity, therefore, the horizontal line containing the common line 7 having a short circuit part becomes black to some extent, comparing with other horizontal line and displayed in a half tone display state of a negative type. Accordingly, it becomes clear that there is a short circuit part in an intersection of both liens.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for correcting line defects in active matrix panels.

[Prior Art] Active matrix panels in which thin film transistors are arranged on a glass substrate are used as flat panel displays such as liquid crystal televisions.

FIG. 3 is an equivalent circuit diagram of an active matrix panel. This diagram shows data line 1 (or source line) S
It shows the situation in the vicinity of the Gi row of the scanning line 2 (or gate line) in the j column. 3 is a thin film transistor, 4 is a liquid crystal capacitor, and 5 is a pixel charge storage capacitor. The ◯ marks indicate the counter electrodes 6, which are connected in common. One side electrode of the pixel charge storage capacitor No. 5 is a common line 7 (Ci),
Connected to surroundings. Therefore, the data on the data line 1 is written into the liquid crystal capacitor and the pixel charge holding capacitor via the thin film transistor, and the charge is held until the next data is written.

FIG. 4 is a plan view of a schematic structure when a MOS type capacitor is used as a pixel charge storage capacitor based on the equinodal circuit of FIG. 3. FIG. 5 is a cross-sectional view taken along line a-a' in FIG. 4.

1' is a source line, 2' is a gate line, 3' is a thin film transistor, and 7' is a common line. The manufacturing process will be explained as follows. First, on the transparent glass substrate 8,
A polycrystalline silicon thin film 9 is deposited and patterned to form the source, train, and channel regions of the thin film transistor and the electrodes of the MOS type pixel charge storage capacitor.Then, the gate insulating film 10 and the MOS capacitor are formed by thermal oxidation. Next, a low resistance impurity-doped polycrystalline silicon thin film or metal thin film is deposited and patterned to form the gate electrode 11 and gate #Jii2'.
, a common line 7' is formed, and phosphorus atom ions are implanted and annealed to form the source and drain regions and the electrodes of the pixel charge storage capacitor. In this case, the drain electrode and the electrode of the pixel charge storage capacitor are connected by a polycrystalline silicon thin film. After depositing the glabella insulating film 12 on the 0th order, a transparent conductive film is deposited on the 0th order with an opening like a contact hole. Then, metal thin films such as the pixel electrode 13 and A1 are deposited to form the source line 1'.

Through the above steps, an N-channel thin film transistor is formed. Therefore, when a positive voltage that sufficiently causes an inversion state compared to the source and drain regions is applied to the gate electrode 11, the thin film transistor is turned on. Similarly, when a positive voltage that sufficiently causes an inversion state is applied to the common line 7', a sufficient pixel charge storage capacitance is formed.

FIG. 6 is a graph showing changes in the above N-type MO3 pixel charge storage capacitor depending on the common line potential.
In the above case, a capacitance corresponding to the overlap between the polycrystalline silicon and the common line is generated, and at a voltage near O or at a negative voltage, only a small capacitance corresponding to the overlap between the area where the phosphorus atom ions are implanted (approximately 1 μm width) and the common line is generated. Does not occur. Therefore, if the width of the common line 7' is about 10 μm, at the inversion voltage vth or more,
The pixel charge retention capacity is 1 compared to near 0 voltage or negative voltage.
When the driving area of one pixel is small (that is, high-definition type), which is about 0 times, the liquid crystal capacitance is small and stable display cannot be changed, so if the above-mentioned MOS type pixel charge storage capacitor is configured, When the inversion voltage is higher than vth, a capacity 2 to 3 times the liquid crystal capacity can be obtained even in a small area, so the aperture ratio is hardly reduced, and this is effective in improving image quality.

[Problems to be Solved by the Invention] However, by providing the above-mentioned common line, new display defects occur. It is the common line 7 in Figure 4.
' and data line 1' form a pinhole 1 in the glabella insulating film 12.
4, etc., and a short circuit occurs. In the case of a negative display using a TN type liquid crystal, the pixels connected to the data line 1' including the short-circuited part are turned on due to the influence of the common line potential in the gray display state of the intermediate tone, so line defects in the vertical line are caused. Occur. However, the potential of the common line rarely drops significantly below the inversion voltage even when it is connected to the data line, and line defects on horizontal lines are likely to occur. An inconvenience occurs that cannot be corrected.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a method for easily finding the defective short-circuit location and correcting the line defect.

[Means for Solving the Problems] A method for correcting defects in an active matrix panel according to the present invention includes a plurality of data line groups arranged in parallel and a plurality of scanning line groups arranged in parallel orthogonal to the data line group. A thin film transistor is arranged at the intersection of the data line group and the scanning line group, a gate electrode and a source electrode of the thin film transistor are connected to the scanning line and the data line, respectively, and a drain electrode of the thin film transistor is connected to the scanning line and the data line, respectively. , an active matrix substrate comprising a pixel electrode, a dielectric film sandwiched therebetween, a common line forming a MOS capacitor and connected to an opposing semiconductor thin film electrode, and a counter electrode facing the active matrix substrate. In a method for correcting a line defect caused by a short circuit between a data line or a scanning line and a common line in an active matrix panel formed by sealing a liquid crystal between it and a counter substrate, the panel is turned on, and the data line or the scan line including the short circuit is turned on. In the scanning line, the MOS capacitor is P type,
It is characterized in that it is an N type, and a constant voltage above and below an inversion threshold voltage is applied, a common line short-circuited with the data line or the scanning line is found, and the short-circuited part is cut and separated with a laser beam.

[Function] This will be explained using FIGS. 4 and 6. If the liquid crystal panel is turned on, vertical line defects can be identified by pinholes 14. If you know the horizontal line of the short circuit, you can fix the short circuit. For this purpose, the data line with the vertical line defect is grounded, for example. Since only the common line 7' where the short circuit is located is connected to the ground level, the MOS capacity created by the common line 7' is about 1/10 of the original capacity, so the horizontal line including the common line 7' where the short circuit is However, in the negative halftone display state, it appears slightly blacker than the other horizontal lines.

Therefore, it is clear that there is a short circuit at the intersection of both lines.

[Embodiment] FIG. 1 shows an equivalent circuit diagram of a first embodiment of the present invention. This shows a case where the data line Sj and the common line Ci are short-circuited due to the pinhole 14 in the glabella insulating film as described above. FIG. 2 shows a signal waveform for driving a panel with N-type thin film transistors open. Due to the short circuit, the data line Sj is almost at the potential VG of the common line.
(usually 15 to 20 µ for N-MO3 type), so in negative type (two polarizing plates are in parallel) black and white display using TN liquid crystal, halftone display (usually video amplitude of about 3 V) When set to , the vertical Sj line lights up white. However, since the potential of the common line does not change significantly even if it is pulled by a data line signal, a sufficient MOS capacitance is ensured and horizontal line defects do not occur. When the needle is brought into contact with the end of the Sj line and grounded, the Sj line continues to light up in white, while the potential of the common line Ci is drawn to the ground potential, so the common lI
The MOS capacitance near the short circuit on C1 drops to 1/10< or so, and a black line appears from the periphery. Therefore, record the address, cut and separate the common line or data line at both ends near the short-circuit point using a laser beam, and connect the separated and floating signal line around the periphery with an external terminal to ground the wiring.
In this figure, the data line is set to the ground potential, but the same can be said as long as it is at a constant potential below the inversion threshold voltage of the MOS capacitor.

Furthermore, if the MOS capacitor is P type, a constant voltage equal to or higher than the inversion threshold voltage may be applied.

Normally, the inversion threshold voltage of MOS capacitor is 5-10V for N type.
, about -5 to -10 V for P type.

FIG. 7 is an equivalent circuit diagram showing the second embodiment. 1st
The difference from the diagram is that the common line is arranged parallel to the data line, and in this case a short circuit occurs between the common line and the scanning line. FIG. 8 is a plan view showing the actual schematic structure of the equivalent circuit of FIG. 7. The structure shown in FIG. 8 is basically the fourth line, except that the scanning line 2' is separated and connected to the data line 1' using the same material through a contact hole.
Since it is the same as the figure, the manufacturing method will be omitted. When the scanning line 2' and the common line 7' are short-circuited due to the pinhole 14 in the glabella insulating film in FIG. do.

However, vertical line defects do not occur.Similar to the first embodiment, when a needle is placed on the scanning line containing the short circuit and grounded, the potential of the common line containing the short circuit is drawn to the ground potential.
The MOS capacitance near the short circuit on the common line decreases to 1/lo<or so, and appears as a darker line than the surrounding area.

Therefore, if you check that address, you will have found the short circuit, and you will need to make the corrections described above.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to easily find a short circuit between a common line and a data line or a scanning line.
It has the advantage of being easy to modify. Rather than grounding the data line or scan line containing the short circuit with a needle,
If a thin film transistor switch that can switch between a data signal and a ground potential is provided in the periphery in advance, work efficiency will be further improved.

[Brief explanation of the drawing]

FIG. 1 is an equivalent circuit diagram showing a first embodiment of the present invention. FIG. 2 is a diagram showing waveforms of each signal line when driving the active matrix panel. FIG. 3 is a conventional equivalent circuit diagram, FIG. 4 is a plan view of its schematic structure, and FIG. 5 is a sectional view taken along the line a-a' in FIG. 4. FIG. 6 is a graph showing the voltage dependence of the pixel charge retention N-type MO3 capacitance. FIG. 7 is an equivalent circuit diagram showing a second embodiment of the present invention, and FIG. 8 is a plan view of its schematic structure. 1.1' 2, 2 ′ 3, 3 ′ 4 ・ ・ ・ 5 ・ ・ ・ 6 ・ ・ ・ 7, 7゛8 ・ ・ ・ 9 ・ ・ ・ 10 ・ ・ ・ 11 ・ ・ ・ l 2 ・ ・ ・ ・3 ・ ・ ・ l 4 ・ ・ ・ Data threads (source line) Scanning line (gate line) Thin film transistor Liquid crystal capacitor Pixel charge storage capacitor Counter electrode Common line Glass substrate Polycrystalline silicon Thin film Gate Insulating film Gate electrode Insulating film between eyebrows Pixel electrode pin Hole No. 5, No. 21 side #-41 No. 6, No. 6 Salary: 81g

Claims (1)

[Claims] It consists of a plurality of data line groups arranged in parallel and a plurality of scanning line groups arranged in parallel orthogonal to the data line group, and a thin film transistor is arranged at the intersection of the data line group and the scanning line group. , a gate electrode and a source electrode of the thin film transistor are connected to the scan line and the data line, respectively;
an active matrix substrate in which a drain electrode of the thin film transistor is connected to an opposing semiconductor thin film electrode by forming a MOS capacitor with a pixel electrode and a common line across a dielectric film, and the active matrix substrate; In a method for correcting a line defect due to a short circuit between a data line or a scanning line and a common line in an active matrix panel in which a liquid crystal is sealed between a counter substrate having a counter electrode facing each other, the panel is turned on and the Applying a constant voltage equal to or higher than the inversion threshold voltage or lower than the inversion threshold voltage to the data line or scanning line including the short-circuited point when the MOS capacitor is P type or N type, respectively;
A method for correcting defects in an active matrix panel, characterized in that a common line short-circuited with the data line or scanning line is found, and the short-circuited part is cut and separated using a laser beam.