JPH0264248U - - Google Patents

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Publication number
JPH0264248U
JPH0264248U JP14475288U JP14475288U JPH0264248U JP H0264248 U JPH0264248 U JP H0264248U JP 14475288 U JP14475288 U JP 14475288U JP 14475288 U JP14475288 U JP 14475288U JP H0264248 U JPH0264248 U JP H0264248U
Authority
JP
Japan
Prior art keywords
signal
level
output
stop
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14475288U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14475288U priority Critical patent/JPH0264248U/ja
Publication of JPH0264248U publication Critical patent/JPH0264248U/ja
Pending legal-status Critical Current

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  • Mobile Radio Communication Systems (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例に係るページング用
送信装置の構成ブロツク図、第2図は起動/停止
信号が正常な場合のタイムチヤート、第3図は起
動/停止信号が呼出信号の送出を終了したにも拘
らず起動状態となつた異常時のタイムチヤート、
第4図は従来のページング用送信装置の構成ブロ
ツク図、第5図は従来装置の動作タイムチヤート
を示し、同図aは起動/停止信号が正常な場合の
タイムチヤート、同図bは呼出信号の送出を終了
したにも拘らず起動状態となつた異常時のタイム
チヤートである。 1……送信機制御装置、2……送信機、3……
制御部、4……送信部、9,10……単安定マル
チバイブレータ、12……論理和回路、13……
インバータ回路、14……フリツプフロツプ回路
、15……論理積回路、27……空中線。
Figure 1 is a configuration block diagram of a paging transmitter according to an embodiment of the present invention, Figure 2 is a time chart when the start/stop signal is normal, and Figure 3 is when the start/stop signal is used to send out a calling signal. Time chart in case of abnormality when the program is started even though it has finished,
FIG. 4 is a block diagram of the configuration of a conventional paging transmitter, and FIG. 5 is an operation time chart of the conventional device. FIG. 4a shows a time chart when the start/stop signal is normal, and FIG. This is a time chart at the time of an abnormality in which the device was activated even though the transmission of the device had finished. 1... Transmitter control device, 2... Transmitter, 3...
Control unit, 4... Transmission unit, 9, 10... Monostable multivibrator, 12... OR circuit, 13...
Inverter circuit, 14... flip-flop circuit, 15... AND circuit, 27... antenna.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 所定符号長の2値パルス信号列からなる呼出信
号と、この呼出信号の送出有無およびその期間を
示す2値のレベル信号であつて一方のレベルが起
動信号、他方のレベルが停止信号となる起動/停
止信号とを出力する送信機制御装置と;間欠的に
起動とその停止の制御を受けるものであつてその
起動期間内に入力された前記呼出信号で変調増幅
処理等を施して無線呼出信号を形成出力する送信
部と、入力信号レベルが前記一方のレベルに対応
したレベルのとき送信部を起動させ入力信号レベ
ルが前記他方のレベルに対応したレベルのとき送
信部を停止させる制御部とを有する送信機と;で
構成されるページング用送信装置において;前記
送信機は、前記呼出信号の各パルス信号の立ち上
がりに応答して所定幅のパルスを出力する再トリ
ガ可能な第1の単安定マルチバイブレータと;前
記呼出信号の各パルス信号の立ち下がりに応答し
て所定幅のパルスを出力する再トリガ可能な第2
の単安定マルチバイブレータと;前記第1および
第2のマルチバイブレータの各出力信号の論理和
操作をする論理和回路と;前記起動/停止信号の
停止信号から起動信号への変化に応答して出力レ
ベルを前記一方のレベルに対応したレベルとしそ
の出力レベルを前記論理和回路の出力状態変化に
応答して反転させるフリツプフロツプ回路と;前
記起動/停止信号に対応した信号と前記フリツプ
フロツプ回路の出力信号との論理積操作をし前記
制御部に対する前記入力信号を形成出力する論理
積回路と;を備えることを特徴とするページング
用送信装置。
A calling signal consisting of a binary pulse signal train of a predetermined code length, and a binary level signal indicating whether or not this calling signal is sent and its duration, one level being a start signal and the other level being a stop signal. / a transmitter control device that outputs a stop signal; which is intermittently controlled to start and stop, and performs modulation and amplification processing on the call signal input during the start period to generate a radio call signal; a transmitting section that forms and outputs a signal, and a control section that starts the transmitting section when the input signal level is a level corresponding to the one level and stops the transmitting section when the input signal level is a level corresponding to the other level. A paging transmitting device comprising: a transmitter having a retriggerable first monostable multiplier that outputs a pulse of a predetermined width in response to a rising edge of each pulse signal of the paging signal; a retriggerable second vibrator that outputs a pulse of a predetermined width in response to the falling edge of each pulse signal of the calling signal;
a monostable multivibrator; an OR circuit that performs an OR operation on each output signal of the first and second multivibrator; and an output in response to a change in the start/stop signal from a stop signal to a start signal. a flip-flop circuit whose level corresponds to the one level and whose output level is inverted in response to a change in the output state of the OR circuit; a signal corresponding to the start/stop signal and an output signal of the flip-flop circuit; and an AND circuit that performs an AND operation to form and output the input signal to the control section.
JP14475288U 1988-11-05 1988-11-05 Pending JPH0264248U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14475288U JPH0264248U (en) 1988-11-05 1988-11-05

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14475288U JPH0264248U (en) 1988-11-05 1988-11-05

Publications (1)

Publication Number Publication Date
JPH0264248U true JPH0264248U (en) 1990-05-15

Family

ID=31412732

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14475288U Pending JPH0264248U (en) 1988-11-05 1988-11-05

Country Status (1)

Country Link
JP (1) JPH0264248U (en)

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