JPH0263144U - - Google Patents

Info

Publication number
JPH0263144U
JPH0263144U JP14211988U JP14211988U JPH0263144U JP H0263144 U JPH0263144 U JP H0263144U JP 14211988 U JP14211988 U JP 14211988U JP 14211988 U JP14211988 U JP 14211988U JP H0263144 U JPH0263144 U JP H0263144U
Authority
JP
Japan
Prior art keywords
trace
function
circuit emulator
model
trace memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14211988U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14211988U priority Critical patent/JPH0263144U/ja
Publication of JPH0263144U publication Critical patent/JPH0263144U/ja
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案に係るインサーキツトエミユレ
ータの一実施例を示す要部構成図、第2図は動作
フローを示す図である。 1……システムCPU、2……システムメモリ
、4……トレースメモリ、5……バス制御回路、
6……バスマルチプレクサ、7……ターゲツトC
PU。
FIG. 1 is a block diagram of a main part of an embodiment of an in-circuit emulator according to the present invention, and FIG. 2 is a diagram showing an operation flow. 1... System CPU, 2... System memory, 4... Trace memory, 5... Bus control circuit,
6...Bus multiplexer, 7...Target C
P.U.

Claims (1)

【実用新案登録請求の範囲】 ターゲツトCPUが実行した命令やそのアドレ
ス等を追跡してこれをトレースメモリに記録し、
後でそのトレース内容を読み出して適宜の処理を
行なつた後CRT表示画面に表示し解析すること
ができるように構成されたインサーキツトエミユ
レータにおいて、 トレースメモリに格納されたトレースデータを
逆アセンブルする機能を有する手段と、 コンパイラの出力するシンボル・アドレス情報
とシンボル・型情報の2つから得られるアドレス
・型情報を予めテーブル化して用意しておきテー
ブルを参照して前記逆アセンブルによつて得られ
たデータを型に従つた形式に変換する機能を有す
る手段 とを具備したことを特徴とするインサーキツトエ
ミユレータ。
[Scope of claim for utility model registration] Tracking instructions executed by the target CPU, their addresses, etc., and recording them in a trace memory,
The trace data stored in the trace memory is disassembled by an in-circuit emulator configured so that the trace contents can be read out later, processed appropriately, and then displayed on a CRT display screen for analysis. A means having a function of 1. An in-circuit emulator comprising: means having a function of converting obtained data into a format according to a model.
JP14211988U 1988-10-31 1988-10-31 Pending JPH0263144U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14211988U JPH0263144U (en) 1988-10-31 1988-10-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14211988U JPH0263144U (en) 1988-10-31 1988-10-31

Publications (1)

Publication Number Publication Date
JPH0263144U true JPH0263144U (en) 1990-05-11

Family

ID=31407794

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14211988U Pending JPH0263144U (en) 1988-10-31 1988-10-31

Country Status (1)

Country Link
JP (1) JPH0263144U (en)

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