JPH0262944B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a glass-covered semiconductor chip such as a diode chip in which a pn junction exposed in a groove is covered with glass.

[Conventional technology]

As typical methods for manufacturing glass-coated diode chips, the method shown in FIG. 7 and the method shown in FIG. 8 are known. In the method shown in FIG.
As shown in FIG. A, a silicon substrate 1 is prepared in which an n type region 3 is provided on an n ⁺ type substrate region 2 by epitaxial growth. Next, boron is diffused to form the p ⁺ type region 4, and gold is further diffused as a lifetime killer. This makes it possible to construct a rectifier diode with high-speed switching characteristics ^.
A substrate 1 having a n−n ⁺ three-layer structure is obtained. After the three-layer structure is formed, the thickness of each region is as ^follows :
20μm, n-type region 3 is 20μm, n ⁺ type substrate region 2 is
It is 240 μm. In this diode, the withstand voltage is determined by reach-through breakdown (a breakdown phenomenon induced when the depletion layer extending mainly from the p-n junction 5 to the n-type region 3 reaches the n ⁺ -type region 2 when a reverse voltage is applied). The specific resistance and thickness of the n-type region 3 are designed so that

Next, as shown in FIG. 7B, a groove 6 reaching the n ⁺ type region 2 is formed by etching using a hydrofluoric acid-nitric acid mixed acid, and a pn junction 5 is formed on the side wall of this groove 6.
expose.

Next, as shown in FIG. 7C, a glass coating layer 7 made of PbO-based passivation glass is formed on one main surface of the silicon substrate 1 having the grooves 6. The glass coating layer 7 is formed using an electrophoresis method (glass powder suspended in a solution is charged and placed in the solution), which can form a glass layer with a relatively uniform thickness even on an uneven surface. The glass powder is attached to the substrate 1 using a method in which an electric field is generated in the solution using the silicon substrate as one electrode, and the glass powder is attached to the silicon substrate just like electroplating, and then heat treatment is applied. It is formed by applying and firing the glass powder.

Next, as shown in FIG. 7D, the glass coating layer 7 is etched with a mixed acid of hydrofluoric acid and hydrochloric acid to form openings 8 for electrodes.

Next, as shown in FIG. 7E, Ni electrodes 9 and 10 are formed on the exposed silicon surface of the substrate 1 by electroless plating.
form. Thereafter, the substrate 1 is cut at the bottom of the groove 6 to complete the diode chip 11a.

On the other hand, in another conventional method shown in FIG.
First, as shown in FIG. 8A, as in the case of FIG. 7A, a silicon substrate 1 consisting of an n ⁺ type substrate region 2, an n type region 3, and a p ⁺ type region 4 is prepared, and a silicon substrate 1 is thoroughly oxidized. SiO ₂ films 12 and 13 are formed using the following method.

Next, as shown in FIG. 8B, grooves 6 similar to those in FIG. 7B are provided.

Next, as shown in FIG. 8C, a glass coating layer 7 is formed by electrophoresis. In the electrophoresis method, since almost no glass powder adheres to the SiO ₂ films 12 and 13, which are insulating films, the glass coating layer 7 is selectively formed in the groove 6. In addition, adjacent to the groove 6
The glass coating layer 7 is also formed around the SiO ₂ film 12 due to the edge electric field concentration effect in the electrophoresis method.

Next, as shown in FIG. 8D, the SiO ₂ film 12 is etched away using a hydrofluoric acid-based etching solution, leaving only the peripheral portion, to form an opening 8 for the electrode. At this time, the SiO ₂ film 13 on the lower surface of the substrate 1 is also removed.

Next, as shown in FIG. 8E, electrodes are formed and then cut and separated in the grooves 6 to complete the diode chip 11b.

[Problem that the invention seeks to solve]

By the way, in the conventional method shown in Fig. 7, p ⁺
Although the glass coating layer 7 is thickly formed on the upper surface of the mold region, the glass coating layer 7 is formed relatively thinly on the surface of the groove 6, which is important as a passivation film. Therefore, in order to form a sufficiently thick glass coating layer 7 in the groove 6 without pinholes etc.,
This results in forming more glass coating layer 7 on the upper surface of p ⁺ type region 4 than necessary. Therefore, the glass material is wasted and the working time for glass coating is extended.

On the other hand, according to the conventional method shown in FIG. 8, the problems of the method shown in FIG. 7 are solved. However, it has been found that in diode products using the chip 11b manufactured by the method shown in FIG. 8, a phenomenon in which the withstand voltage deteriorates during application of a reverse voltage (hereinafter referred to as bias deterioration) is likely to occur. Bias deterioration occurs when reverse voltage is applied.
This was observed more significantly in the reach-through breakdown type product than in the non-reach-through breakdown type product, which is designed so that the depletion layer extending from the p-n junction 5 breaks down before reaching the n ⁺ type region 2. Also,
This often occurred when the n ⁺ type region 4 was shallow.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a method for easily manufacturing a glass-coated semiconductor chip having excellent reverse direction characteristics and reliability.

[Means for solving problems]

In order to solve the above-mentioned problems and achieve the above-mentioned objects, a method for manufacturing a glass-coated semiconductor chip according to the present invention includes a semiconductor substrate having at least one
forming a pn junction and forming an insulating film on the semiconductor substrate; forming a groove on one main surface of the semiconductor substrate to a depth that exposes the pn junction; and before forming the groove. or later, a step of removing the insulating film on the peripheral edge of the groove, and applying a protective glass coating thicker than the insulating film by electrophoresis to the surface of the groove and the peripheral edge of the groove from which the insulating film has been removed. Forming an opening surrounded by the remainder of the glass covering layer by simultaneously or separately removing a part of the glass covering layer and the insulating film in the region surrounded by the groove. forming an electrode on the surface of the semiconductor substrate exposed by the opening; and cutting the semiconductor substrate at the groove or outside the groove.

[Effect]

In the method of the present invention, the glass coating layer is not formed on the entire surface of one main surface of the semiconductor substrate.
Compared to the conventional method shown in Figure 7, there is less waste of glass material and the work time for glass coating is shorter.
Since there is no insulating film on the periphery of the groove, defects in reverse direction characteristics such as bias deterioration are less likely to occur compared to the conventional method shown in FIG.

〔Example〕

Next, a method of manufacturing a glass-covered diode chip according to an embodiment of the present invention will be explained with reference to FIGS. 1 to 5.

First, as shown in FIG. 1A, the n ⁺ type substrate region 2
SiO ₂ is thermally oxidized on one and the other main surfaces of a silicon substrate 1 consisting of an n-type region 3 and a p ⁺ -type region 4.
A structure having films 12 and 13 is formed in the same manner as in FIG. 8A.

Next, as shown in FIG. 1B, a shallow groove 14 is formed on the upper surface of the substrate 1 by etching using a hydrofluoric acid-nitric acid mixed acid, and at the same time, a shallow marker line groove 15 is formed on the lower surface of the substrate 1. form. The groove 14 on the top surface is formed by removing a part of the p ⁺ type region 4,
Since the purpose is to remove the SiO ₂ film 12, it is formed sufficiently shallow so as not to expose the pn junction 5. Note that this groove 14
The SiO ₂ film 14 is formed in an annular shape so that it remains in an island shape. The grooves 15 on the lower surface provide marker lines for cutting the plurality of substrates 1 into chips.

Next, as shown in Figure 1C and Figure 2, hydrofluoric acid-
By etching using a nitric acid mixed acid, a deep groove 6 reaching the n ⁺ type region 2 is formed in the shallow groove 14, and the pn junction 5 is exposed. Groove 6, 14, 1
5 is formed in a net shape so as to correspond to the divisions of individual diode chips in the silicon wafer.
Therefore, the SiO ₂ film 12 remains in the form of an island, and the grooves 6, 1
It is surrounded by 4 in a ring.

Next, as shown in FIG. 1D, a glass coating layer 7 is formed on the surfaces of the grooves 6 and 14 by electrophoresis. As in FIG. 8C, on the SiO ₂ film 12,
Almost no glass coating layer 7 is formed except for the peripheral area. In the process of attaching glass powder by electrophoresis, isopropyl alcohol is used as the solution, and ammonia or a dedicated surfactant is used as the electrolyte that imparts an electric charge to the glass powder.

Next, as shown in FIG. 1E, the peripheral portion (part) of the glass coating layer 7 is selectively etched away using a mixed acid of hydrofluoric acid and hydrochloric acid, and at the same time, the entire SiO ₂ film 12 is also etched away. An opening 8 is formed for the purpose. At the same time, the SiO ₂ film 13 on the bottom surface of the substrate 1
Also removed by etching.

Next, as shown in FIGS. 1F and 2, the substrate 1
Ni is deposited in the opening 8 of the remaining portion 7a of the glass coating layer 7 on the top surface and on the bottom surface of the substrate 1 by electroless plating.
After forming the electrodes 9 and 10, the substrate 1 is cut along the groove 15 as a marker line and separated into individual diode chips 11c.

When the diode chip 11c is manufactured by the method shown in FIGS. 1 to 3, the glass powder is attached only to the groove 6 and its periphery, so there is less waste of glass material and the working time for attaching the glass powder is short. . Furthermore, since the thickness of the peripheral edge of the remaining glass coating layer 7a, that is, the peripheral edge of the opening 8, is thinner than in the case of the conventional method shown in FIG. 7, the conventional method shown in FIG. There is. Also,
Since no SiO ₂ film 12 remains, there are fewer defects in the reverse direction, and in particular, bias deterioration is significantly reduced, which is clearly superior to the conventional example shown in FIG. 8 in terms of characteristics and reliability.

Although the reason for the decrease in reverse direction defects is not clearly understood, we believe that it is as follows. In the case of the conventional diode chip 11b shown in FIG _. 4, which shows a part of _FIG .
Residual strain exists near the interface between 2 and the p ⁺ type region 4 due to the difference in their thermal expansion coefficients. This residual strain occurs concentrated at the end portion 12a of the SiO ₂ film 12,
The influence of residual strain on the silicon crystal becomes stronger in the vicinity of region 16, and when the influence of residual strain extends to the pn junction, a reverse failure mode appears. In particular, since the region 16 is located at the corner of the boundary between the main surface and the side surface of the silicon crystal, the silicon crystal is easily affected by residual strain, and there is a high probability that the p-n junction 5 will be affected by the residual strain. Moreover, it has a large effect on characteristic fluctuations.
The surface of the groove 6 including the exposed part 5a of the p-n junction 5 is SiO ₂
Since it is close to the end 12a of the film, there is a high probability that it will be affected by residual strain. In addition, Na present in the SiO ₂ film 12
The influence of electrostatic potential caused by positive charges such as ions also tends to reach the surface of the groove 6, contributing to the reverse failure mode.

On the other hand, in the case of the diode chip 11c shown in FIG. 5, which is an enlarged view of a part of FIG. 1F, the SiO ₂ film 12 is removed. Therefore, there is no adverse effect of the residual strain or charge, and the occurrence of reverse failure mode is reduced accordingly.

[Modified example]

The present invention is not limited to the embodiments described above, and the following modifications are possible, for example.

(a) The SiO ₂ film 1 in the portion corresponding to the groove 14 is removed without forming the groove 14 and etching down to the p ⁺ type region 4.
It is also possible to remove only the portion 2 by etching as shown in FIG. 6, and provide this portion, the surface of the groove 6, and the remaining portion 7a of the glass coating layer, thereby producing a diode chip 11d as shown in FIG. However, in this case, the etching of the SiO ₂ film 12 cannot be performed at the same time as the process of forming the grooves 15.
In the case of forming a photoresist, one photoetching process (a series of selective etching processes including photoresist application, exposure, development, etching, and photoresist removal) is added.

(b) The step of etching the grooves 14 or the step of etching away the SiO ₂ film 12 corresponding to the grooves 14 as shown in FIG. 6 may be performed after the step of forming the deep grooves 6.

(c) Although we have shown an example in which an epitaxial wafer is used as the silicon substrate 1, p ^{+ -n} regions are formed on an n ^- type substrate by impurity diffusion.
A −n ⁺ three-layer diode structure may also be fabricated.

(d) The present invention can also be applied to transistors and thyristors other than diodes. Furthermore, the present invention has achieved a remarkable improvement effect in the case of a type of semiconductor chip whose breakdown voltage is defined by reach-through breakdown. It can also be applied to chips.

〔Effect of the invention〕

As is clear from the above, according to the present invention, the incidence of reverse direction failures such as bias deterioration is significantly reduced. Furthermore, glass-coated semiconductor chips with excellent reverse direction characteristics and reliability can be manufactured with high productivity and manufacturing yield.

[Brief explanation of drawings]

1A to 1F are cross-sectional views for explaining the manufacturing process of a glass-coated diode chip according to one embodiment of the present invention, and FIG. 2 is a plan view showing the substrate surface in a process corresponding to FIG. 1C. Figure 3 is Figure 1F
4 and 5 are enlarged cross-sectional views of a part of FIG. 8E and FIG. 1F, respectively, to explain the operation and effect, and FIG. A cross-sectional view showing a glass-coated diode chip according to a modified example, FIGS. 7A to 7E are cross-sectional views for explaining the manufacturing process of a conventional glass-covered diode chip, and FIGS. 8A to E show another conventional glass-coated diode chip. FIG. 3 is a cross-sectional view for explaining the manufacturing process of the diode chip. DESCRIPTION OF SYMBOLS 1... Substrate, 3... N type region, 4... P ⁺ type region, 5... Pn junction, 6... Groove, 7... Glass coating layer, 8... Opening, 9... Electrode, 12... … _SiO2
Membrane, 14... Shallow groove.

Claims (1)

[Claims] 1. A step of forming at least one pn junction on a semiconductor substrate and forming an insulating film on the semiconductor substrate, and forming a depth on one main surface of the semiconductor substrate to expose the pn junction. forming a groove in the groove, and removing the insulating film at the periphery of the groove before or after forming the groove; and applying electricity to the surface of the groove and the periphery of the groove from which the insulating film has been removed. forming a protective glass coating layer that is thicker than the insulating film by a migration method; and removing a portion of the glass coating layer and the insulating film in the area surrounded by the groove simultaneously or separately, forming an opening surrounded by the remainder of the glass coating layer; forming an electrode on the surface of the semiconductor substrate exposed by the opening; A method for manufacturing a glass-coated semiconductor chip, comprising the step of cutting a glass-coated semiconductor chip. 2. The step of forming the groove and removing the insulating film includes forming a shallow groove having a depth that does not expose the pn junction, thereby removing the insulating film so that the insulating film remains in an island shape. 2. The method of manufacturing a glass-covered semiconductor chip according to claim 1, comprising the steps of: removing the pn junction; and forming a deep groove having a depth to expose the pn junction in the shallow groove. 3. The step of forming the groove and removing the insulating film includes: removing only the insulating film so that the insulating film remains in an island shape; and forming the pn junction in the region from which the insulating film is removed. 2. A method of manufacturing a glass-covered semiconductor chip according to claim 1, further comprising the step of forming a groove to expose a glass-covered semiconductor chip.