JPH026221B2 - - Google Patents

Info

Publication number
JPH026221B2
JPH026221B2 JP16064281A JP16064281A JPH026221B2 JP H026221 B2 JPH026221 B2 JP H026221B2 JP 16064281 A JP16064281 A JP 16064281A JP 16064281 A JP16064281 A JP 16064281A JP H026221 B2 JPH026221 B2 JP H026221B2
Authority
JP
Japan
Prior art keywords
silicon film
single crystal
oxygen
crystal silicon
polycrystalline silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP16064281A
Other languages
Japanese (ja)
Other versions
JPS5860544A (en
Inventor
Hirozo Takano
Takayuki Matsukawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP16064281A priority Critical patent/JPS5860544A/en
Publication of JPS5860544A publication Critical patent/JPS5860544A/en
Publication of JPH026221B2 publication Critical patent/JPH026221B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering

Description

【発明の詳細な説明】 この発明はレーザアニールによつて多結晶シリ
コンから単結晶シリコンへと構造変換された薄膜
内のプロセス誘起欠陥、重金属汚染などの効果的
にゲツターする新規な方法に関するものである。
[Detailed Description of the Invention] This invention relates to a novel method for effectively getting rid of process-induced defects, heavy metal contamination, etc. in a thin film whose structure has been converted from polycrystalline silicon to single-crystalline silicon by laser annealing. be.

レーザアニール技術はデバイスパターンの微細
化に対応して、多結晶シリコン膜の低抵抗化(粒
径制御によつて)、シリコン基板裏面へレーザ照
射し積極的に転位を導入してシリコン基板内のバ
ルク微小欠陥や重金属ゲツターする、異種金属間
の相互反応促進・合金化・シリサイド化、多結晶
シリコンの単結晶シリコン化をはかるなどをはじ
めとして幅広い応用が期待され、基礎技術の開発
が活発にされている。
In response to the miniaturization of device patterns, laser annealing technology lowers the resistance of polycrystalline silicon films (by controlling the grain size) and actively introduces dislocations by irradiating the backside of the silicon substrate with a laser. It is expected to have a wide range of applications, including removing bulk micro defects and heavy metal getters, promoting mutual reactions between dissimilar metals, alloying, and silicidation, and converting polycrystalline silicon to single-crystal silicon, and the development of basic technology is being actively carried out. ing.

ところで、多結晶シリコンをレーザアニールで
融溶し単結晶化させる場合、大きな問題点が発生
する。これはビームアニール後に多数誘起される
転位群であり、アニール雰囲気からの重金属汚染
である。レーザアニールで形成された単結晶シリ
コン膜の表面に微細なデバイスを高密度に配置
し、かつ絶縁膜を介して単結晶シリコン膜を三次
元的に重層構造で重ね合わせ、それらを電気的に
相互結線して有機的に動作させる機能を有する新
しいデバイスを実現させるうえで上記の問題点の
解決は重要な技術的課題である。
However, when polycrystalline silicon is melted and made into a single crystal by laser annealing, a major problem occurs. This is a group of dislocations that are induced in large numbers after beam annealing, and is heavy metal contamination from the annealing atmosphere. Microscopic devices are arranged at high density on the surface of a single-crystal silicon film formed by laser annealing, and the single-crystal silicon films are stacked three-dimensionally in a layered structure via an insulating film, and they are electrically connected to each other. Solving the above-mentioned problems is an important technical issue in realizing new devices that have the ability to connect and operate organically.

従来、プロセス誘起欠陥、重金属汚染などデバ
イスの電気的特性を著しく低下させるものをデバ
イスの活性領域から効果的に除去する方法とし
て、シリコン単結晶基板の裏面へSiO2粒子を衝
突させる、シリコンに比べ硬度の高い材料で裏面
を機械的に研削する、イオンを注入するなどで意
識的に裏面へ加工歪み、転位を導入し、これらの
結晶欠陥でデバイスの活性領域に存在する微小欠
陥、汚染を捕獲するなどの手段が講じられてき
た。しかし、これらの方法はシリコン単結晶基板
内のデバイスに対しては有効であるがSiO2
Al2O3、Si3N4などの絶縁膜上に形成された2層
目以上の単結晶シリコン膜内の結晶欠陥、重金属
汚染に対しては全く効果が無いことは明らかであ
る。
Conventionally, as a method to effectively remove process-induced defects, heavy metal contamination, and other substances that significantly deteriorate the electrical characteristics of devices from the active region of devices, SiO 2 particles are bombarded onto the back surface of a silicon single crystal substrate. By mechanically grinding the back surface of a hard material or by implanting ions, processing distortions and dislocations are intentionally introduced to the back surface, and these crystal defects capture micro defects and contamination that exist in the active region of the device. Measures have been taken to: However, these methods are effective for devices in silicon single crystal substrates, but SiO 2 ,
It is clear that this method is completely ineffective against crystal defects and heavy metal contamination in the second and higher layers of single crystal silicon films formed on insulating films such as Al 2 O 3 and Si 3 N 4 .

また、シリコン単結晶の代表的育成方法である
チヨクラルスキー(CZ)法ではるつぼとして石
英で内張りされたグラフアイト材を用いることか
ら石英の構成元素である酸素がシリコン融液中に
溶けこみ、結果的に酸素が過剰に固溶したシリコ
ン単結晶ができ上る。この酸素はシリコンウエハ
の高温熱処理プロセスの過程で積層欠陥、析出物
へと変質しCCDの画像欠陥、ダイナミツクRAM
のリフレツシユ不良、接合耐圧の低下などをもた
らすので一般的には嫌われた存在である。しか
し、この酸素を逆に活用して酸素析出物をゲツタ
サイトとして活性領域の無欠陥化をはかるいわゆ
るイントリンシツクゲツタリング法が注目をあび
るに及び、酸素の利点が一転してクローズアツプ
されている。しかしこのイントリンシツクゲツタ
リング法は単結晶シリコン中に酸素が固溶限であ
る4.15×1017atoms/cm3以上含有されていてはじ
めてウエハプロセス適用可となる方法であつて、
極低酸素濃度であるFZ(Floatiny Zone)シリコ
ン結晶には本来適さないことは言うまでもない。
In addition, since the Czyochralski (CZ) method, which is a typical growth method for silicon single crystals, uses a graphite material lined with quartz as a crucible, oxygen, which is a constituent element of quartz, dissolves into the silicon melt. As a result, a silicon single crystal containing an excessive amount of oxygen is formed. This oxygen transforms into stacking faults and precipitates during the high-temperature heat treatment process of silicon wafers, resulting in CCD image defects and dynamic RAM.
It is generally disliked because it causes refresh failure and a reduction in junction breakdown voltage. However, the so-called intrinsic gettering method, which utilizes this oxygen to make the active region defect-free by using oxygen precipitates as getter sites, has been attracting attention, and the benefits of oxygen have changed and become more popular. . However, this intrinsic gettering method is a method that can only be applied to wafer processes when oxygen is contained in single crystal silicon at 4.15×10 17 atoms/cm 3 or more, which is the solid solubility limit.
Needless to say, it is not originally suitable for FZ (Floatiny Zone) silicon crystals, which have extremely low oxygen concentrations.

イントリンシツクゲツタリングの物理的メカニ
ズムを考えれば、既に述べた絶縁膜上の単結晶シ
リコン膜も酸素フリーでありFZ結晶のケースと
同様に単純にイントリンシツクゲツタリングを採
用するわけにはいかない。
Considering the physical mechanism of intrinsic gettering, the single-crystal silicon film on the insulating film mentioned above is also oxygen-free, so it is not possible to simply adopt intrinsic gettering as in the case of FZ crystals. .

本発明は既に詳細に述べた従来のデバイス形成
技術の難点を克服するためになされたもので、絶
縁膜上に形成された単結晶シリコン膜においても
ゲツタリングの効果をもたせることのできる新し
いゲツタリング方法を提供することを目的として
いる。
The present invention has been made in order to overcome the difficulties of the conventional device formation techniques already described in detail, and has developed a new gettering method that can produce a gettering effect even in a single crystal silicon film formed on an insulating film. is intended to provide.

以下、この発明の一実施例について図で説明す
る。第1図において、シリコン単結晶基板1に接
して形成された絶縁膜2の上に多結晶シリコン膜
3がデポジシヨンされている。この多結晶シリコ
ン膜3へ高ドーズの酸素イオン4、ここでは同位
体存在比の高い 16Oを全面に均一に注入する。
次いで第2図の如く多結晶シリコン膜3へ高出力
のレーザ5、たとえばCWのArレーザやYAG
(Nd)レーザを光学的に細く絞つて全面に照射す
る。これに伴ない多結晶シリコン膜3は単結晶シ
リコン膜6へと構造変換されるとともに既に注入
されていた酸素イオンは単結晶シリコン膜6内へ
と均一に拡散される。更に、第3図の如く上述の
単結晶シリコン膜6へ、単結晶化の条件とは異な
る出力のレーザ5′を同様に照射する。これによ
つて単結晶シリコン膜の最表面に存在していた酸
素は雰囲気中へ外部拡散され酸素フリーの領域7
が単結晶シリコン膜6の表面に形成される。最後
に第4図の如く単結晶シリコン膜を600〜800℃の
非酸化性雰囲気で低温アニールし、単結晶シリコ
ン膜6内に酸素析出物を核とした微小欠陥発生領
域8と無欠陥領域9を同時に形成する。このよう
に、デバイスが形成される活性領域のみを無欠陥
化し、もし活性領域に極微小の残留結晶欠陥が新
たに発生したり、重金属汚染があつても内部に高
密度に発生させた微小欠陥でこれらを効果的にゲ
ツタできる。
Hereinafter, one embodiment of the present invention will be described with reference to the drawings. In FIG. 1, a polycrystalline silicon film 3 is deposited on an insulating film 2 formed in contact with a silicon single crystal substrate 1. As shown in FIG. A high dose of oxygen ions 4, here 16 O having a high isotope abundance ratio, are uniformly implanted into this polycrystalline silicon film 3 over the entire surface.
Next, as shown in FIG. 2, a high-power laser 5, such as a CW Ar laser or a YAG laser, is applied to the polycrystalline silicon film 3.
(Nd) Laser is optically narrowed and irradiated to the entire surface. Along with this, the polycrystalline silicon film 3 is structurally converted into a single-crystalline silicon film 6, and the oxygen ions that have already been implanted are uniformly diffused into the single-crystalline silicon film 6. Furthermore, as shown in FIG. 3, the above-mentioned single crystal silicon film 6 is similarly irradiated with a laser 5' having an output different from the conditions for single crystallization. As a result, the oxygen existing on the outermost surface of the single crystal silicon film is diffused into the atmosphere and oxygen-free region 7
is formed on the surface of single crystal silicon film 6. Finally, as shown in FIG. 4, the single-crystal silicon film is annealed at a low temperature in a non-oxidizing atmosphere at 600 to 800°C, and the single-crystal silicon film 6 has micro-defect generation regions 8 and defect-free regions 9 with oxygen precipitates as nuclei. are formed at the same time. In this way, only the active region where the device is formed is made defect-free, and even if microscopic residual crystal defects newly occur in the active region or there is heavy metal contamination, the micro defects generated in a high density inside the active region can be eliminated. You can get these effectively.

なお上記実施例では多結晶シリコンを単結晶化
させる熱源としてレーザを用いたが、代りに電子
ビームを適用しても同様の効果は得られる。
In the above embodiment, a laser was used as a heat source for converting polycrystalline silicon into a single crystal, but the same effect can be obtained by using an electron beam instead.

以上のように本発明によれば、三次元素子を構
成する単結晶シリコン層のゲツタリングも可能と
なりデバイス特性の向上が一段と容易となる。
As described above, according to the present invention, gettering of the single crystal silicon layer constituting the tertiary element becomes possible, making it easier to improve device characteristics.

【図面の簡単な説明】[Brief explanation of drawings]

第1図〜第4図は本発明の一実施例を説明する
ための概略断面図である。 図において、1はシリコン単結晶板、2は絶縁
膜、3は多結晶シリコン膜、4は酸素イオン、
5,5′はレーザ、6は単結晶シリコン膜、7は
酸素が外部拡散した単結晶シリコン膜、8は微小
欠陥発生領域、9は無欠陥領域である。
1 to 4 are schematic sectional views for explaining one embodiment of the present invention. In the figure, 1 is a silicon single crystal plate, 2 is an insulating film, 3 is a polycrystalline silicon film, 4 is an oxygen ion,
5 and 5' are lasers, 6 is a single-crystal silicon film, 7 is a single-crystal silicon film in which oxygen is diffused to the outside, 8 is a micro-defect generation area, and 9 is a defect-free area.

Claims (1)

【特許請求の範囲】[Claims] 1 レーザアニールによつて多結晶シリコン膜か
ら単結晶シリコン膜へと構造変換された薄膜内の
プロセス誘起欠陥、重金属汚染などをゲツタリン
グする方法において、レーザアニールする前に多
結晶シリコン膜に所望の加速電圧で酸素イオンを
注入する工程、レーザを上記多結晶シリコン膜に
照射するとともに、多結晶を単結晶化させ、かつ
固溶限以上の酸素を単結晶シリコン膜内に拡散さ
せる工程、レーザを上記単結晶シリコン膜の極表
面に照射し前記の酸素を外部拡散させる工程、上
記単結晶シリコン膜を600〜800℃の非酸化性雰囲
気で低温アニールし単結晶シリコン膜の表面に無
欠陥層を形成させる工程を含むことを特徴とする
結晶欠陥のゲツタリング法。
1 In a method for gettering process-induced defects, heavy metal contamination, etc. in a thin film whose structure has been converted from a polycrystalline silicon film to a single-crystalline silicon film by laser annealing, a desired acceleration is applied to the polycrystalline silicon film before laser annealing. A step of implanting oxygen ions with a voltage, a step of irradiating the polycrystalline silicon film with a laser, converting the polycrystal into a single crystal, and diffusing oxygen in an amount exceeding the solid solubility limit into the single crystal silicon film, A process of irradiating the extreme surface of the single crystal silicon film and diffusing the oxygen to the outside, and annealing the single crystal silicon film at a low temperature in a non-oxidizing atmosphere at 600 to 800°C to form a defect-free layer on the surface of the single crystal silicon film. A gettering method for crystal defects, the method comprising the step of:
JP16064281A 1981-10-06 1981-10-06 Gettering method for crystal defect Granted JPS5860544A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16064281A JPS5860544A (en) 1981-10-06 1981-10-06 Gettering method for crystal defect

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16064281A JPS5860544A (en) 1981-10-06 1981-10-06 Gettering method for crystal defect

Publications (2)

Publication Number Publication Date
JPS5860544A JPS5860544A (en) 1983-04-11
JPH026221B2 true JPH026221B2 (en) 1990-02-08

Family

ID=15719342

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16064281A Granted JPS5860544A (en) 1981-10-06 1981-10-06 Gettering method for crystal defect

Country Status (1)

Country Link
JP (1) JPS5860544A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0795550B2 (en) * 1986-02-04 1995-10-11 富士通株式会社 Semiconductor device
JPH10256261A (en) * 1997-03-12 1998-09-25 Nec Corp Manufacture of semiconductor device

Also Published As

Publication number Publication date
JPS5860544A (en) 1983-04-11

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