JPH0258358A - Substrate for mounting electronic component - Google Patents

Substrate for mounting electronic component

Info

Publication number
JPH0258358A
JPH0258358A JP63209972A JP20997288A JPH0258358A JP H0258358 A JPH0258358 A JP H0258358A JP 63209972 A JP63209972 A JP 63209972A JP 20997288 A JP20997288 A JP 20997288A JP H0258358 A JPH0258358 A JP H0258358A
Authority
JP
Japan
Prior art keywords
holes
resin composition
electronic component
wiring board
metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP63209972A
Other languages
Japanese (ja)
Other versions
JP2660295B2 (en
Inventor
Yoshitaka Ono
嘉隆 小野
Osamu Fujikawa
治 藤川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP63209972A priority Critical patent/JP2660295B2/en
Publication of JPH0258358A publication Critical patent/JPH0258358A/en
Application granted granted Critical
Publication of JP2660295B2 publication Critical patent/JP2660295B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Cooling Or The Like Of Electrical Apparatus (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PURPOSE:To improve heat dissipation and moisture resistance, and to simplify a structure by covering circuit board faces on both sides of a through hole with metal film layers in contact with a thermally conductive resin composition. CONSTITUTION:8 through holes 10 are opened at positions for placing an electronic component 93 on a circuit board 90. Many through holes 92 are opened at other positions Then, thermal conductive resin composition 20 to be described later is filled in the holes 10, and cured. Thereafter, the holes 92 are metal- plated to form a plating layer 91. In the case of metal plating, metal film layers 30 are so formed as to uniformly cover all the upper and lower faces of the holes 10. That is, the formation of the layer 91 of the holes 92 and the formation of the layer 30 are conducted by the same metal plating process. Thereafter, the component 93 adheres to the layer 30 on the board through adhesive 94 of silver paste, bonding wirings 98 are connected, and lead pins 96 are inserted into the holes 92.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体などの電子部品から発生する熱を効率
良く放敗さセることができる電子部品搭載用基板に関す
る。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a substrate for mounting electronic components that can efficiently dissipate heat generated from electronic components such as semiconductors.

〔従来技術〕[Prior art]

電子部品搭載用基板は、半導体などの電子部品を搭載す
ると共にその表面に導体回路を形成させるものである。A substrate for mounting electronic components is used to mount electronic components such as semiconductors and to form conductive circuits on the surface thereof.

しかして、該基板の基材としては。However, as a base material for the substrate.

合成樹脂を素材する配線板と、セラミンクスを素材とす
る配線板とがある。前者の合成樹脂製配線板は、セラミ
ンクス製配線板に比して、安価、軽量かつ加工容易性等
の点から優れている。There are wiring boards made of synthetic resin and wiring boards made of ceramics. The former synthetic resin wiring board is superior to ceramic wiring boards in terms of low cost, light weight, and ease of processing.

しかし１合成樹脂製配線板はセラミンクス製のそれに比
して熱伝導率が約１００分の１程度と非常に低い、その
ため１合成樹脂製配線板は、高熱を発する半導体素子の
搭載用としては適さない。However, the thermal conductivity of wiring boards made of 1 synthetic resin is very low, about 1/100 of that of wiring boards made of ceramics, and therefore wiring boards made of synthetic resin 1 are not suitable for mounting semiconductor elements that generate high heat. do not have.

そこで２放熱性向上のためにヒートシンクを用いた基板
が提案されている（例えば、特開昭６０１３６３４８号
公報）。この基板は、第４図に示すごとく、配線板９０
に搭載した電子部品９３の下方に、金属製のヒートシン
ク８１を配設したものである。電子部品９３とヒートシ
ンク８１とは接着剤９４により、また、配線板９０とヒ
ートシンク８１とは接着剤８２によりそれぞれ接合され
ている。なお、配線板９０に設けたスルーホール９２及
びその周辺には銅等のめっき層９１により導体回路が形
成されている。また、スルーホール９２にはめっき層９
１を介してリードビン９６の頭部が挿置されている。ま
た、符号９８は１ボンデイングワイヤーである。なお１
図示していないが、電子部品９３の外周は湿気侵入防止
のために樹脂封止が行われる。Therefore, a substrate using a heat sink has been proposed in order to improve heat dissipation (for example, Japanese Patent Laid-Open No. 60136348). This board includes a wiring board 90 as shown in FIG.
A metal heat sink 81 is disposed below an electronic component 93 mounted on the device. The electronic component 93 and the heat sink 81 are bonded to each other by an adhesive 94, and the wiring board 90 and the heat sink 81 are bonded to each other by an adhesive 82. Note that a conductor circuit is formed in and around the through hole 92 provided in the wiring board 90 by a plating layer 91 of copper or the like. In addition, the through hole 92 is coated with a plating layer 9.
The head of the lead bin 96 is inserted through the lead bin 96 . Further, the reference numeral 98 is one bonding wire. Note 1
Although not shown, the outer periphery of the electronic component 93 is sealed with resin to prevent moisture from entering.

また、第５図に示すごとく、配線板９０の下方に凹所９
７を設け、咳凹所９７内にヒートシンク８３を配置し、
該ヒートシンク８３の上面に電子部品９３を接着剤９２
により接合した基板も提案されている。この基板の製造
においては、まず配線板９０の下方に凹所９７を設け、
その中に接着剤８４を介してヒートシンク８３を配置し
て、これらをプレスして一体となす。更に、配線板９０
における電子部品搭載部分に上方より切削加工を施し、
ヒートシンク８３の上面を露出させ、その後スルーホー
ル９２及びヒートシンク８３の裏面にめっき層９１を施
す。そして、ヒートシンク８３上に電子部品９３を接合
する。その他は、上記第４図の場合と同様である。Further, as shown in FIG. 5, a recess 9 is provided below the wiring board 90.
7 is provided, a heat sink 83 is placed in the cough recess 97,
An electronic component 93 is attached to the upper surface of the heat sink 83 using an adhesive 92.
A substrate bonded by a method has also been proposed. In manufacturing this board, first, a recess 97 is provided below the wiring board 90,
A heat sink 83 is placed therein with an adhesive 84 interposed therebetween, and these are pressed into one piece. Furthermore, the wiring board 90
The part where the electronic components are mounted is machined from above,
The upper surface of the heat sink 83 is exposed, and then a plating layer 91 is applied to the through holes 92 and the back surface of the heat sink 83. Then, the electronic component 93 is bonded onto the heat sink 83. The rest is the same as in the case of FIG. 4 above.

［解決しようとする課題］ しかしながら、前者のヒートシンク８１を接合した基板
においては、金属製ヒートシンク８１の面積が大きいの
で放熱性には優れているが、ヒートシンク８１と配線板
９０との間は接着剤８２が介在しているので、気密性が
悪く５耐湿性に劣っている。つまり、接着剤８２の間か
ら電子部品９３の方向に湿気が侵入して、電子部品９が
劣化する。更に、ヒートシンク８１と配線板９０とを接
合している接着剤８２は、ヒートシンク８１との熱膨張
係数の差が大きいため、高温と低温間の温度サイクルに
よってヒートシンク８１が配線板９０から２．１１離し
易い。[Problem to be Solved] However, in the former substrate to which the heat sink 81 is bonded, the area of the metal heat sink 81 is large, so the heat dissipation is excellent, but there is no adhesive between the heat sink 81 and the wiring board 90. 82, the airtightness is poor and the moisture resistance is poor. That is, moisture enters the electronic component 93 from between the adhesives 82 and the electronic component 9 deteriorates. Furthermore, since the adhesive 82 that joins the heat sink 81 and the wiring board 90 has a large difference in coefficient of thermal expansion from the heat sink 81, the heat sink 81 is separated from the wiring board 90 by 2.11% due to the temperature cycle between high and low temperatures. Easy to release.

一方、後者の凹所９７内にヒートシンク８３を配設した
基板においては、前記のごとく、その製造に当り、配線
板９０に予め凹所９７を設け、ヒートシンク８３と配線
板９０とを接合し、その後電子部品搭載部分に切削加工
を施してヒートシンク８３の上面を露出させる等という
複雑かつ精密な加工を必要とする。また、そのためにコ
スト高となる。更には２　ヒートシンク８３の面積を電
子部品９３よりも大きく設けなければならない。On the other hand, in the case of the latter substrate in which the heat sink 83 is disposed in the recess 97, as described above, in manufacturing it, the recess 97 is provided in the wiring board 90 in advance, the heat sink 83 and the wiring board 90 are bonded, After that, complicated and precise processing is required, such as cutting the electronic component mounting portion to expose the upper surface of the heat sink 83. Moreover, this results in high costs. Furthermore, the area of the heat sink 83 must be larger than the area of the electronic component 93.

本発明は、かかる従来技術の問題点に鑑み、熱放散性、
耐湿性に優れ、かつコンパクトな電子部品搭載用基板を
提供しようとするものである。In view of the problems of the prior art, the present invention provides heat dissipation,
The present invention aims to provide a board for mounting electronic components that has excellent moisture resistance and is compact.

〔課題の解決手段〕[Means for solving problems]

本発明は５合成樹脂素材からなる配線板と、該配線板に
おいて電子部品搭載部に対応する位置に設けた貫通孔と
、該貫通孔内に充填した熱伝導性樹脂組成物とからなる
と共に、上記貫通孔の両側の配線板面上にはＥ記熱伝導
性樹脂組成物に接触させて金属被膜層をｖｌ、覆してな
ることを特徴とする電子部品搭載用基板にある。The present invention comprises a wiring board made of a synthetic resin material, a through hole provided in the wiring board at a position corresponding to an electronic component mounting part, and a thermally conductive resin composition filled in the through hole. The electronic component mounting substrate is characterized in that the wiring board surface on both sides of the through hole is covered with a metal coating layer in contact with the thermally conductive resin composition E.

本発明において、配線板の素材は、ビスマレイミド・ト
リアジン樹脂、耐熱エポキシ樹脂、フェノール樹脂、ポ
リイミド樹脂等の合成樹脂を用いる。これら合成樹脂は
８例えば紙基材、ガラス布基材等に含浸させた状態で配
線板として用いる。In the present invention, the material of the wiring board is a synthetic resin such as bismaleimide triazine resin, heat-resistant epoxy resin, phenol resin, or polyimide resin. These synthetic resins are used as a wiring board in a state in which they are impregnated into, for example, a paper base material, a glass cloth base material, or the like.

また、該配線板は１通常５その表面に銅箔層を形成した
銅張積層板を用いる。The wiring board is usually a copper-clad laminate having a copper foil layer formed on its surface.

また１貫通孔内に充填する熱伝導性樹脂組成物としては
、ポリイミド樹脂、エポキシ樹脂、フェノール樹脂等の
合成樹脂と、銅、銀等の全屈ｔ５）末とを混合したもの
で、熱伝導性の良い組成物を用いる。この組成物は、ペ
ースト状、或いは棒状固形物等の状態で用いる。また、
上記貫通孔は、配線板の上面から下面にかけて貫通して
おり、その孔の直径は０．１〜１０．０ｍｍとすること
が好ましい。貫通孔は、また、放熱性を高める上で複数
個設けることが好ましい。The thermally conductive resin composition filled in one through hole is a mixture of synthetic resin such as polyimide resin, epoxy resin, phenol resin, etc. and fully flexural T5) powder such as copper or silver. Use a composition with good properties. This composition is used in the form of a paste or a solid rod. Also,
The through hole penetrates from the upper surface to the lower surface of the wiring board, and preferably has a diameter of 0.1 to 10.0 mm. It is also preferable to provide a plurality of through holes in order to improve heat dissipation.

そして１貫通孔内に充填した熱伝導性樹脂組成物の上面
側５下面側には、該組成物の全表面を覆う金属被膜層を
設ける。即ち、複数の貫通孔がある場合には、これらの
全てを覆う金属被膜層を設ける。しかして、該金属被膜
層としては、実施例に示すごとく、配線板のスルーホー
ルに金属めっき層を形成する際に一緒に形成した金属め
っき層がある。また、該金属被膜層は、銅等の金属箔を
接合すること、更に該金属箔の上面及びその周辺の配線
板上面を覆う金属めっき層との２層からなる膜により構
成することもできる。そして２　ここに重要なことは、
金属被膜層は熱伝導性樹脂組成物の表面と熱的に充分に
接触しているこよである。A metal coating layer covering the entire surface of the thermally conductive resin composition filled in one through hole is provided on the upper surface side 5 and the lower surface side. That is, when there are a plurality of through holes, a metal coating layer is provided to cover all of them. As shown in the examples, the metal coating layer includes a metal plating layer formed together with the metal plating layer when forming the metal plating layer in the through hole of the wiring board. Further, the metal coating layer can be formed by bonding a metal foil such as copper, and further comprising a two-layer film including a metal plating layer covering the upper surface of the metal foil and the upper surface of the wiring board in the periphery thereof. 2. The important thing here is that
The metal coating layer is in sufficient thermal contact with the surface of the thermally conductive resin composition.

これは、電子部品の熱を効率的に配線板の四面へ放散さ
せるためである。また、温気が電子部品に侵入すること
を１釘止するためでイ）ある。This is to efficiently dissipate the heat of the electronic components to the four sides of the wiring board. Also, this is to prevent hot air from entering electronic components.

〔作用及び効果〕[Action and effect]

本発明の電子部品搭載用基板においては、電子部品搭載
部に対応する位置に貫通孔を設け、該貫通孔内に熱伝導
性の良い、熱伝導性樹脂組成物を充填し、その上下面に
金属被膜層を形成している。In the electronic component mounting substrate of the present invention, a through hole is provided at a position corresponding to the electronic component mounting portion, and a thermally conductive resin composition having good thermal conductivity is filled in the through hole, and the upper and lower surfaces of the through hole are filled with a thermally conductive resin composition having good thermal conductivity. Forms a metal coating layer.

そして、該熱伝導性樹脂組成物と上下面の金属被膜層と
は熱的に一体的に形成されている。そのため、電子部品
から発生する熱は、熱伝導性の良い金属被膜層、熱伝導
性樹脂組成物を通って２配線板裏面の金属被膜層より効
率的に外部へ放散される。The thermally conductive resin composition and the metal coating layers on the upper and lower surfaces are thermally integrally formed. Therefore, heat generated from the electronic component is efficiently dissipated to the outside from the metal coating layer on the back surface of the two-wiring board through the metal coating layer with good thermal conductivity and the thermally conductive resin composition.

また３貫通孔内の熱伝導性樹脂組成物の上下面は、金属
被Ｈり層によって被覆されているので、熱伝導性樹脂組
成物は完全密封された状態にあり外部から熱伝導性樹脂
組成物内へ湿気が侵入することがなく、電子部品を湿気
から遮断することができる。In addition, since the upper and lower surfaces of the thermally conductive resin composition in the 3 through holes are covered with a metal covering layer, the thermally conductive resin composition is in a completely sealed state, and the thermally conductive resin composition can be accessed from the outside. Moisture does not enter into the object, and electronic components can be shielded from moisture.

また１貫通孔内に充填した熱伝導性樹脂組成物が前記の
ごとく金属を含イイして導電性を存する場合には、該貫
通孔内はスルーホールのごとく金属めっきを施すことな
く導電性を確保できる。そのため、該樹脂組成物は例え
ば電気めっき用のリード線として利用したり、電子部品
搭載部と配線板裏面の回路パターンとを電気的に接続し
、ＧＮＤ（アース）ライン用、ＶＣＣ（電源）ライン用
の信号線としても利用することができる。In addition, if the thermally conductive resin composition filled in one through-hole contains a metal and is conductive as described above, the inside of the through-hole will not be conductive without metal plating like a through-hole. Can be secured. Therefore, the resin composition can be used, for example, as a lead wire for electroplating, or for electrically connecting the electronic component mounting area and the circuit pattern on the back of the wiring board, for GND (earth) line, VCC (power supply) line, etc. It can also be used as a signal line for other purposes.

更に、配線板への貫通孔の穴開加工は、電子部品の下面
の範囲内にのみ行えば良ぐ、前記従来のごとく電子部品
の下面面積よりも大きな面積のヒートンンク用貫通孔（
第４図）、ヒートシンク用四所（第５図）を設ける必要
がない、そのため貫通孔は電子部品の面積より小さい範
囲内に設けることができ、配線板上における配線の自由
度が向上する。Furthermore, it is only necessary to drill through holes in the wiring board within the range of the bottom surface of the electronic component.
(Fig. 4), there is no need to provide four heat sink locations (Fig. 5), and therefore the through holes can be provided within a range smaller than the area of the electronic component, improving the degree of freedom of wiring on the wiring board.

また、このように熱伝導性樹脂組成物を充填する貫通孔
も小さいので、コンパクトな配線板を用いることができ
、コンパクトな電子部品搭載用基板とすることができる
。Furthermore, since the through-holes filled with the thermally conductive resin composition are also small, a compact wiring board can be used, and a compact electronic component mounting board can be obtained.

また、金属被膜層として金属めっき層を用いる場合には
、該金属めっき層はスルーホールの金属めっき層と同時
に形成することができる。Further, when a metal plating layer is used as the metal coating layer, the metal plating layer can be formed at the same time as the metal plating layer of the through hole.

〔実施例〕〔Example〕

第１実施例 本例の電子部属搭載用基板につき、第１図及び第２Ｖを
用いて説明する。First Embodiment The electronic component mounting board of this example will be explained using FIG. 1 and FIG. 2V.

本例の電子部品搭載用基板は、配線板９０とそのほぼ中
央部に設けた８個の貫通孔１０と、該貫通孔１０内に充
填した熱伝導性樹脂組成物２０と１貫通孔の両側に配設
した金属被膜層３０とよりなる。The electronic component mounting board of this example includes a wiring board 90, eight through holes 10 provided approximately in the center thereof, a thermally conductive resin composition 20 filled in the through holes 10, and a thermally conductive resin composition 20 on both sides of the one through hole. It consists of a metal coating layer 30 disposed on.

該基板を製造するに当たっては、配線板９０において電
子部品９３を搭載する位置に、８個の貫通孔１０を穴開
加工した。また、他の位置には多数のスルーホール９２
を穴明加工した。次いで上記貫通孔ｌＯ内に後述する熱
伝導性樹脂組成物２０を充填し、硬化させた。In manufacturing the board, eight through holes 10 were drilled in the wiring board 90 at positions where electronic components 93 were to be mounted. In addition, there are many through holes 92 in other positions.
A hole was machined. Next, a thermally conductive resin composition 20, which will be described later, was filled into the through hole IO and cured.

その後、スルーホール９２に金属めっきを施しめっき層
９１を形成した。そして、この金属めっきの際に、第２
図に示すごとく、上記８個の貫通孔１０の上下両面が全
て一様に被覆されるよう。Thereafter, metal plating was applied to the through holes 92 to form a plating layer 91. Then, during this metal plating, the second
As shown in the figure, the upper and lower surfaces of the eight through holes 10 are all coated uniformly.

金属被ＨＮ３０を形成した。つまり、スルーホール９２
のめっき層９１の形成と、金属被膜層３０の形成とを同
じ金属めっき処理により行った。A metal covering HN30 was formed. In other words, through hole 92
The formation of the plating layer 91 and the formation of the metal coating layer 30 were performed by the same metal plating process.

その後、配線板上面の金属被膜層３０上に、ｌ！ペース
トの接着剤９４を介して電子部品９３を接合した。そし
て５ボンデイングワイヤー９８を接続し、スルーホール
９２内にリードピン９６を挿置した。Thereafter, l! Electronic components 93 were bonded via a paste adhesive 94. Then, a 5 bonding wire 98 was connected, and a lead pin 96 was inserted into the through hole 92.

上記において、配線ＦＪ、９０の素材としては、ビスマ
レイミド・トリアジン樹脂を紙基材に含浸させ、その表
面に銅箔を設けた銅張積層板を用いた。In the above, as the material for the wiring FJ, 90, a copper-clad laminate in which a paper base material is impregnated with a bismaleimide triazine resin and a copper foil is provided on the surface thereof is used.

また、を子部品９３は縦５　ｍ　、横１０Ｍの半導体素
子を用いた。ｉｊ通孔１０は、直径０．５ｍの孔を、そ
の中心間隔を２．５４ｍ取って、８個穿設した。熱伝導
性樹脂組成物２０としては、銅７０重世％とエポキシ樹
脂３０重量％を混合したペースト状のものを用い、これ
を貫通孔１０内に充填し、加熱硬化させた。該熱伝導性
樹脂組成物２０の熱伝導率は約５ＸｌＯ−’ｃａ　ｌ／
Ｃｌ１ｌ、ｓｅｃ。Further, as the child component 93, a semiconductor element having a length of 5 m and a width of 10 m was used. For the ij through holes 10, eight holes with a diameter of 0.5 m were bored with a center spacing of 2.54 m. The thermally conductive resin composition 20 was a paste mixture of 70% copper and 30% epoxy resin, which was filled into the through hole 10 and cured by heating. The thermal conductivity of the thermally conductive resin composition 20 is approximately 5XlO-'cal/
Cl1l, sec.

°Ｃであった。It was °C.

また、スルーホール９２のめっき層９Ｉ及び金属被膜層
３０の形成は、無電解銅めっき浴中に前記熱伝導性組成
物２０を充填した配線板９０を浸して行い、めっき厚み
を１０〜２０８ｍとした。Further, the formation of the plating layer 9I and the metal coating layer 30 of the through hole 92 is performed by immersing the wiring board 90 filled with the thermally conductive composition 20 in an electroless copper plating bath, and the plating thickness is set to 10 to 208 m. did.

また、金属被ｎり層３０は、第２図に示ずごと（上記熱
伝導性樹脂組成物２０を充填した８個の貫通孔１０の全
表面を一様に覆うように、縦１ｖｒｍ。Further, the metal covering layer 30 was formed as shown in FIG. 2 (with a vertical thickness of 1 Vrm so as to uniformly cover the entire surface of the eight through holes 10 filled with the thermally conductive resin composition 20).

横１２ＩＩＩａに形成した。また、金属被膜層３０の材
質は、スルーホール９２のめっき層９１と同様銅である
。また、金属被膜層３０と熱伝導性樹脂組成物２０と配
線板９０とは強固、気密に一体的に接合されていた。It was formed horizontally to 12IIIa. Further, the material of the metal coating layer 30 is copper, similar to the plating layer 91 of the through hole 92. Moreover, the metal coating layer 30, the thermally conductive resin composition 20, and the wiring board 90 were integrally joined firmly and airtightly.

本例の電子部品搭載用基板は、１−記のごとく構成され
ているので、電子部品９３で発生した熱は配線板上面の
金属被膜層３０．貫通孔１０内の熱伝導性樹脂組成物２
０．下面の金属被１１９．層３０を経て外部へ効率的に
放散させることができる。Since the electronic component mounting board of this example is configured as described in 1-, the heat generated by the electronic component 93 is transferred to the metal coating layer 30 on the upper surface of the wiring board. Thermal conductive resin composition 2 in through hole 10
0. Lower metal covering 119. It can be efficiently diffused to the outside through the layer 30.

また、熱伝導性樹脂組成物２０の−Ｅ下面は、金属被膜
層３０によって完全に密封されているので。Further, the -E lower surface of the thermally conductive resin composition 20 is completely sealed by the metal coating layer 30.

外部より湿気が侵入することがなく、電子部品を湿気か
ら遮断することができる。また１本例の熱伝導性樹脂組
成物２０は導電性を有するので、ＧＮＤライン用の信号
線として利用することもてきまた３貫通孔及び熱伝導性
樹脂組成物は、第２図に示すごと＜、電子部品９３の大
きさの範囲内に設ければ良いので、従来のごとく大きな
面積のヒートシンクを用いる必要はな（、電子部品搭載
用）！Ｅ仮全全体コンパクトになる。Moisture does not enter from the outside, and electronic components can be shielded from moisture. Furthermore, since the thermally conductive resin composition 20 of this example has electrical conductivity, it can also be used as a signal line for the GND line. ＜As long as it is provided within the size of the electronic component 93, there is no need to use a large-area heat sink like in the past (for mounting electronic components)! E The temporary whole becomes compact.

第２実施例 本例の電子部品搭載用基板は、第３Ｔ７２Ｊに示すごと
く、配線板９０の中央付近に凹所１５を設けこの中に電
子部品９３を配すると共に、下方に金属被膜層３０１貫
通孔１０．熱伝導性樹脂組成物２０、金属被膜層３０を
設けたものである。また。Second Embodiment As shown in No. 3T72J, the electronic component mounting board of this example has a recess 15 near the center of the wiring board 90, in which the electronic component 93 is placed, and a metal coating layer 301 penetrating the lower part. Hole 10. A thermally conductive resin composition 20 and a metal coating layer 30 are provided. Also.

配線板９０としては耐熱エボキン樹脂をガラス基布に含
浸させたものを用いた。その他は、第１実施例と同様で
ある６ 本例によれば、電子部品９３を凹所内に配したので、熱
伝導性樹脂組成物２０の長さが短くなり。As the wiring board 90, a glass base cloth impregnated with heat-resistant Evokin resin was used. The rest is the same as the first example.6 According to this example, since the electronic component 93 is placed in the recess, the length of the thermally conductive resin composition 20 is shortened.

放熱用の伝熱距離が短くなる。そのため、第１実施例と
同様の効果が得られる他３更に熱放散性が向上する。The heat transfer distance for heat dissipation becomes shorter. Therefore, in addition to obtaining the same effects as in the first embodiment, heat dissipation performance is further improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図及び第２図は第１実施例の電子部品搭載用基板を
示し、第１図はその断面図、第２図は一部切欠拡大裏面
図、第３図は第２実施例の電子部品搭載用基板の断面図
、第４図及び第５図は従来の電子部品搭載用基板の断面
図である。 １０゜ ２０゜ ３０゜ ９０゜ ９１゜ ９２゜ ９３゜ ８１゜ 貫通孔 熱伝導性樹脂組成物 金属被膜層 配線板 めっき層 スルーホール 電子部品 ３７１．ヒートシンク。1 and 2 show the electronic component mounting board of the first embodiment, FIG. 1 is a sectional view thereof, FIG. 2 is an enlarged rear view with a partially cut away part, and FIG. 4 and 5 are cross-sectional views of a conventional electronic component mounting board. 10° 20° 30° 90° 91° 92° 93° 81° Through hole Thermal conductive resin composition Metal coating layer Wiring board plating layer Through hole Electronic component 371. heat sink.

Claims (4)

【特許請求の範囲】[Claims] （１）合成樹脂素材からなる配線板と，該配線板におい
て電子部品搭載部に対応する位置に設けた貫通孔と，該
貫通孔内に充填した熱伝導性樹脂組成物とからなると共
に，上記貫通孔の両側の配線板面上には上記熱伝導性樹
脂組成物に接触させて金属被膜層を被覆してなることを
特徴とする電子部品搭載用基板。(1) Consisting of a wiring board made of a synthetic resin material, a through hole provided in the wiring board at a position corresponding to the electronic component mounting area, and a thermally conductive resin composition filled in the through hole, 1. A substrate for mounting electronic components, characterized in that the wiring board surfaces on both sides of the through hole are coated with a metal coating layer in contact with the thermally conductive resin composition. （２）第１請求項に記載の電子部品搭載用基板において
，熱伝導性樹脂組成物はポリイミド樹脂，エポキシ樹脂
，フェノール樹脂等の樹脂と，銅，銀等の金属粉末とを
混合した導電性樹脂組成物であることを特徴とする電子
部品搭載用基板。(2) In the electronic component mounting board according to claim 1, the thermally conductive resin composition is a conductive resin composition made of a mixture of resin such as polyimide resin, epoxy resin, phenol resin, and metal powder such as copper or silver. A substrate for mounting electronic components, characterized by being made of a resin composition. （３）第１請求項に記載の電子部品搭載用基板において
，金属被膜層は金属めっき層であることを特徴とする電
子部品搭載用基板。(3) The electronic component mounting board according to claim 1, wherein the metal coating layer is a metal plating layer. （４）第１請求項に記載の電子部品搭載用基板において
，金属被膜層は銅等の金属箔とその上面を被覆して配線
板面上まで施した金属めっき層とからなることを特徴と
する電子部品搭載用基板。(4) The electronic component mounting board according to claim 1, characterized in that the metal coating layer is composed of a metal foil such as copper and a metal plating layer covering the upper surface thereof and extending to the surface of the wiring board. A board for mounting electronic components.
JP63209972A 1988-08-24 1988-08-24 Substrate for mounting electronic components Expired - Lifetime JP2660295B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63209972A JP2660295B2 (en) 1988-08-24 1988-08-24 Substrate for mounting electronic components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63209972A JP2660295B2 (en) 1988-08-24 1988-08-24 Substrate for mounting electronic components

Publications (2)

Publication Number Publication Date
JPH0258358A true JPH0258358A (en) 1990-02-27
JP2660295B2 JP2660295B2 (en) 1997-10-08

Family

ID=16581730

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63209972A Expired - Lifetime JP2660295B2 (en) 1988-08-24 1988-08-24 Substrate for mounting electronic components

Country Status (1)

Country Link
JP (1) JP2660295B2 (en)

Cited By (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH045686U (en) * 1990-04-27 1992-01-20
EP0468379A2 (en) * 1990-07-21 1992-01-29 Mitsui Petrochemical Industries, Ltd. Semiconductor device having a package
JPH054576U (en) * 1991-06-26 1993-01-22 日本電気株式会社 Heat dissipation mounting structure for integrated circuits
EP0590354A1 (en) * 1992-09-29 1994-04-06 Robert Bosch Gmbh Device with a board, a heat sink and at least one power component
EP0723388A1 (en) * 1995-01-20 1996-07-24 Matsushita Electric Industrial Co., Ltd Printed circuit board
WO1996025763A3 (en) * 1995-02-15 1996-11-07 Ibm Organic chip carriers for wire bond-type chips
US5642261A (en) * 1993-12-20 1997-06-24 Sgs-Thomson Microelectronics, Inc. Ball-grid-array integrated circuit package with solder-connected thermal conductor
JPH09186272A (en) * 1995-08-16 1997-07-15 Anam Ind Co Inc Thin ball-grid array semiconductor package to which externally exposed heat sink is bonded
US5693572A (en) * 1993-12-20 1997-12-02 Sgs-Thomson Microelectronics, Inc. Ball grid array integrated circuit package with high thermal conductivity
US5805419A (en) * 1995-05-12 1998-09-08 Stmicroelectronics, Inc. Low-profile socketed packaging system with land-grid array and thermally conductive slug
US5856911A (en) * 1996-11-12 1999-01-05 National Semiconductor Corporation Attachment assembly for integrated circuits
KR100244965B1 (en) * 1997-08-12 2000-02-15 윤종용 Method for manufacturing printed circuit board(PCB) and ball grid array(BGA) package
US6043986A (en) * 1995-09-19 2000-03-28 Nippondenso Co., Ltd. Printed circuit board having a plurality of via-holes
WO2000049657A1 (en) * 1999-02-17 2000-08-24 Conexant Systems, Inc. Leadless chip carrier design and structure
WO2003010796A2 (en) 2001-07-26 2003-02-06 Conexant Systems, Inc. Structure and method for fabrication of a leadless chip carrier with embedded antenna
WO2003017324A2 (en) 2001-08-14 2003-02-27 Conexant Systems, Inc. Structure and method for fabrication of a leadless chip carrier with embedded inductor
JP2003060523A (en) * 2001-08-09 2003-02-28 Tdk Corp Radio communication module
WO2003019997A1 (en) * 2001-08-22 2003-03-06 Vanner, Inc. Improved heat sink for surface mounted power devices
US6611055B1 (en) 2000-11-15 2003-08-26 Skyworks Solutions, Inc. Leadless flip chip carrier design and structure
JP2004095586A (en) * 2002-08-29 2004-03-25 Denso Corp Electric apparatus and wiring board
US6867493B2 (en) 2000-11-15 2005-03-15 Skyworks Solutions, Inc. Structure and method for fabrication of a leadless multi-die carrier
US6960824B1 (en) 2000-11-15 2005-11-01 Skyworks Solutions, Inc. Structure and method for fabrication of a leadless chip carrier
JP2006524904A (en) * 2003-02-10 2006-11-02 スカイワークス ソリューションズ，インコーポレイテッド Semiconductor die package with reduced inductance and reduced die adhesive flow
JP2015195304A (en) * 2014-03-31 2015-11-05 京セラサーキットソリューションズ株式会社 Printed circuit board and manufacturing method of the same
JP2018006463A (en) * 2016-06-29 2018-01-11 京セラ株式会社 Substrate for mounting semiconductor device and semiconductor device
CN108093602A (en) * 2016-11-22 2018-05-29 三星显示有限公司 Display device
CN109089374A (en) * 2018-09-10 2018-12-25 北京四方继保自动化股份有限公司 A kind of PCB circuit board part heat dissipating method

Cited By (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH045686U (en) * 1990-04-27 1992-01-20
US6048754A (en) * 1990-07-21 2000-04-11 Mitsui Chemicals, Inc. Method of manufacturing a semiconductor device with an airtight space formed internally within a hollow package
EP0468379A2 (en) * 1990-07-21 1992-01-29 Mitsui Petrochemical Industries, Ltd. Semiconductor device having a package
US5343076A (en) * 1990-07-21 1994-08-30 Mitsui Petrochemical Industries, Ltd. Semiconductor device with an airtight space formed internally within a hollow package
JPH054576U (en) * 1991-06-26 1993-01-22 日本電気株式会社 Heat dissipation mounting structure for integrated circuits
EP0590354A1 (en) * 1992-09-29 1994-04-06 Robert Bosch Gmbh Device with a board, a heat sink and at least one power component
US5375039A (en) * 1992-09-29 1994-12-20 Robert Bosch Gmbh Circuit board heat dissipation layering arrangement
US5693572A (en) * 1993-12-20 1997-12-02 Sgs-Thomson Microelectronics, Inc. Ball grid array integrated circuit package with high thermal conductivity
US5642261A (en) * 1993-12-20 1997-06-24 Sgs-Thomson Microelectronics, Inc. Ball-grid-array integrated circuit package with solder-connected thermal conductor
US5991156A (en) * 1993-12-20 1999-11-23 Stmicroelectronics, Inc. Ball grid array integrated circuit package with high thermal conductivity
US5817404A (en) * 1995-01-20 1998-10-06 Matsushita Electric Industrial Co., Ltd. Printed circuit board
US5960538A (en) * 1995-01-20 1999-10-05 Matsushita Electric Industrial Co., Ltd. Printed circuit board
EP0723388A1 (en) * 1995-01-20 1996-07-24 Matsushita Electric Industrial Co., Ltd Printed circuit board
WO1996025763A3 (en) * 1995-02-15 1996-11-07 Ibm Organic chip carriers for wire bond-type chips
US5798909A (en) * 1995-02-15 1998-08-25 International Business Machines Corporation Single-tiered organic chip carriers for wire bond-type chips
US6113399A (en) * 1995-05-12 2000-09-05 Stmicroelectronics, Inc. Low-profile socketed packaging system with land-grid array and thermally conductive slug
US5805419A (en) * 1995-05-12 1998-09-08 Stmicroelectronics, Inc. Low-profile socketed packaging system with land-grid array and thermally conductive slug
JPH09186272A (en) * 1995-08-16 1997-07-15 Anam Ind Co Inc Thin ball-grid array semiconductor package to which externally exposed heat sink is bonded
US6043986A (en) * 1995-09-19 2000-03-28 Nippondenso Co., Ltd. Printed circuit board having a plurality of via-holes
US5856911A (en) * 1996-11-12 1999-01-05 National Semiconductor Corporation Attachment assembly for integrated circuits
KR100244965B1 (en) * 1997-08-12 2000-02-15 윤종용 Method for manufacturing printed circuit board(PCB) and ball grid array(BGA) package
US6381838B1 (en) 1997-08-12 2002-05-07 Samsung Electronics Co., Ltd. BGA package and method of manufacturing the same
WO2000049657A1 (en) * 1999-02-17 2000-08-24 Conexant Systems, Inc. Leadless chip carrier design and structure
US6191477B1 (en) * 1999-02-17 2001-02-20 Conexant Systems, Inc. Leadless chip carrier design and structure
US6867493B2 (en) 2000-11-15 2005-03-15 Skyworks Solutions, Inc. Structure and method for fabrication of a leadless multi-die carrier
US6582979B2 (en) 2000-11-15 2003-06-24 Skyworks Solutions, Inc. Structure and method for fabrication of a leadless chip carrier with embedded antenna
US6611055B1 (en) 2000-11-15 2003-08-26 Skyworks Solutions, Inc. Leadless flip chip carrier design and structure
US6960824B1 (en) 2000-11-15 2005-11-01 Skyworks Solutions, Inc. Structure and method for fabrication of a leadless chip carrier
WO2003010796A2 (en) 2001-07-26 2003-02-06 Conexant Systems, Inc. Structure and method for fabrication of a leadless chip carrier with embedded antenna
JP2003060523A (en) * 2001-08-09 2003-02-28 Tdk Corp Radio communication module
WO2003017324A2 (en) 2001-08-14 2003-02-27 Conexant Systems, Inc. Structure and method for fabrication of a leadless chip carrier with embedded inductor
WO2003019997A1 (en) * 2001-08-22 2003-03-06 Vanner, Inc. Improved heat sink for surface mounted power devices
JP2004095586A (en) * 2002-08-29 2004-03-25 Denso Corp Electric apparatus and wiring board
JP2006524904A (en) * 2003-02-10 2006-11-02 スカイワークス ソリューションズ，インコーポレイテッド Semiconductor die package with reduced inductance and reduced die adhesive flow
JP2015195304A (en) * 2014-03-31 2015-11-05 京セラサーキットソリューションズ株式会社 Printed circuit board and manufacturing method of the same
JP2018006463A (en) * 2016-06-29 2018-01-11 京セラ株式会社 Substrate for mounting semiconductor device and semiconductor device
CN108093602A (en) * 2016-11-22 2018-05-29 三星显示有限公司 Display device
US10820455B2 (en) 2016-11-22 2020-10-27 Samsung Display Co., Ltd. Display device
CN108093602B (en) * 2016-11-22 2021-01-22 三星显示有限公司 Display device
US11252848B2 (en) 2016-11-22 2022-02-15 Samsung Display Co., Ltd. Display device
US11558986B2 (en) 2016-11-22 2023-01-17 Samsung Display Co., Ltd. Display device
CN109089374A (en) * 2018-09-10 2018-12-25 北京四方继保自动化股份有限公司 A kind of PCB circuit board part heat dissipating method

Also Published As

Publication number Publication date
JP2660295B2 (en) 1997-10-08

Similar Documents

Publication Publication Date Title
JPH0258358A (en) Substrate for mounting electronic component
JP3158073B2 (en) Electronic element packaging method and electronic element package
JPS59188948A (en) Chip carrier
JPH04142068A (en) Electronical component mounting board and manufacture thereof
JPS61287194A (en) Chip carrier for electronic element
JPS6134989A (en) Substrate for placing electronic part and method of producing same
JPS62114247A (en) Manufacture of chip carrier for electronic element
JPS6239032A (en) Chip carrier for electronic element
JPS6239039A (en) Chip carrier for electronic device
JP2753761B2 (en) Electronic component mounting substrate and method of manufacturing the same
JPS6239031A (en) Chip carrier for electronic element
JPH07273462A (en) Electronic part mounting substrate
JP2809316B2 (en) Substrate for mounting electronic components
JPH0358552B2 (en)
JPS6252991A (en) Chip carrier for electronic element
JP2004072003A (en) Multilayer circuit board having metal base, and hybrid integrated circuit using the same
JPS6211014Y2 (en)
JPS60111489A (en) Board for placing electronic parts and method of producing same
JPH0487398A (en) High-density functional device
JPS6214717Y2 (en)
JPS62114251A (en) Manufacture of chip carrier for electronic element
JPS61287131A (en) Chip carrier for electronic element
JPH0358551B2 (en)
JPS61287128A (en) Chip carrier for electron element
JPH0113219B2 (en)

Legal Events

Date Code Title Description
R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080613

Year of fee payment: 11

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090613

Year of fee payment: 12

EXPY Cancellation because of completion of term
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090613

Year of fee payment: 12