JPH0255318U - - Google Patents

Info

Publication number
JPH0255318U
JPH0255318U JP13419988U JP13419988U JPH0255318U JP H0255318 U JPH0255318 U JP H0255318U JP 13419988 U JP13419988 U JP 13419988U JP 13419988 U JP13419988 U JP 13419988U JP H0255318 U JPH0255318 U JP H0255318U
Authority
JP
Japan
Prior art keywords
peripheral device
power
reset signal
computer
reception
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13419988U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13419988U priority Critical patent/JPH0255318U/ja
Publication of JPH0255318U publication Critical patent/JPH0255318U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案の第1の考案の一実施例によ
る構成図、第2図はこの考案の第2の考案の一実
施例による構成図、第3図は従来の回路の構成図
である。 1は電子計算機、2は周辺装置、3はインター
フエースケーブル、8,8aは周辺装置の電源投
入切断制御回路、7はTERMPWR(TERM
INATION POWER)信号、7aはRS
T(リセツト)信号。なお、図中、同一符号は同
一又は相当部分を示す。
Fig. 1 is a block diagram of an embodiment of the first invention of this invention, Fig. 2 is a block diagram of an embodiment of the second invention of this invention, and Fig. 3 is a block diagram of a conventional circuit. . 1 is a computer, 2 is a peripheral device, 3 is an interface cable, 8 and 8a are power on/off control circuits for peripheral devices, and 7 is a TERMPWR (TERM
INATION POWER) signal, 7a is RS
T (reset) signal. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

【実用新案登録請求の範囲】 (1) 電子計算機と周辺装置の間で信号の授受制
御を行なうスモールコンピユータシステムインタ
ーフエースを周辺装置に有したものにおいて、上
記周辺装置に、電子計算機の電源投入と共にスモ
ールコンピユータシステムインターフエースケー
ブルを通して入力される終端電源回路信号を検知
し、周辺装置の電源投入制御を行なう電源投入切
断制御手段を備えたことを特徴とする周辺装置の
電源投入制御回路。 (2) 電子計算機と周辺装置の間で信号の授受制
御を行なうインターフエースを周辺装置に有した
ものにおいて、上記周辺装置に、電子計算機の電
源投入と共にオン出力されるリセツト信号をイン
ターフエースケーブルを通して検知し、このリセ
ツト信号に従つて周辺装置の電源投入制御を行な
う電源投入切断制御手段を備えたことを特徴とす
る周辺装置の電源投入制御回路。
[Scope of Claim for Utility Model Registration] (1) In a peripheral device that has a small computer system interface that controls the transmission and reception of signals between a computer and a peripheral device, when the peripheral device is A power-on control circuit for a peripheral device, comprising a power-on/off control means for detecting a terminal power circuit signal input through a small computer system interface cable and controlling power-on of the peripheral device. (2) In a peripheral device that has an interface that controls the transmission and reception of signals between the computer and the peripheral device, a reset signal that is turned on and output when the computer is powered on is passed through the interface cable to the peripheral device. 1. A power-on control circuit for a peripheral device, comprising a power-on/off control means for detecting a reset signal and controlling power-on of the peripheral device in accordance with the reset signal.
JP13419988U 1988-10-14 1988-10-14 Pending JPH0255318U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13419988U JPH0255318U (en) 1988-10-14 1988-10-14

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13419988U JPH0255318U (en) 1988-10-14 1988-10-14

Publications (1)

Publication Number Publication Date
JPH0255318U true JPH0255318U (en) 1990-04-20

Family

ID=31392740

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13419988U Pending JPH0255318U (en) 1988-10-14 1988-10-14

Country Status (1)

Country Link
JP (1) JPH0255318U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06236226A (en) * 1993-02-09 1994-08-23 Seiwa Syst:Kk Automatic power opening/ closing device for computer peripheral equipment
JP2009211616A (en) * 2008-03-06 2009-09-17 Nec Corp Computer system, slave unit, and power supply control method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06236226A (en) * 1993-02-09 1994-08-23 Seiwa Syst:Kk Automatic power opening/ closing device for computer peripheral equipment
JP2009211616A (en) * 2008-03-06 2009-09-17 Nec Corp Computer system, slave unit, and power supply control method

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